arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   8         select ARCH_WANT_IPC_PARSE_VERSION
   9         select BUILDTIME_EXTABLE_SORT if MMU
  10         select CPU_PM if (SUSPEND || CPU_IDLE)
  11         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  12         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  13         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  14         select GENERIC_IRQ_PROBE
  15         select GENERIC_IRQ_SHOW
  16         select GENERIC_PCI_IOMAP
  17         select GENERIC_SMP_IDLE_THREAD
  18         select GENERIC_IDLE_POLL_SETUP
  19         select GENERIC_STRNCPY_FROM_USER
  20         select GENERIC_STRNLEN_USER
  21         select HARDIRQS_SW_RESEND
  22         select HAVE_AOUT
  23         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  24         select HAVE_ARCH_KGDB
  25         select HAVE_ARCH_SECCOMP_FILTER
  26         select HAVE_ARCH_TRACEHOOK
  27         select HAVE_BPF_JIT
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_DEBUG_KMEMLEAK
  30         select HAVE_DMA_API_DEBUG
  31         select HAVE_DMA_ATTRS
  32         select HAVE_DMA_CONTIGUOUS if MMU
  33         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  34         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  35         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  36         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  37         select HAVE_GENERIC_DMA_COHERENT
  38         select HAVE_GENERIC_HARDIRQS
  39         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  40         select HAVE_IDE if PCI || ISA || PCMCIA
  41         select HAVE_IRQ_TIME_ACCOUNTING
  42         select HAVE_KERNEL_GZIP
  43         select HAVE_KERNEL_LZMA
  44         select HAVE_KERNEL_LZO
  45         select HAVE_KERNEL_XZ
  46         select HAVE_KPROBES if !XIP_KERNEL
  47         select HAVE_KRETPROBES if (HAVE_KPROBES)
  48         select HAVE_MEMBLOCK
  49         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  50         select HAVE_PERF_EVENTS
  51         select HAVE_REGS_AND_STACK_ACCESS_API
  52         select HAVE_SYSCALL_TRACEPOINTS
  53         select HAVE_UID16
  54         select KTIME_SCALAR
  55         select PERF_USE_VMALLOC
  56         select RTC_LIB
  57         select SYS_SUPPORTS_APM_EMULATION
  58         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  59         select MODULES_USE_ELF_REL
  60         select CLONE_BACKWARDS
  61         select OLD_SIGSUSPEND3
  62         select OLD_SIGACTION
  63         select HAVE_CONTEXT_TRACKING
  64         help
  65           The ARM series is a line of low-power-consumption RISC chip designs
  66           licensed by ARM Ltd and targeted at embedded applications and
  67           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  68           manufactured, but legacy ARM-based PC hardware remains popular in
  69           Europe.  There is an ARM Linux project with a web page at
  70           <http://www.arm.linux.org.uk/>.
  71
  72 config ARM_HAS_SG_CHAIN
  73         bool
  74
  75 config NEED_SG_DMA_LENGTH
  76         bool
  77
  78 config ARM_DMA_USE_IOMMU
  79         bool
  80         select ARM_HAS_SG_CHAIN
  81         select NEED_SG_DMA_LENGTH
  82
  83 if ARM_DMA_USE_IOMMU
  84
  85 config ARM_DMA_IOMMU_ALIGNMENT
  86         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
  87         range 4 9
  88         default 8
  89         help
  90           DMA mapping framework by default aligns all buffers to the smallest
  91           PAGE_SIZE order which is greater than or equal to the requested buffer
  92           size. This works well for buffers up to a few hundreds kilobytes, but
  93           for larger buffers it just a waste of address space. Drivers which has
  94           relatively small addressing window (like 64Mib) might run out of
  95           virtual space with just a few allocations.
  96
  97           With this parameter you can specify the maximum PAGE_SIZE order for
  98           DMA IOMMU buffers. Larger buffers will be aligned only to this
  99           specified order. The order is expressed as a power of two multiplied
 100           by the PAGE_SIZE.
 101
 102 endif
 103
 104 config HAVE_PWM
 105         bool
 106
 107 config MIGHT_HAVE_PCI
 108         bool
 109
 110 config SYS_SUPPORTS_APM_EMULATION
 111         bool
 112
 113 config HAVE_TCM
 114         bool
 115         select GENERIC_ALLOCATOR
 116
 117 config HAVE_PROC_CPU
 118         bool
 119
 120 config NO_IOPORT
 121         bool
 122
 123 config EISA
 124         bool
 125         ---help---
 126           The Extended Industry Standard Architecture (EISA) bus was
 127           developed as an open alternative to the IBM MicroChannel bus.
 128
 129           The EISA bus provided some of the features of the IBM MicroChannel
 130           bus while maintaining backward compatibility with cards made for
 131           the older ISA bus.  The EISA bus saw limited use between 1988 and
 132           1995 when it was made obsolete by the PCI bus.
 133
 134           Say Y here if you are building a kernel for an EISA-based machine.
 135
 136           Otherwise, say N.
 137
 138 config SBUS
 139         bool
 140
 141 config STACKTRACE_SUPPORT
 142         bool
 143         default y
 144
 145 config HAVE_LATENCYTOP_SUPPORT
 146         bool
 147         depends on !SMP
 148         default y
 149
 150 config LOCKDEP_SUPPORT
 151         bool
 152         default y
 153
 154 config TRACE_IRQFLAGS_SUPPORT
 155         bool
 156         default y
 157
 158 config RWSEM_GENERIC_SPINLOCK
 159         bool
 160         default y
 161
 162 config RWSEM_XCHGADD_ALGORITHM
 163         bool
 164
 165 config ARCH_HAS_ILOG2_U32
 166         bool
 167
 168 config ARCH_HAS_ILOG2_U64
 169         bool
 170
 171 config ARCH_HAS_CPUFREQ
 172         bool
 173         help
 174           Internal node to signify that the ARCH has CPUFREQ support
 175           and that the relevant menu configurations are displayed for
 176           it.
 177
 178 config GENERIC_HWEIGHT
 179         bool
 180         default y
 181
 182 config GENERIC_CALIBRATE_DELAY
 183         bool
 184         default y
 185
 186 config ARCH_MAY_HAVE_PC_FDC
 187         bool
 188
 189 config ZONE_DMA
 190         bool
 191
 192 config NEED_DMA_MAP_STATE
 193        def_bool y
 194
 195 config ARCH_HAS_DMA_SET_COHERENT_MASK
 196         bool
 197
 198 config GENERIC_ISA_DMA
 199         bool
 200
 201 config FIQ
 202         bool
 203
 204 config NEED_RET_TO_USER
 205         bool
 206
 207 config ARCH_MTD_XIP
 208         bool
 209
 210 config VECTORS_BASE
 211         hex
 212         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 213         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 214         default 0x00000000
 215         help
 216           The base address of exception vectors.
 217
 218 config ARM_PATCH_PHYS_VIRT
 219         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 220         default y
 221         depends on !XIP_KERNEL && MMU
 222         depends on !ARCH_REALVIEW || !SPARSEMEM
 223         help
 224           Patch phys-to-virt and virt-to-phys translation functions at
 225           boot and module load time according to the position of the
 226           kernel in system memory.
 227
 228           This can only be used with non-XIP MMU kernels where the base
 229           of physical memory is at a 16MB boundary.
 230
 231           Only disable this option if you know that you do not require
 232           this feature (eg, building a kernel for a single machine) and
 233           you need to shrink the kernel to the minimal size.
 234
 235 config NEED_MACH_GPIO_H
 236         bool
 237         help
 238           Select this when mach/gpio.h is required to provide special
 239           definitions for this platform. The need for mach/gpio.h should
 240           be avoided when possible.
 241
 242 config NEED_MACH_IO_H
 243         bool
 244         help
 245           Select this when mach/io.h is required to provide special
 246           definitions for this platform.  The need for mach/io.h should
 247           be avoided when possible.
 248
 249 config NEED_MACH_MEMORY_H
 250         bool
 251         help
 252           Select this when mach/memory.h is required to provide special
 253           definitions for this platform.  The need for mach/memory.h should
 254           be avoided when possible.
 255
 256 config PHYS_OFFSET
 257         hex "Physical address of main memory" if MMU
 258         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 259         default DRAM_BASE if !MMU
 260         help
 261           Please provide the physical address corresponding to the
 262           location of main memory in your system.
 263
 264 config GENERIC_BUG
 265         def_bool y
 266         depends on BUG
 267
 268 source "init/Kconfig"
 269
 270 source "kernel/Kconfig.freezer"
 271
 272 menu "System Type"
 273
 274 config MMU
 275         bool "MMU-based Paged Memory Management Support"
 276         default y
 277         help
 278           Select if you want MMU-based virtualised addressing space
 279           support by paged memory management. If unsure, say 'Y'.
 280
 281 #
 282 # The "ARM system type" choice list is ordered alphabetically by option
 283 # text.  Please add new entries in the option alphabetic order.
 284 #
 285 choice
 286         prompt "ARM system type"
 287         default ARCH_VERSATILE if !MMU
 288         default ARCH_MULTIPLATFORM if MMU
 289
 290 config ARCH_MULTIPLATFORM
 291         bool "Allow multiple platforms to be selected"
 292         depends on MMU
 293         select ARM_PATCH_PHYS_VIRT
 294         select AUTO_ZRELADDR
 295         select COMMON_CLK
 296         select MULTI_IRQ_HANDLER
 297         select SPARSE_IRQ
 298         select USE_OF
 299
 300 config ARCH_INTEGRATOR
 301         bool "ARM Ltd. Integrator family"
 302         select ARCH_HAS_CPUFREQ
 303         select ARM_AMBA
 304         select COMMON_CLK
 305         select COMMON_CLK_VERSATILE
 306         select GENERIC_CLOCKEVENTS
 307         select HAVE_TCM
 308         select ICST
 309         select MULTI_IRQ_HANDLER
 310         select NEED_MACH_MEMORY_H
 311         select PLAT_VERSATILE
 312         select SPARSE_IRQ
 313         select VERSATILE_FPGA_IRQ
 314         help
 315           Support for ARM's Integrator platform.
 316
 317 config ARCH_REALVIEW
 318         bool "ARM Ltd. RealView family"
 319         select ARCH_WANT_OPTIONAL_GPIOLIB
 320         select ARM_AMBA
 321         select ARM_TIMER_SP804
 322         select COMMON_CLK
 323         select COMMON_CLK_VERSATILE
 324         select GENERIC_CLOCKEVENTS
 325         select GPIO_PL061 if GPIOLIB
 326         select ICST
 327         select NEED_MACH_MEMORY_H
 328         select PLAT_VERSATILE
 329         select PLAT_VERSATILE_CLCD
 330         help
 331           This enables support for ARM Ltd RealView boards.
 332
 333 config ARCH_VERSATILE
 334         bool "ARM Ltd. Versatile family"
 335         select ARCH_WANT_OPTIONAL_GPIOLIB
 336         select ARM_AMBA
 337         select ARM_TIMER_SP804
 338         select ARM_VIC
 339         select CLKDEV_LOOKUP
 340         select GENERIC_CLOCKEVENTS
 341         select HAVE_MACH_CLKDEV
 342         select ICST
 343         select PLAT_VERSATILE
 344         select PLAT_VERSATILE_CLCD
 345         select PLAT_VERSATILE_CLOCK
 346         select VERSATILE_FPGA_IRQ
 347         help
 348           This enables support for ARM Ltd Versatile board.
 349
 350 config ARCH_AT91
 351         bool "Atmel AT91"
 352         select ARCH_REQUIRE_GPIOLIB
 353         select CLKDEV_LOOKUP
 354         select HAVE_CLK
 355         select IRQ_DOMAIN
 356         select NEED_MACH_GPIO_H
 357         select NEED_MACH_IO_H if PCCARD
 358         select PINCTRL
 359         select PINCTRL_AT91 if USE_OF
 360         help
 361           This enables support for systems based on Atmel
 362           AT91RM9200 and AT91SAM9* processors.
 363
 364 config ARCH_CLPS711X
 365         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 366         select ARCH_REQUIRE_GPIOLIB
 367         select AUTO_ZRELADDR
 368         select CLKDEV_LOOKUP
 369         select COMMON_CLK
 370         select CPU_ARM720T
 371         select GENERIC_CLOCKEVENTS
 372         select MULTI_IRQ_HANDLER
 373         select NEED_MACH_MEMORY_H
 374         select SPARSE_IRQ
 375         help
 376           Support for Cirrus Logic 711x/721x/731x based boards.
 377
 378 config ARCH_GEMINI
 379         bool "Cortina Systems Gemini"
 380         select ARCH_REQUIRE_GPIOLIB
 381         select ARCH_USES_GETTIMEOFFSET
 382         select NEED_MACH_GPIO_H
 383         select CPU_FA526
 384         help
 385           Support for the Cortina Systems Gemini family SoCs
 386
 387 config ARCH_EBSA110
 388         bool "EBSA-110"
 389         select ARCH_USES_GETTIMEOFFSET
 390         select CPU_SA110
 391         select ISA
 392         select NEED_MACH_IO_H
 393         select NEED_MACH_MEMORY_H
 394         select NO_IOPORT
 395         help
 396           This is an evaluation board for the StrongARM processor available
 397           from Digital. It has limited hardware on-board, including an
 398           Ethernet interface, two PCMCIA sockets, two serial ports and a
 399           parallel port.
 400
 401 config ARCH_EP93XX
 402         bool "EP93xx-based"
 403         select ARCH_HAS_HOLES_MEMORYMODEL
 404         select ARCH_REQUIRE_GPIOLIB
 405         select ARCH_USES_GETTIMEOFFSET
 406         select ARM_AMBA
 407         select ARM_VIC
 408         select CLKDEV_LOOKUP
 409         select CPU_ARM920T
 410         select NEED_MACH_MEMORY_H
 411         help
 412           This enables support for the Cirrus EP93xx series of CPUs.
 413
 414 config ARCH_FOOTBRIDGE
 415         bool "FootBridge"
 416         select CPU_SA110
 417         select FOOTBRIDGE
 418         select GENERIC_CLOCKEVENTS
 419         select HAVE_IDE
 420         select NEED_MACH_IO_H if !MMU
 421         select NEED_MACH_MEMORY_H
 422         help
 423           Support for systems based on the DC21285 companion chip
 424           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 425
 426 config ARCH_NETX
 427         bool "Hilscher NetX based"
 428         select ARM_VIC
 429         select CLKSRC_MMIO
 430         select CPU_ARM926T
 431         select GENERIC_CLOCKEVENTS
 432         help
 433           This enables support for systems based on the Hilscher NetX Soc
 434
 435 config ARCH_IOP13XX
 436         bool "IOP13xx-based"
 437         depends on MMU
 438         select ARCH_SUPPORTS_MSI
 439         select CPU_XSC3
 440         select NEED_MACH_MEMORY_H
 441         select NEED_RET_TO_USER
 442         select PCI
 443         select PLAT_IOP
 444         select VMSPLIT_1G
 445         help
 446           Support for Intel's IOP13XX (XScale) family of processors.
 447
 448 config ARCH_IOP32X
 449         bool "IOP32x-based"
 450         depends on MMU
 451         select ARCH_REQUIRE_GPIOLIB
 452         select CPU_XSCALE
 453         select NEED_MACH_GPIO_H
 454         select NEED_RET_TO_USER
 455         select PCI
 456         select PLAT_IOP
 457         help
 458           Support for Intel's 80219 and IOP32X (XScale) family of
 459           processors.
 460
 461 config ARCH_IOP33X
 462         bool "IOP33x-based"
 463         depends on MMU
 464         select ARCH_REQUIRE_GPIOLIB
 465         select CPU_XSCALE
 466         select NEED_MACH_GPIO_H
 467         select NEED_RET_TO_USER
 468         select PCI
 469         select PLAT_IOP
 470         help
 471           Support for Intel's IOP33X (XScale) family of processors.
 472
 473 config ARCH_IXP4XX
 474         bool "IXP4xx-based"
 475         depends on MMU
 476         select ARCH_HAS_DMA_SET_COHERENT_MASK
 477         select ARCH_REQUIRE_GPIOLIB
 478         select CLKSRC_MMIO
 479         select CPU_XSCALE
 480         select DMABOUNCE if PCI
 481         select GENERIC_CLOCKEVENTS
 482         select MIGHT_HAVE_PCI
 483         select NEED_MACH_IO_H
 484         select USB_EHCI_BIG_ENDIAN_MMIO
 485         select USB_EHCI_BIG_ENDIAN_DESC
 486         help
 487           Support for Intel's IXP4XX (XScale) family of processors.
 488
 489 config ARCH_DOVE
 490         bool "Marvell Dove"
 491         select ARCH_REQUIRE_GPIOLIB
 492         select CPU_PJ4
 493         select GENERIC_CLOCKEVENTS
 494         select MIGHT_HAVE_PCI
 495         select PINCTRL
 496         select PINCTRL_DOVE
 497         select PLAT_ORION_LEGACY
 498         select USB_ARCH_HAS_EHCI
 499         select MVEBU_MBUS
 500         help
 501           Support for the Marvell Dove SoC 88AP510
 502
 503 config ARCH_KIRKWOOD
 504         bool "Marvell Kirkwood"
 505         select ARCH_REQUIRE_GPIOLIB
 506         select CPU_FEROCEON
 507         select GENERIC_CLOCKEVENTS
 508         select PCI
 509         select PCI_QUIRKS
 510         select PINCTRL
 511         select PINCTRL_KIRKWOOD
 512         select PLAT_ORION_LEGACY
 513         select MVEBU_MBUS
 514         help
 515           Support for the following Marvell Kirkwood series SoCs:
 516           88F6180, 88F6192 and 88F6281.
 517
 518 config ARCH_MV78XX0
 519         bool "Marvell MV78xx0"
 520         select ARCH_REQUIRE_GPIOLIB
 521         select CPU_FEROCEON
 522         select GENERIC_CLOCKEVENTS
 523         select PCI
 524         select PLAT_ORION_LEGACY
 525         select MVEBU_MBUS
 526         help
 527           Support for the following Marvell MV78xx0 series SoCs:
 528           MV781x0, MV782x0.
 529
 530 config ARCH_ORION5X
 531         bool "Marvell Orion"
 532         depends on MMU
 533         select ARCH_REQUIRE_GPIOLIB
 534         select CPU_FEROCEON
 535         select GENERIC_CLOCKEVENTS
 536         select PCI
 537         select PLAT_ORION_LEGACY
 538         select MVEBU_MBUS
 539         help
 540           Support for the following Marvell Orion 5x series SoCs:
 541           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 542           Orion-2 (5281), Orion-1-90 (6183).
 543
 544 config ARCH_MMP
 545         bool "Marvell PXA168/910/MMP2"
 546         depends on MMU
 547         select ARCH_REQUIRE_GPIOLIB
 548         select CLKDEV_LOOKUP
 549         select GENERIC_ALLOCATOR
 550         select GENERIC_CLOCKEVENTS
 551         select GPIO_PXA
 552         select IRQ_DOMAIN
 553         select NEED_MACH_GPIO_H
 554         select PINCTRL
 555         select PLAT_PXA
 556         select SPARSE_IRQ
 557         help
 558           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 559
 560 config ARCH_KS8695
 561         bool "Micrel/Kendin KS8695"
 562         select ARCH_REQUIRE_GPIOLIB
 563         select CLKSRC_MMIO
 564         select CPU_ARM922T
 565         select GENERIC_CLOCKEVENTS
 566         select NEED_MACH_MEMORY_H
 567         help
 568           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 569           System-on-Chip devices.
 570
 571 config ARCH_W90X900
 572         bool "Nuvoton W90X900 CPU"
 573         select ARCH_REQUIRE_GPIOLIB
 574         select CLKDEV_LOOKUP
 575         select CLKSRC_MMIO
 576         select CPU_ARM926T
 577         select GENERIC_CLOCKEVENTS
 578         help
 579           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 580           At present, the w90x900 has been renamed nuc900, regarding
 581           the ARM series product line, you can login the following
 582           link address to know more.
 583
 584           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 585                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 586
 587 config ARCH_LPC32XX
 588         bool "NXP LPC32XX"
 589         select ARCH_REQUIRE_GPIOLIB
 590         select ARM_AMBA
 591         select CLKDEV_LOOKUP
 592         select CLKSRC_MMIO
 593         select CPU_ARM926T
 594         select GENERIC_CLOCKEVENTS
 595         select HAVE_IDE
 596         select HAVE_PWM
 597         select USB_ARCH_HAS_OHCI
 598         select USE_OF
 599         help
 600           Support for the NXP LPC32XX family of processors
 601
 602 config ARCH_PXA
 603         bool "PXA2xx/PXA3xx-based"
 604         depends on MMU
 605         select ARCH_HAS_CPUFREQ
 606         select ARCH_MTD_XIP
 607         select ARCH_REQUIRE_GPIOLIB
 608         select ARM_CPU_SUSPEND if PM
 609         select AUTO_ZRELADDR
 610         select CLKDEV_LOOKUP
 611         select CLKSRC_MMIO
 612         select GENERIC_CLOCKEVENTS
 613         select GPIO_PXA
 614         select HAVE_IDE
 615         select MULTI_IRQ_HANDLER
 616         select NEED_MACH_GPIO_H
 617         select PLAT_PXA
 618         select SPARSE_IRQ
 619         help
 620           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 621
 622 config ARCH_MSM
 623         bool "Qualcomm MSM"
 624         select ARCH_REQUIRE_GPIOLIB
 625         select CLKDEV_LOOKUP
 626         select GENERIC_CLOCKEVENTS
 627         select HAVE_CLK
 628         help
 629           Support for Qualcomm MSM/QSD based systems.  This runs on the
 630           apps processor of the MSM/QSD and depends on a shared memory
 631           interface to the modem processor which runs the baseband
 632           stack and controls some vital subsystems
 633           (clock and power control, etc).
 634
 635 config ARCH_SHMOBILE
 636         bool "Renesas SH-Mobile / R-Mobile"
 637         select CLKDEV_LOOKUP
 638         select GENERIC_CLOCKEVENTS
 639         select HAVE_ARM_SCU if SMP
 640         select HAVE_ARM_TWD if LOCAL_TIMERS
 641         select HAVE_CLK
 642         select HAVE_MACH_CLKDEV
 643         select HAVE_SMP
 644         select MIGHT_HAVE_CACHE_L2X0
 645         select MULTI_IRQ_HANDLER
 646         select NEED_MACH_MEMORY_H
 647         select NO_IOPORT
 648         select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB
 649         select PM_GENERIC_DOMAINS if PM
 650         select SPARSE_IRQ
 651         help
 652           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 653
 654 config ARCH_RPC
 655         bool "RiscPC"
 656         select ARCH_ACORN
 657         select ARCH_MAY_HAVE_PC_FDC
 658         select ARCH_SPARSEMEM_ENABLE
 659         select ARCH_USES_GETTIMEOFFSET
 660         select FIQ
 661         select HAVE_IDE
 662         select HAVE_PATA_PLATFORM
 663         select ISA_DMA_API
 664         select NEED_MACH_IO_H
 665         select NEED_MACH_MEMORY_H
 666         select NO_IOPORT
 667         select VIRT_TO_BUS
 668         help
 669           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 670           CD-ROM interface, serial and parallel port, and the floppy drive.
 671
 672 config ARCH_SA1100
 673         bool "SA1100-based"
 674         select ARCH_HAS_CPUFREQ
 675         select ARCH_MTD_XIP
 676         select ARCH_REQUIRE_GPIOLIB
 677         select ARCH_SPARSEMEM_ENABLE
 678         select CLKDEV_LOOKUP
 679         select CLKSRC_MMIO
 680         select CPU_FREQ
 681         select CPU_SA1100
 682         select GENERIC_CLOCKEVENTS
 683         select HAVE_IDE
 684         select ISA
 685         select NEED_MACH_GPIO_H
 686         select NEED_MACH_MEMORY_H
 687         select SPARSE_IRQ
 688         help
 689           Support for StrongARM 11x0 based boards.
 690
 691 config ARCH_S3C24XX
 692         bool "Samsung S3C24XX SoCs"
 693         select ARCH_HAS_CPUFREQ
 694         select ARCH_REQUIRE_GPIOLIB
 695         select CLKDEV_LOOKUP
 696         select CLKSRC_MMIO
 697         select GENERIC_CLOCKEVENTS
 698         select GPIO_SAMSUNG
 699         select HAVE_CLK
 700         select HAVE_S3C2410_I2C if I2C
 701         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 702         select HAVE_S3C_RTC if RTC_CLASS
 703         select MULTI_IRQ_HANDLER
 704         select NEED_MACH_GPIO_H
 705         select NEED_MACH_IO_H
 706         select SAMSUNG_ATAGS
 707         help
 708           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 709           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 710           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 711           Samsung SMDK2410 development board (and derivatives).
 712
 713 config ARCH_S3C64XX
 714         bool "Samsung S3C64XX"
 715         select ARCH_HAS_CPUFREQ
 716         select ARCH_REQUIRE_GPIOLIB
 717         select ARM_VIC
 718         select CLKDEV_LOOKUP
 719         select CLKSRC_MMIO
 720         select CPU_V6
 721         select GENERIC_CLOCKEVENTS
 722         select GPIO_SAMSUNG
 723         select HAVE_CLK
 724         select HAVE_S3C2410_I2C if I2C
 725         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 726         select HAVE_TCM
 727         select NEED_MACH_GPIO_H
 728         select NO_IOPORT
 729         select PLAT_SAMSUNG
 730         select S3C_DEV_NAND
 731         select S3C_GPIO_TRACK
 732         select SAMSUNG_ATAGS
 733         select SAMSUNG_CLKSRC
 734         select SAMSUNG_GPIOLIB_4BIT
 735         select SAMSUNG_IRQ_VIC_TIMER
 736         select USB_ARCH_HAS_OHCI
 737         help
 738           Samsung S3C64XX series based systems
 739
 740 config ARCH_S5P64X0
 741         bool "Samsung S5P6440 S5P6450"
 742         select CLKDEV_LOOKUP
 743         select CLKSRC_MMIO
 744         select CPU_V6
 745         select GENERIC_CLOCKEVENTS
 746         select GPIO_SAMSUNG
 747         select HAVE_CLK
 748         select HAVE_S3C2410_I2C if I2C
 749         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 750         select HAVE_S3C_RTC if RTC_CLASS
 751         select NEED_MACH_GPIO_H
 752         select SAMSUNG_ATAGS
 753         help
 754           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 755           SMDK6450.
 756
 757 config ARCH_S5PC100
 758         bool "Samsung S5PC100"
 759         select ARCH_REQUIRE_GPIOLIB
 760         select CLKDEV_LOOKUP
 761         select CLKSRC_MMIO
 762         select CPU_V7
 763         select GENERIC_CLOCKEVENTS
 764         select GPIO_SAMSUNG
 765         select HAVE_CLK
 766         select HAVE_S3C2410_I2C if I2C
 767         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 768         select HAVE_S3C_RTC if RTC_CLASS
 769         select NEED_MACH_GPIO_H
 770         select SAMSUNG_ATAGS
 771         help
 772           Samsung S5PC100 series based systems
 773
 774 config ARCH_S5PV210
 775         bool "Samsung S5PV210/S5PC110"
 776         select ARCH_HAS_CPUFREQ
 777         select ARCH_HAS_HOLES_MEMORYMODEL
 778         select ARCH_SPARSEMEM_ENABLE
 779         select CLKDEV_LOOKUP
 780         select CLKSRC_MMIO
 781         select CPU_V7
 782         select GENERIC_CLOCKEVENTS
 783         select GPIO_SAMSUNG
 784         select HAVE_CLK
 785         select HAVE_S3C2410_I2C if I2C
 786         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 787         select HAVE_S3C_RTC if RTC_CLASS
 788         select NEED_MACH_GPIO_H
 789         select NEED_MACH_MEMORY_H
 790         select SAMSUNG_ATAGS
 791         help
 792           Samsung S5PV210/S5PC110 series based systems
 793
 794 config ARCH_EXYNOS
 795         bool "Samsung EXYNOS"
 796         select ARCH_HAS_CPUFREQ
 797         select ARCH_HAS_HOLES_MEMORYMODEL
 798         select ARCH_REQUIRE_GPIOLIB
 799         select ARCH_SPARSEMEM_ENABLE
 800         select ARM_GIC
 801         select CLKDEV_LOOKUP
 802         select COMMON_CLK
 803         select CPU_V7
 804         select GENERIC_CLOCKEVENTS
 805         select HAVE_CLK
 806         select HAVE_S3C2410_I2C if I2C
 807         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 808         select HAVE_S3C_RTC if RTC_CLASS
 809         select NEED_MACH_MEMORY_H
 810         select USE_OF
 811         help
 812           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 813
 814 config ARCH_SHARK
 815         bool "Shark"
 816         select ARCH_USES_GETTIMEOFFSET
 817         select CPU_SA110
 818         select ISA
 819         select ISA_DMA
 820         select NEED_MACH_MEMORY_H
 821         select PCI
 822         select VIRT_TO_BUS
 823         select ZONE_DMA
 824         help
 825           Support for the StrongARM based Digital DNARD machine, also known
 826           as "Shark" (<http://www.shark-linux.de/shark.html>).
 827
 828 config ARCH_U300
 829         bool "ST-Ericsson U300 Series"
 830         depends on MMU
 831         select ARCH_REQUIRE_GPIOLIB
 832         select ARM_AMBA
 833         select ARM_PATCH_PHYS_VIRT
 834         select ARM_VIC
 835         select CLKDEV_LOOKUP
 836         select CLKSRC_MMIO
 837         select COMMON_CLK
 838         select CPU_ARM926T
 839         select GENERIC_CLOCKEVENTS
 840         select HAVE_TCM
 841         select SPARSE_IRQ
 842         help
 843           Support for ST-Ericsson U300 series mobile platforms.
 844
 845 config ARCH_DAVINCI
 846         bool "TI DaVinci"
 847         select ARCH_HAS_HOLES_MEMORYMODEL
 848         select ARCH_REQUIRE_GPIOLIB
 849         select CLKDEV_LOOKUP
 850         select GENERIC_ALLOCATOR
 851         select GENERIC_CLOCKEVENTS
 852         select GENERIC_IRQ_CHIP
 853         select HAVE_IDE
 854         select NEED_MACH_GPIO_H
 855         select USE_OF
 856         select ZONE_DMA
 857         help
 858           Support for TI's DaVinci platform.
 859
 860 config ARCH_OMAP1
 861         bool "TI OMAP1"
 862         depends on MMU
 863         select ARCH_HAS_CPUFREQ
 864         select ARCH_HAS_HOLES_MEMORYMODEL
 865         select ARCH_OMAP
 866         select ARCH_REQUIRE_GPIOLIB
 867         select CLKDEV_LOOKUP
 868         select CLKSRC_MMIO
 869         select GENERIC_CLOCKEVENTS
 870         select GENERIC_IRQ_CHIP
 871         select HAVE_CLK
 872         select HAVE_IDE
 873         select IRQ_DOMAIN
 874         select NEED_MACH_IO_H if PCCARD
 875         select NEED_MACH_MEMORY_H
 876         help
 877           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 878
 879 endchoice
 880
 881 menu "Multiple platform selection"
 882         depends on ARCH_MULTIPLATFORM
 883
 884 comment "CPU Core family selection"
 885
 886 config ARCH_MULTI_V4
 887         bool "ARMv4 based platforms (FA526, StrongARM)"
 888         depends on !ARCH_MULTI_V6_V7
 889         select ARCH_MULTI_V4_V5
 890
 891 config ARCH_MULTI_V4T
 892         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 893         depends on !ARCH_MULTI_V6_V7
 894         select ARCH_MULTI_V4_V5
 895
 896 config ARCH_MULTI_V5
 897         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 898         depends on !ARCH_MULTI_V6_V7
 899         select ARCH_MULTI_V4_V5
 900
 901 config ARCH_MULTI_V4_V5
 902         bool
 903
 904 config ARCH_MULTI_V6
 905         bool "ARMv6 based platforms (ARM11)"
 906         select ARCH_MULTI_V6_V7
 907         select CPU_V6
 908
 909 config ARCH_MULTI_V7
 910         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 911         default y
 912         select ARCH_MULTI_V6_V7
 913         select CPU_V7
 914
 915 config ARCH_MULTI_V6_V7
 916         bool
 917
 918 config ARCH_MULTI_CPU_AUTO
 919         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 920         select ARCH_MULTI_V5
 921
 922 endmenu
 923
 924 #
 925 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 926 # Kconfigs may be included either alphabetically (according to the
 927 # plat- suffix) or along side the corresponding mach-* source.
 928 #
 929 source "arch/arm/mach-mvebu/Kconfig"
 930
 931 source "arch/arm/mach-at91/Kconfig"
 932
 933 source "arch/arm/mach-bcm/Kconfig"
 934
 935 source "arch/arm/mach-bcm2835/Kconfig"
 936
 937 source "arch/arm/mach-clps711x/Kconfig"
 938
 939 source "arch/arm/mach-cns3xxx/Kconfig"
 940
 941 source "arch/arm/mach-davinci/Kconfig"
 942
 943 source "arch/arm/mach-dove/Kconfig"
 944
 945 source "arch/arm/mach-ep93xx/Kconfig"
 946
 947 source "arch/arm/mach-footbridge/Kconfig"
 948
 949 source "arch/arm/mach-gemini/Kconfig"
 950
 951 source "arch/arm/mach-highbank/Kconfig"
 952
 953 source "arch/arm/mach-integrator/Kconfig"
 954
 955 source "arch/arm/mach-iop32x/Kconfig"
 956
 957 source "arch/arm/mach-iop33x/Kconfig"
 958
 959 source "arch/arm/mach-iop13xx/Kconfig"
 960
 961 source "arch/arm/mach-ixp4xx/Kconfig"
 962
 963 source "arch/arm/mach-kirkwood/Kconfig"
 964
 965 source "arch/arm/mach-ks8695/Kconfig"
 966
 967 source "arch/arm/mach-msm/Kconfig"
 968
 969 source "arch/arm/mach-mv78xx0/Kconfig"
 970
 971 source "arch/arm/mach-imx/Kconfig"
 972
 973 source "arch/arm/mach-mxs/Kconfig"
 974
 975 source "arch/arm/mach-netx/Kconfig"
 976
 977 source "arch/arm/mach-nomadik/Kconfig"
 978
 979 source "arch/arm/plat-omap/Kconfig"
 980
 981 source "arch/arm/mach-omap1/Kconfig"
 982
 983 source "arch/arm/mach-omap2/Kconfig"
 984
 985 source "arch/arm/mach-orion5x/Kconfig"
 986
 987 source "arch/arm/mach-picoxcell/Kconfig"
 988
 989 source "arch/arm/mach-pxa/Kconfig"
 990 source "arch/arm/plat-pxa/Kconfig"
 991
 992 source "arch/arm/mach-mmp/Kconfig"
 993
 994 source "arch/arm/mach-realview/Kconfig"
 995
 996 source "arch/arm/mach-sa1100/Kconfig"
 997
 998 source "arch/arm/plat-samsung/Kconfig"
 999
1000 source "arch/arm/mach-socfpga/Kconfig"
1001
1002 source "arch/arm/mach-spear/Kconfig"
1003
1004 source "arch/arm/mach-s3c24xx/Kconfig"
1005
1006 if ARCH_S3C64XX
1007 source "arch/arm/mach-s3c64xx/Kconfig"
1008 endif
1009
1010 source "arch/arm/mach-s5p64x0/Kconfig"
1011
1012 source "arch/arm/mach-s5pc100/Kconfig"
1013
1014 source "arch/arm/mach-s5pv210/Kconfig"
1015
1016 source "arch/arm/mach-exynos/Kconfig"
1017
1018 source "arch/arm/mach-shmobile/Kconfig"
1019
1020 source "arch/arm/mach-sunxi/Kconfig"
1021
1022 source "arch/arm/mach-prima2/Kconfig"
1023
1024 source "arch/arm/mach-tegra/Kconfig"
1025
1026 source "arch/arm/mach-u300/Kconfig"
1027
1028 source "arch/arm/mach-ux500/Kconfig"
1029
1030 source "arch/arm/mach-versatile/Kconfig"
1031
1032 source "arch/arm/mach-vexpress/Kconfig"
1033 source "arch/arm/plat-versatile/Kconfig"
1034
1035 source "arch/arm/mach-virt/Kconfig"
1036
1037 source "arch/arm/mach-vt8500/Kconfig"
1038
1039 source "arch/arm/mach-w90x900/Kconfig"
1040
1041 source "arch/arm/mach-zynq/Kconfig"
1042
1043 # Definitions to make life easier
1044 config ARCH_ACORN
1045         bool
1046
1047 config PLAT_IOP
1048         bool
1049         select GENERIC_CLOCKEVENTS
1050
1051 config PLAT_ORION
1052         bool
1053         select CLKSRC_MMIO
1054         select COMMON_CLK
1055         select GENERIC_IRQ_CHIP
1056         select IRQ_DOMAIN
1057
1058 config PLAT_ORION_LEGACY
1059         bool
1060         select PLAT_ORION
1061
1062 config PLAT_PXA
1063         bool
1064
1065 config PLAT_VERSATILE
1066         bool
1067
1068 config ARM_TIMER_SP804
1069         bool
1070         select CLKSRC_MMIO
1071         select CLKSRC_OF if OF
1072
1073 source arch/arm/mm/Kconfig
1074
1075 config ARM_NR_BANKS
1076         int
1077         default 16 if ARCH_EP93XX
1078         default 8
1079
1080 config IWMMXT
1081         bool "Enable iWMMXt support" if !CPU_PJ4
1082         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1083         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4
1084         help
1085           Enable support for iWMMXt context switching at run time if
1086           running on a CPU that supports it.
1087
1088 config XSCALE_PMU
1089         bool
1090         depends on CPU_XSCALE
1091         default y
1092
1093 config MULTI_IRQ_HANDLER
1094         bool
1095         help
1096           Allow each machine to specify it's own IRQ handler at run time.
1097
1098 if !MMU
1099 source "arch/arm/Kconfig-nommu"
1100 endif
1101
1102 config ARM_ERRATA_326103
1103         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1104         depends on CPU_V6
1105         help
1106           Executing a SWP instruction to read-only memory does not set bit 11
1107           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1108           treat the access as a read, preventing a COW from occurring and
1109           causing the faulting task to livelock.
1110
1111 config ARM_ERRATA_411920
1112         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1113         depends on CPU_V6 || CPU_V6K
1114         help
1115           Invalidation of the Instruction Cache operation can
1116           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1117           It does not affect the MPCore. This option enables the ARM Ltd.
1118           recommended workaround.
1119
1120 config ARM_ERRATA_430973
1121         bool "ARM errata: Stale prediction on replaced interworking branch"
1122         depends on CPU_V7
1123         help
1124           This option enables the workaround for the 430973 Cortex-A8
1125           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1126           interworking branch is replaced with another code sequence at the
1127           same virtual address, whether due to self-modifying code or virtual
1128           to physical address re-mapping, Cortex-A8 does not recover from the
1129           stale interworking branch prediction. This results in Cortex-A8
1130           executing the new code sequence in the incorrect ARM or Thumb state.
1131           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1132           and also flushes the branch target cache at every context switch.
1133           Note that setting specific bits in the ACTLR register may not be
1134           available in non-secure mode.
1135
1136 config ARM_ERRATA_458693
1137         bool "ARM errata: Processor deadlock when a false hazard is created"
1138         depends on CPU_V7
1139         depends on !ARCH_MULTIPLATFORM
1140         help
1141           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1142           erratum. For very specific sequences of memory operations, it is
1143           possible for a hazard condition intended for a cache line to instead
1144           be incorrectly associated with a different cache line. This false
1145           hazard might then cause a processor deadlock. The workaround enables
1146           the L1 caching of the NEON accesses and disables the PLD instruction
1147           in the ACTLR register. Note that setting specific bits in the ACTLR
1148           register may not be available in non-secure mode.
1149
1150 config ARM_ERRATA_460075
1151         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1152         depends on CPU_V7
1153         depends on !ARCH_MULTIPLATFORM
1154         help
1155           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1156           erratum. Any asynchronous access to the L2 cache may encounter a
1157           situation in which recent store transactions to the L2 cache are lost
1158           and overwritten with stale memory contents from external memory. The
1159           workaround disables the write-allocate mode for the L2 cache via the
1160           ACTLR register. Note that setting specific bits in the ACTLR register
1161           may not be available in non-secure mode.
1162
1163 config ARM_ERRATA_742230
1164         bool "ARM errata: DMB operation may be faulty"
1165         depends on CPU_V7 && SMP
1166         depends on !ARCH_MULTIPLATFORM
1167         help
1168           This option enables the workaround for the 742230 Cortex-A9
1169           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1170           between two write operations may not ensure the correct visibility
1171           ordering of the two writes. This workaround sets a specific bit in
1172           the diagnostic register of the Cortex-A9 which causes the DMB
1173           instruction to behave as a DSB, ensuring the correct behaviour of
1174           the two writes.
1175
1176 config ARM_ERRATA_742231
1177         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1178         depends on CPU_V7 && SMP
1179         depends on !ARCH_MULTIPLATFORM
1180         help
1181           This option enables the workaround for the 742231 Cortex-A9
1182           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1183           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1184           accessing some data located in the same cache line, may get corrupted
1185           data due to bad handling of the address hazard when the line gets
1186           replaced from one of the CPUs at the same time as another CPU is
1187           accessing it. This workaround sets specific bits in the diagnostic
1188           register of the Cortex-A9 which reduces the linefill issuing
1189           capabilities of the processor.
1190
1191 config PL310_ERRATA_588369
1192         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1193         depends on CACHE_L2X0
1194         help
1195            The PL310 L2 cache controller implements three types of Clean &
1196            Invalidate maintenance operations: by Physical Address
1197            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1198            They are architecturally defined to behave as the execution of a
1199            clean operation followed immediately by an invalidate operation,
1200            both performing to the same memory location. This functionality
1201            is not correctly implemented in PL310 as clean lines are not
1202            invalidated as a result of these operations.
1203
1204 config ARM_ERRATA_720789
1205         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1206         depends on CPU_V7
1207         help
1208           This option enables the workaround for the 720789 Cortex-A9 (prior to
1209           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1210           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1211           As a consequence of this erratum, some TLB entries which should be
1212           invalidated are not, resulting in an incoherency in the system page
1213           tables. The workaround changes the TLB flushing routines to invalidate
1214           entries regardless of the ASID.
1215
1216 config PL310_ERRATA_727915
1217         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1218         depends on CACHE_L2X0
1219         help
1220           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1221           operation (offset 0x7FC). This operation runs in background so that
1222           PL310 can handle normal accesses while it is in progress. Under very
1223           rare circumstances, due to this erratum, write data can be lost when
1224           PL310 treats a cacheable write transaction during a Clean &
1225           Invalidate by Way operation.
1226
1227 config ARM_ERRATA_743622
1228         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1229         depends on CPU_V7
1230         depends on !ARCH_MULTIPLATFORM
1231         help
1232           This option enables the workaround for the 743622 Cortex-A9
1233           (r2p*) erratum. Under very rare conditions, a faulty
1234           optimisation in the Cortex-A9 Store Buffer may lead to data
1235           corruption. This workaround sets a specific bit in the diagnostic
1236           register of the Cortex-A9 which disables the Store Buffer
1237           optimisation, preventing the defect from occurring. This has no
1238           visible impact on the overall performance or power consumption of the
1239           processor.
1240
1241 config ARM_ERRATA_751472
1242         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1243         depends on CPU_V7
1244         depends on !ARCH_MULTIPLATFORM
1245         help
1246           This option enables the workaround for the 751472 Cortex-A9 (prior
1247           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1248           completion of a following broadcasted operation if the second
1249           operation is received by a CPU before the ICIALLUIS has completed,
1250           potentially leading to corrupted entries in the cache or TLB.
1251
1252 config PL310_ERRATA_753970
1253         bool "PL310 errata: cache sync operation may be faulty"
1254         depends on CACHE_PL310
1255         help
1256           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1257
1258           Under some condition the effect of cache sync operation on
1259           the store buffer still remains when the operation completes.
1260           This means that the store buffer is always asked to drain and
1261           this prevents it from merging any further writes. The workaround
1262           is to replace the normal offset of cache sync operation (0x730)
1263           by another offset targeting an unmapped PL310 register 0x740.
1264           This has the same effect as the cache sync operation: store buffer
1265           drain and waiting for all buffers empty.
1266
1267 config ARM_ERRATA_754322
1268         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1269         depends on CPU_V7
1270         help
1271           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1272           r3p*) erratum. A speculative memory access may cause a page table walk
1273           which starts prior to an ASID switch but completes afterwards. This
1274           can populate the micro-TLB with a stale entry which may be hit with
1275           the new ASID. This workaround places two dsb instructions in the mm
1276           switching code so that no page table walks can cross the ASID switch.
1277
1278 config ARM_ERRATA_754327
1279         bool "ARM errata: no automatic Store Buffer drain"
1280         depends on CPU_V7 && SMP
1281         help
1282           This option enables the workaround for the 754327 Cortex-A9 (prior to
1283           r2p0) erratum. The Store Buffer does not have any automatic draining
1284           mechanism and therefore a livelock may occur if an external agent
1285           continuously polls a memory location waiting to observe an update.
1286           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1287           written polling loops from denying visibility of updates to memory.
1288
1289 config ARM_ERRATA_364296
1290         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1291         depends on CPU_V6 && !SMP
1292         help
1293           This options enables the workaround for the 364296 ARM1136
1294           r0p2 erratum (possible cache data corruption with
1295           hit-under-miss enabled). It sets the undocumented bit 31 in
1296           the auxiliary control register and the FI bit in the control
1297           register, thus disabling hit-under-miss without putting the
1298           processor into full low interrupt latency mode. ARM11MPCore
1299           is not affected.
1300
1301 config ARM_ERRATA_764369
1302         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1303         depends on CPU_V7 && SMP
1304         help
1305           This option enables the workaround for erratum 764369
1306           affecting Cortex-A9 MPCore with two or more processors (all
1307           current revisions). Under certain timing circumstances, a data
1308           cache line maintenance operation by MVA targeting an Inner
1309           Shareable memory region may fail to proceed up to either the
1310           Point of Coherency or to the Point of Unification of the
1311           system. This workaround adds a DSB instruction before the
1312           relevant cache maintenance functions and sets a specific bit
1313           in the diagnostic control register of the SCU.
1314
1315 config PL310_ERRATA_769419
1316         bool "PL310 errata: no automatic Store Buffer drain"
1317         depends on CACHE_L2X0
1318         help
1319           On revisions of the PL310 prior to r3p2, the Store Buffer does
1320           not automatically drain. This can cause normal, non-cacheable
1321           writes to be retained when the memory system is idle, leading
1322           to suboptimal I/O performance for drivers using coherent DMA.
1323           This option adds a write barrier to the cpu_idle loop so that,
1324           on systems with an outer cache, the store buffer is drained
1325           explicitly.
1326
1327 config ARM_ERRATA_775420
1328        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1329        depends on CPU_V7
1330        help
1331          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1332          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1333          operation aborts with MMU exception, it might cause the processor
1334          to deadlock. This workaround puts DSB before executing ISB if
1335          an abort may occur on cache maintenance.
1336
1337 config ARM_ERRATA_798181
1338         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1339         depends on CPU_V7 && SMP
1340         help
1341           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1342           adequately shooting down all use of the old entries. This
1343           option enables the Linux kernel workaround for this erratum
1344           which sends an IPI to the CPUs that are running the same ASID
1345           as the one being invalidated.
1346
1347 endmenu
1348
1349 source "arch/arm/common/Kconfig"
1350
1351 menu "Bus support"
1352
1353 config ARM_AMBA
1354         bool
1355
1356 config ISA
1357         bool
1358         help
1359           Find out whether you have ISA slots on your motherboard.  ISA is the
1360           name of a bus system, i.e. the way the CPU talks to the other stuff
1361           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1362           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1363           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1364
1365 # Select ISA DMA controller support
1366 config ISA_DMA
1367         bool
1368         select ISA_DMA_API
1369
1370 # Select ISA DMA interface
1371 config ISA_DMA_API
1372         bool
1373
1374 config PCI
1375         bool "PCI support" if MIGHT_HAVE_PCI
1376         help
1377           Find out whether you have a PCI motherboard. PCI is the name of a
1378           bus system, i.e. the way the CPU talks to the other stuff inside
1379           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1380           VESA. If you have PCI, say Y, otherwise N.
1381
1382 config PCI_DOMAINS
1383         bool
1384         depends on PCI
1385
1386 config PCI_NANOENGINE
1387         bool "BSE nanoEngine PCI support"
1388         depends on SA1100_NANOENGINE
1389         help
1390           Enable PCI on the BSE nanoEngine board.
1391
1392 config PCI_SYSCALL
1393         def_bool PCI
1394
1395 # Select the host bridge type
1396 config PCI_HOST_VIA82C505
1397         bool
1398         depends on PCI && ARCH_SHARK
1399         default y
1400
1401 config PCI_HOST_ITE8152
1402         bool
1403         depends on PCI && MACH_ARMCORE
1404         default y
1405         select DMABOUNCE
1406
1407 source "drivers/pci/Kconfig"
1408
1409 source "drivers/pcmcia/Kconfig"
1410
1411 endmenu
1412
1413 menu "Kernel Features"
1414
1415 config HAVE_SMP
1416         bool
1417         help
1418           This option should be selected by machines which have an SMP-
1419           capable CPU.
1420
1421           The only effect of this option is to make the SMP-related
1422           options available to the user for configuration.
1423
1424 config SMP
1425         bool "Symmetric Multi-Processing"
1426         depends on CPU_V6K || CPU_V7
1427         depends on GENERIC_CLOCKEVENTS
1428         depends on HAVE_SMP
1429         depends on MMU
1430         select USE_GENERIC_SMP_HELPERS
1431         help
1432           This enables support for systems with more than one CPU. If you have
1433           a system with only one CPU, like most personal computers, say N. If
1434           you have a system with more than one CPU, say Y.
1435
1436           If you say N here, the kernel will run on single and multiprocessor
1437           machines, but will use only one CPU of a multiprocessor machine. If
1438           you say Y here, the kernel will run on many, but not all, single
1439           processor machines. On a single processor machine, the kernel will
1440           run faster if you say N here.
1441
1442           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1443           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1444           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1445
1446           If you don't know what to do here, say N.
1447
1448 config SMP_ON_UP
1449         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1450         depends on SMP && !XIP_KERNEL
1451         default y
1452         help
1453           SMP kernels contain instructions which fail on non-SMP processors.
1454           Enabling this option allows the kernel to modify itself to make
1455           these instructions safe.  Disabling it allows about 1K of space
1456           savings.
1457
1458           If you don't know what to do here, say Y.
1459
1460 config ARM_CPU_TOPOLOGY
1461         bool "Support cpu topology definition"
1462         depends on SMP && CPU_V7
1463         default y
1464         help
1465           Support ARM cpu topology definition. The MPIDR register defines
1466           affinity between processors which is then used to describe the cpu
1467           topology of an ARM System.
1468
1469 config SCHED_MC
1470         bool "Multi-core scheduler support"
1471         depends on ARM_CPU_TOPOLOGY
1472         help
1473           Multi-core scheduler support improves the CPU scheduler's decision
1474           making when dealing with multi-core CPU chips at a cost of slightly
1475           increased overhead in some places. If unsure say N here.
1476
1477 config SCHED_SMT
1478         bool "SMT scheduler support"
1479         depends on ARM_CPU_TOPOLOGY
1480         help
1481           Improves the CPU scheduler's decision making when dealing with
1482           MultiThreading at a cost of slightly increased overhead in some
1483           places. If unsure say N here.
1484
1485 config HAVE_ARM_SCU
1486         bool
1487         help
1488           This option enables support for the ARM system coherency unit
1489
1490 config HAVE_ARM_ARCH_TIMER
1491         bool "Architected timer support"
1492         depends on CPU_V7
1493         select ARM_ARCH_TIMER
1494         help
1495           This option enables support for the ARM architected timer
1496
1497 config HAVE_ARM_TWD
1498         bool
1499         depends on SMP
1500         select CLKSRC_OF if OF
1501         help
1502           This options enables support for the ARM timer and watchdog unit
1503
1504 config MCPM
1505         bool "Multi-Cluster Power Management"
1506         depends on CPU_V7 && SMP
1507         help
1508           This option provides the common power management infrastructure
1509           for (multi-)cluster based systems, such as big.LITTLE based
1510           systems.
1511
1512 choice
1513         prompt "Memory split"
1514         default VMSPLIT_3G
1515         help
1516           Select the desired split between kernel and user memory.
1517
1518           If you are not absolutely sure what you are doing, leave this
1519           option alone!
1520
1521         config VMSPLIT_3G
1522                 bool "3G/1G user/kernel split"
1523         config VMSPLIT_2G
1524                 bool "2G/2G user/kernel split"
1525         config VMSPLIT_1G
1526                 bool "1G/3G user/kernel split"
1527 endchoice
1528
1529 config PAGE_OFFSET
1530         hex
1531         default 0x40000000 if VMSPLIT_1G
1532         default 0x80000000 if VMSPLIT_2G
1533         default 0xC0000000
1534
1535 config NR_CPUS
1536         int "Maximum number of CPUs (2-32)"
1537         range 2 32
1538         depends on SMP
1539         default "4"
1540
1541 config HOTPLUG_CPU
1542         bool "Support for hot-pluggable CPUs"
1543         depends on SMP && HOTPLUG
1544         help
1545           Say Y here to experiment with turning CPUs off and on.  CPUs
1546           can be controlled through /sys/devices/system/cpu.
1547
1548 config ARM_PSCI
1549         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1550         depends on CPU_V7
1551         help
1552           Say Y here if you want Linux to communicate with system firmware
1553           implementing the PSCI specification for CPU-centric power
1554           management operations described in ARM document number ARM DEN
1555           0022A ("Power State Coordination Interface System Software on
1556           ARM processors").
1557
1558 config LOCAL_TIMERS
1559         bool "Use local timer interrupts"
1560         depends on SMP
1561         default y
1562         help
1563           Enable support for local timers on SMP platforms, rather then the
1564           legacy IPI broadcast method.  Local timers allows the system
1565           accounting to be spread across the timer interval, preventing a
1566           "thundering herd" at every timer tick.
1567
1568 # The GPIO number here must be sorted by descending number. In case of
1569 # a multiplatform kernel, we just want the highest value required by the
1570 # selected platforms.
1571 config ARCH_NR_GPIO
1572         int
1573         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1574         default 512 if SOC_OMAP5
1575         default 392 if ARCH_U8500
1576         default 352 if ARCH_VT8500
1577         default 288 if ARCH_SUNXI
1578         default 264 if MACH_H4700
1579         default 0
1580         help
1581           Maximum number of GPIOs in the system.
1582
1583           If unsure, leave the default value.
1584
1585 source kernel/Kconfig.preempt
1586
1587 config HZ
1588         int
1589         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1590                 ARCH_S5PV210 || ARCH_EXYNOS4
1591         default AT91_TIMER_HZ if ARCH_AT91
1592         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1593         default 100
1594
1595 config SCHED_HRTICK
1596         def_bool HIGH_RES_TIMERS
1597
1598 config THUMB2_KERNEL
1599         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1600         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1601         default y if CPU_THUMBONLY
1602         select AEABI
1603         select ARM_ASM_UNIFIED
1604         select ARM_UNWIND
1605         help
1606           By enabling this option, the kernel will be compiled in
1607           Thumb-2 mode. A compiler/assembler that understand the unified
1608           ARM-Thumb syntax is needed.
1609
1610           If unsure, say N.
1611
1612 config THUMB2_AVOID_R_ARM_THM_JUMP11
1613         bool "Work around buggy Thumb-2 short branch relocations in gas"
1614         depends on THUMB2_KERNEL && MODULES
1615         default y
1616         help
1617           Various binutils versions can resolve Thumb-2 branches to
1618           locally-defined, preemptible global symbols as short-range "b.n"
1619           branch instructions.
1620
1621           This is a problem, because there's no guarantee the final
1622           destination of the symbol, or any candidate locations for a
1623           trampoline, are within range of the branch.  For this reason, the
1624           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1625           relocation in modules at all, and it makes little sense to add
1626           support.
1627
1628           The symptom is that the kernel fails with an "unsupported
1629           relocation" error when loading some modules.
1630
1631           Until fixed tools are available, passing
1632           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1633           code which hits this problem, at the cost of a bit of extra runtime
1634           stack usage in some cases.
1635
1636           The problem is described in more detail at:
1637               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1638
1639           Only Thumb-2 kernels are affected.
1640
1641           Unless you are sure your tools don't have this problem, say Y.
1642
1643 config ARM_ASM_UNIFIED
1644         bool
1645
1646 config AEABI
1647         bool "Use the ARM EABI to compile the kernel"
1648         help
1649           This option allows for the kernel to be compiled using the latest
1650           ARM ABI (aka EABI).  This is only useful if you are using a user
1651           space environment that is also compiled with EABI.
1652
1653           Since there are major incompatibilities between the legacy ABI and
1654           EABI, especially with regard to structure member alignment, this
1655           option also changes the kernel syscall calling convention to
1656           disambiguate both ABIs and allow for backward compatibility support
1657           (selected with CONFIG_OABI_COMPAT).
1658
1659           To use this you need GCC version 4.0.0 or later.
1660
1661 config OABI_COMPAT
1662         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1663         depends on AEABI && !THUMB2_KERNEL
1664         default y
1665         help
1666           This option preserves the old syscall interface along with the
1667           new (ARM EABI) one. It also provides a compatibility layer to
1668           intercept syscalls that have structure arguments which layout
1669           in memory differs between the legacy ABI and the new ARM EABI
1670           (only for non "thumb" binaries). This option adds a tiny
1671           overhead to all syscalls and produces a slightly larger kernel.
1672           If you know you'll be using only pure EABI user space then you
1673           can say N here. If this option is not selected and you attempt
1674           to execute a legacy ABI binary then the result will be
1675           UNPREDICTABLE (in fact it can be predicted that it won't work
1676           at all). If in doubt say Y.
1677
1678 config ARCH_HAS_HOLES_MEMORYMODEL
1679         bool
1680
1681 config ARCH_SPARSEMEM_ENABLE
1682         bool
1683
1684 config ARCH_SPARSEMEM_DEFAULT
1685         def_bool ARCH_SPARSEMEM_ENABLE
1686
1687 config ARCH_SELECT_MEMORY_MODEL
1688         def_bool ARCH_SPARSEMEM_ENABLE
1689
1690 config HAVE_ARCH_PFN_VALID
1691         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1692
1693 config HIGHMEM
1694         bool "High Memory Support"
1695         depends on MMU
1696         help
1697           The address space of ARM processors is only 4 Gigabytes large
1698           and it has to accommodate user address space, kernel address
1699           space as well as some memory mapped IO. That means that, if you
1700           have a large amount of physical memory and/or IO, not all of the
1701           memory can be "permanently mapped" by the kernel. The physical
1702           memory that is not permanently mapped is called "high memory".
1703
1704           Depending on the selected kernel/user memory split, minimum
1705           vmalloc space and actual amount of RAM, you may not need this
1706           option which should result in a slightly faster kernel.
1707
1708           If unsure, say n.
1709
1710 config HIGHPTE
1711         bool "Allocate 2nd-level pagetables from highmem"
1712         depends on HIGHMEM
1713
1714 config HW_PERF_EVENTS
1715         bool "Enable hardware performance counter support for perf events"
1716         depends on PERF_EVENTS
1717         default y
1718         help
1719           Enable hardware performance counter support for perf events. If
1720           disabled, perf events will use software events only.
1721
1722 source "mm/Kconfig"
1723
1724 config FORCE_MAX_ZONEORDER
1725         int "Maximum zone order" if ARCH_SHMOBILE
1726         range 11 64 if ARCH_SHMOBILE
1727         default "12" if SOC_AM33XX
1728         default "9" if SA1111
1729         default "11"
1730         help
1731           The kernel memory allocator divides physically contiguous memory
1732           blocks into "zones", where each zone is a power of two number of
1733           pages.  This option selects the largest power of two that the kernel
1734           keeps in the memory allocator.  If you need to allocate very large
1735           blocks of physically contiguous memory, then you may need to
1736           increase this value.
1737
1738           This config option is actually maximum order plus one. For example,
1739           a value of 11 means that the largest free memory block is 2^10 pages.
1740
1741 config ALIGNMENT_TRAP
1742         bool
1743         depends on CPU_CP15_MMU
1744         default y if !ARCH_EBSA110
1745         select HAVE_PROC_CPU if PROC_FS
1746         help
1747           ARM processors cannot fetch/store information which is not
1748           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1749           address divisible by 4. On 32-bit ARM processors, these non-aligned
1750           fetch/store instructions will be emulated in software if you say
1751           here, which has a severe performance impact. This is necessary for
1752           correct operation of some network protocols. With an IP-only
1753           configuration it is safe to say N, otherwise say Y.
1754
1755 config UACCESS_WITH_MEMCPY
1756         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1757         depends on MMU
1758         default y if CPU_FEROCEON
1759         help
1760           Implement faster copy_to_user and clear_user methods for CPU
1761           cores where a 8-word STM instruction give significantly higher
1762           memory write throughput than a sequence of individual 32bit stores.
1763
1764           A possible side effect is a slight increase in scheduling latency
1765           between threads sharing the same address space if they invoke
1766           such copy operations with large buffers.
1767
1768           However, if the CPU data cache is using a write-allocate mode,
1769           this option is unlikely to provide any performance gain.
1770
1771 config SECCOMP
1772         bool
1773         prompt "Enable seccomp to safely compute untrusted bytecode"
1774         ---help---
1775           This kernel feature is useful for number crunching applications
1776           that may need to compute untrusted bytecode during their
1777           execution. By using pipes or other transports made available to
1778           the process as file descriptors supporting the read/write
1779           syscalls, it's possible to isolate those applications in
1780           their own address space using seccomp. Once seccomp is
1781           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1782           and the task is only allowed to execute a few safe syscalls
1783           defined by each seccomp mode.
1784
1785 config CC_STACKPROTECTOR
1786         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1787         help
1788           This option turns on the -fstack-protector GCC feature. This
1789           feature puts, at the beginning of functions, a canary value on
1790           the stack just before the return address, and validates
1791           the value just before actually returning.  Stack based buffer
1792           overflows (that need to overwrite this return address) now also
1793           overwrite the canary, which gets detected and the attack is then
1794           neutralized via a kernel panic.
1795           This feature requires gcc version 4.2 or above.
1796
1797 config XEN_DOM0
1798         def_bool y
1799         depends on XEN
1800
1801 config XEN
1802         bool "Xen guest support on ARM (EXPERIMENTAL)"
1803         depends on ARM && AEABI && OF
1804         depends on CPU_V7 && !CPU_V6
1805         depends on !GENERIC_ATOMIC64
1806         select ARM_PSCI
1807         help
1808           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1809
1810 endmenu
1811
1812 menu "Boot options"
1813
1814 config USE_OF
1815         bool "Flattened Device Tree support"
1816         select IRQ_DOMAIN
1817         select OF
1818         select OF_EARLY_FLATTREE
1819         help
1820           Include support for flattened device tree machine descriptions.
1821
1822 config ATAGS
1823         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1824         default y
1825         help
1826           This is the traditional way of passing data to the kernel at boot
1827           time. If you are solely relying on the flattened device tree (or
1828           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1829           to remove ATAGS support from your kernel binary.  If unsure,
1830           leave this to y.
1831
1832 config DEPRECATED_PARAM_STRUCT
1833         bool "Provide old way to pass kernel parameters"
1834         depends on ATAGS
1835         help
1836           This was deprecated in 2001 and announced to live on for 5 years.
1837           Some old boot loaders still use this way.
1838
1839 # Compressed boot loader in ROM.  Yes, we really want to ask about
1840 # TEXT and BSS so we preserve their values in the config files.
1841 config ZBOOT_ROM_TEXT
1842         hex "Compressed ROM boot loader base address"
1843         default "0"
1844         help
1845           The physical address at which the ROM-able zImage is to be
1846           placed in the target.  Platforms which normally make use of
1847           ROM-able zImage formats normally set this to a suitable
1848           value in their defconfig file.
1849
1850           If ZBOOT_ROM is not enabled, this has no effect.
1851
1852 config ZBOOT_ROM_BSS
1853         hex "Compressed ROM boot loader BSS address"
1854         default "0"
1855         help
1856           The base address of an area of read/write memory in the target
1857           for the ROM-able zImage which must be available while the
1858           decompressor is running. It must be large enough to hold the
1859           entire decompressed kernel plus an additional 128 KiB.
1860           Platforms which normally make use of ROM-able zImage formats
1861           normally set this to a suitable value in their defconfig file.
1862
1863           If ZBOOT_ROM is not enabled, this has no effect.
1864
1865 config ZBOOT_ROM
1866         bool "Compressed boot loader in ROM/flash"
1867         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1868         help
1869           Say Y here if you intend to execute your compressed kernel image
1870           (zImage) directly from ROM or flash.  If unsure, say N.
1871
1872 choice
1873         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1874         depends on ZBOOT_ROM && ARCH_SH7372
1875         default ZBOOT_ROM_NONE
1876         help
1877           Include experimental SD/MMC loading code in the ROM-able zImage.
1878           With this enabled it is possible to write the ROM-able zImage
1879           kernel image to an MMC or SD card and boot the kernel straight
1880           from the reset vector. At reset the processor Mask ROM will load
1881           the first part of the ROM-able zImage which in turn loads the
1882           rest the kernel image to RAM.
1883
1884 config ZBOOT_ROM_NONE
1885         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1886         help
1887           Do not load image from SD or MMC
1888
1889 config ZBOOT_ROM_MMCIF
1890         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1891         help
1892           Load image from MMCIF hardware block.
1893
1894 config ZBOOT_ROM_SH_MOBILE_SDHI
1895         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1896         help
1897           Load image from SDHI hardware block
1898
1899 endchoice
1900
1901 config ARM_APPENDED_DTB
1902         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1903         depends on OF && !ZBOOT_ROM
1904         help
1905           With this option, the boot code will look for a device tree binary
1906           (DTB) appended to zImage
1907           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1908
1909           This is meant as a backward compatibility convenience for those
1910           systems with a bootloader that can't be upgraded to accommodate
1911           the documented boot protocol using a device tree.
1912
1913           Beware that there is very little in terms of protection against
1914           this option being confused by leftover garbage in memory that might
1915           look like a DTB header after a reboot if no actual DTB is appended
1916           to zImage.  Do not leave this option active in a production kernel
1917           if you don't intend to always append a DTB.  Proper passing of the
1918           location into r2 of a bootloader provided DTB is always preferable
1919           to this option.
1920
1921 config ARM_ATAG_DTB_COMPAT
1922         bool "Supplement the appended DTB with traditional ATAG information"
1923         depends on ARM_APPENDED_DTB
1924         help
1925           Some old bootloaders can't be updated to a DTB capable one, yet
1926           they provide ATAGs with memory configuration, the ramdisk address,
1927           the kernel cmdline string, etc.  Such information is dynamically
1928           provided by the bootloader and can't always be stored in a static
1929           DTB.  To allow a device tree enabled kernel to be used with such
1930           bootloaders, this option allows zImage to extract the information
1931           from the ATAG list and store it at run time into the appended DTB.
1932
1933 choice
1934         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1935         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1936
1937 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1938         bool "Use bootloader kernel arguments if available"
1939         help
1940           Uses the command-line options passed by the boot loader instead of
1941           the device tree bootargs property. If the boot loader doesn't provide
1942           any, the device tree bootargs property will be used.
1943
1944 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1945         bool "Extend with bootloader kernel arguments"
1946         help
1947           The command-line arguments provided by the boot loader will be
1948           appended to the the device tree bootargs property.
1949
1950 endchoice
1951
1952 config CMDLINE
1953         string "Default kernel command string"
1954         default ""
1955         help
1956           On some architectures (EBSA110 and CATS), there is currently no way
1957           for the boot loader to pass arguments to the kernel. For these
1958           architectures, you should supply some command-line options at build
1959           time by entering them here. As a minimum, you should specify the
1960           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1961
1962 choice
1963         prompt "Kernel command line type" if CMDLINE != ""
1964         default CMDLINE_FROM_BOOTLOADER
1965         depends on ATAGS
1966
1967 config CMDLINE_FROM_BOOTLOADER
1968         bool "Use bootloader kernel arguments if available"
1969         help
1970           Uses the command-line options passed by the boot loader. If
1971           the boot loader doesn't provide any, the default kernel command
1972           string provided in CMDLINE will be used.
1973
1974 config CMDLINE_EXTEND
1975         bool "Extend bootloader kernel arguments"
1976         help
1977           The command-line arguments provided by the boot loader will be
1978           appended to the default kernel command string.
1979
1980 config CMDLINE_FORCE
1981         bool "Always use the default kernel command string"
1982         help
1983           Always use the default kernel command string, even if the boot
1984           loader passes other arguments to the kernel.
1985           This is useful if you cannot or don't want to change the
1986           command-line options your boot loader passes to the kernel.
1987 endchoice
1988
1989 config XIP_KERNEL
1990         bool "Kernel Execute-In-Place from ROM"
1991         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
1992         help
1993           Execute-In-Place allows the kernel to run from non-volatile storage
1994           directly addressable by the CPU, such as NOR flash. This saves RAM
1995           space since the text section of the kernel is not loaded from flash
1996           to RAM.  Read-write sections, such as the data section and stack,
1997           are still copied to RAM.  The XIP kernel is not compressed since
1998           it has to run directly from flash, so it will take more space to
1999           store it.  The flash address used to link the kernel object files,
2000           and for storing it, is configuration dependent. Therefore, if you
2001           say Y here, you must know the proper physical address where to
2002           store the kernel image depending on your own flash memory usage.
2003
2004           Also note that the make target becomes "make xipImage" rather than
2005           "make zImage" or "make Image".  The final kernel binary to put in
2006           ROM memory will be arch/arm/boot/xipImage.
2007
2008           If unsure, say N.
2009
2010 config XIP_PHYS_ADDR
2011         hex "XIP Kernel Physical Location"
2012         depends on XIP_KERNEL
2013         default "0x00080000"
2014         help
2015           This is the physical address in your flash memory the kernel will
2016           be linked for and stored to.  This address is dependent on your
2017           own flash usage.
2018
2019 config KEXEC
2020         bool "Kexec system call (EXPERIMENTAL)"
2021         depends on (!SMP || HOTPLUG_CPU)
2022         help
2023           kexec is a system call that implements the ability to shutdown your
2024           current kernel, and to start another kernel.  It is like a reboot
2025           but it is independent of the system firmware.   And like a reboot
2026           you can start any kernel with it, not just Linux.
2027
2028           It is an ongoing process to be certain the hardware in a machine
2029           is properly shutdown, so do not be surprised if this code does not
2030           initially work for you.  It may help to enable device hotplugging
2031           support.
2032
2033 config ATAGS_PROC
2034         bool "Export atags in procfs"
2035         depends on ATAGS && KEXEC
2036         default y
2037         help
2038           Should the atags used to boot the kernel be exported in an "atags"
2039           file in procfs. Useful with kexec.
2040
2041 config CRASH_DUMP
2042         bool "Build kdump crash kernel (EXPERIMENTAL)"
2043         help
2044           Generate crash dump after being started by kexec. This should
2045           be normally only set in special crash dump kernels which are
2046           loaded in the main kernel with kexec-tools into a specially
2047           reserved region and then later executed after a crash by
2048           kdump/kexec. The crash dump kernel must be compiled to a
2049           memory address not used by the main kernel
2050
2051           For more details see Documentation/kdump/kdump.txt
2052
2053 config AUTO_ZRELADDR
2054         bool "Auto calculation of the decompressed kernel image address"
2055         depends on !ZBOOT_ROM && !ARCH_U300
2056         help
2057           ZRELADDR is the physical address where the decompressed kernel
2058           image will be placed. If AUTO_ZRELADDR is selected, the address
2059           will be determined at run-time by masking the current IP with
2060           0xf8000000. This assumes the zImage being placed in the first 128MB
2061           from start of memory.
2062
2063 endmenu
2064
2065 menu "CPU Power Management"
2066
2067 if ARCH_HAS_CPUFREQ
2068 source "drivers/cpufreq/Kconfig"
2069
2070 config CPU_FREQ_S3C
2071         bool
2072         help
2073           Internal configuration node for common cpufreq on Samsung SoC
2074
2075 config CPU_FREQ_S3C24XX
2076         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2077         depends on ARCH_S3C24XX && CPU_FREQ
2078         select CPU_FREQ_S3C
2079         help
2080           This enables the CPUfreq driver for the Samsung S3C24XX family
2081           of CPUs.
2082
2083           For details, take a look at <file:Documentation/cpu-freq>.
2084
2085           If in doubt, say N.
2086
2087 config CPU_FREQ_S3C24XX_PLL
2088         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2089         depends on CPU_FREQ_S3C24XX
2090         help
2091           Compile in support for changing the PLL frequency from the
2092           S3C24XX series CPUfreq driver. The PLL takes time to settle
2093           after a frequency change, so by default it is not enabled.
2094
2095           This also means that the PLL tables for the selected CPU(s) will
2096           be built which may increase the size of the kernel image.
2097
2098 config CPU_FREQ_S3C24XX_DEBUG
2099         bool "Debug CPUfreq Samsung driver core"
2100         depends on CPU_FREQ_S3C24XX
2101         help
2102           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2103
2104 config CPU_FREQ_S3C24XX_IODEBUG
2105         bool "Debug CPUfreq Samsung driver IO timing"
2106         depends on CPU_FREQ_S3C24XX
2107         help
2108           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2109
2110 config CPU_FREQ_S3C24XX_DEBUGFS
2111         bool "Export debugfs for CPUFreq"
2112         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2113         help
2114           Export status information via debugfs.
2115
2116 endif
2117
2118 source "drivers/cpuidle/Kconfig"
2119
2120 endmenu
2121
2122 menu "Floating point emulation"
2123
2124 comment "At least one emulation must be selected"
2125
2126 config FPE_NWFPE
2127         bool "NWFPE math emulation"
2128         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2129         ---help---
2130           Say Y to include the NWFPE floating point emulator in the kernel.
2131           This is necessary to run most binaries. Linux does not currently
2132           support floating point hardware so you need to say Y here even if
2133           your machine has an FPA or floating point co-processor podule.
2134
2135           You may say N here if you are going to load the Acorn FPEmulator
2136           early in the bootup.
2137
2138 config FPE_NWFPE_XP
2139         bool "Support extended precision"
2140         depends on FPE_NWFPE
2141         help
2142           Say Y to include 80-bit support in the kernel floating-point
2143           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2144           Note that gcc does not generate 80-bit operations by default,
2145           so in most cases this option only enlarges the size of the
2146           floating point emulator without any good reason.
2147
2148           You almost surely want to say N here.
2149
2150 config FPE_FASTFPE
2151         bool "FastFPE math emulation (EXPERIMENTAL)"
2152         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2153         ---help---
2154           Say Y here to include the FAST floating point emulator in the kernel.
2155           This is an experimental much faster emulator which now also has full
2156           precision for the mantissa.  It does not support any exceptions.
2157           It is very simple, and approximately 3-6 times faster than NWFPE.
2158
2159           It should be sufficient for most programs.  It may be not suitable
2160           for scientific calculations, but you have to check this for yourself.
2161           If you do not feel you need a faster FP emulation you should better
2162           choose NWFPE.
2163
2164 config VFP
2165         bool "VFP-format floating point maths"
2166         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2167         help
2168           Say Y to include VFP support code in the kernel. This is needed
2169           if your hardware includes a VFP unit.
2170
2171           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2172           release notes and additional status information.
2173
2174           Say N if your target does not have VFP hardware.
2175
2176 config VFPv3
2177         bool
2178         depends on VFP
2179         default y if CPU_V7
2180
2181 config NEON
2182         bool "Advanced SIMD (NEON) Extension support"
2183         depends on VFPv3 && CPU_V7
2184         help
2185           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2186           Extension.
2187
2188 endmenu
2189
2190 menu "Userspace binary formats"
2191
2192 source "fs/Kconfig.binfmt"
2193
2194 config ARTHUR
2195         tristate "RISC OS personality"
2196         depends on !AEABI
2197         help
2198           Say Y here to include the kernel code necessary if you want to run
2199           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2200           experimental; if this sounds frightening, say N and sleep in peace.
2201           You can also say M here to compile this support as a module (which
2202           will be called arthur).
2203
2204 endmenu
2205
2206 menu "Power management options"
2207
2208 source "kernel/power/Kconfig"
2209
2210 config ARCH_SUSPEND_POSSIBLE
2211         depends on !ARCH_S5PC100
2212         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2213                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2214         def_bool y
2215
2216 config ARM_CPU_SUSPEND
2217         def_bool PM_SLEEP
2218
2219 endmenu
2220
2221 source "net/Kconfig"
2222
2223 source "drivers/Kconfig"
2224
2225 source "fs/Kconfig"
2226
2227 source "arch/arm/Kconfig.debug"
2228
2229 source "security/Kconfig"
2230
2231 source "crypto/Kconfig"
2232
2233 source "lib/Kconfig"
2234
2235 source "arch/arm/kvm/Kconfig"