arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if !XIP_KERNEL
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         select CPU_PM if (SUSPEND || CPU_IDLE)
  33         help
  34           The ARM series is a line of low-power-consumption RISC chip designs
  35           licensed by ARM Ltd and targeted at embedded applications and
  36           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  37           manufactured, but legacy ARM-based PC hardware remains popular in
  38           Europe.  There is an ARM Linux project with a web page at
  39           <http://www.arm.linux.org.uk/>.
  40
  41 config ARM_HAS_SG_CHAIN
  42         bool
  43
  44 config HAVE_PWM
  45         bool
  46
  47 config MIGHT_HAVE_PCI
  48         bool
  49
  50 config SYS_SUPPORTS_APM_EMULATION
  51         bool
  52
  53 config HAVE_SCHED_CLOCK
  54         bool
  55
  56 config GENERIC_GPIO
  57         bool
  58
  59 config ARCH_USES_GETTIMEOFFSET
  60         bool
  61         default n
  62
  63 config GENERIC_CLOCKEVENTS
  64         bool
  65
  66 config GENERIC_CLOCKEVENTS_BROADCAST
  67         bool
  68         depends on GENERIC_CLOCKEVENTS
  69         default y if SMP
  70
  71 config KTIME_SCALAR
  72         bool
  73         default y
  74
  75 config HAVE_TCM
  76         bool
  77         select GENERIC_ALLOCATOR
  78
  79 config HAVE_PROC_CPU
  80         bool
  81
  82 config NO_IOPORT
  83         bool
  84
  85 config EISA
  86         bool
  87         ---help---
  88           The Extended Industry Standard Architecture (EISA) bus was
  89           developed as an open alternative to the IBM MicroChannel bus.
  90
  91           The EISA bus provided some of the features of the IBM MicroChannel
  92           bus while maintaining backward compatibility with cards made for
  93           the older ISA bus.  The EISA bus saw limited use between 1988 and
  94           1995 when it was made obsolete by the PCI bus.
  95
  96           Say Y here if you are building a kernel for an EISA-based machine.
  97
  98           Otherwise, say N.
  99
 100 config SBUS
 101         bool
 102
 103 config MCA
 104         bool
 105         help
 106           MicroChannel Architecture is found in some IBM PS/2 machines and
 107           laptops.  It is a bus system similar to PCI or ISA. See
 108           <file:Documentation/mca.txt> (and especially the web page given
 109           there) before attempting to build an MCA bus kernel.
 110
 111 config STACKTRACE_SUPPORT
 112         bool
 113         default y
 114
 115 config HAVE_LATENCYTOP_SUPPORT
 116         bool
 117         depends on !SMP
 118         default y
 119
 120 config LOCKDEP_SUPPORT
 121         bool
 122         default y
 123
 124 config TRACE_IRQFLAGS_SUPPORT
 125         bool
 126         default y
 127
 128 config HARDIRQS_SW_RESEND
 129         bool
 130         default y
 131
 132 config GENERIC_IRQ_PROBE
 133         bool
 134         default y
 135
 136 config GENERIC_LOCKBREAK
 137         bool
 138         default y
 139         depends on SMP && PREEMPT
 140
 141 config RWSEM_GENERIC_SPINLOCK
 142         bool
 143         default y
 144
 145 config RWSEM_XCHGADD_ALGORITHM
 146         bool
 147
 148 config ARCH_HAS_ILOG2_U32
 149         bool
 150
 151 config ARCH_HAS_ILOG2_U64
 152         bool
 153
 154 config ARCH_HAS_CPUFREQ
 155         bool
 156         help
 157           Internal node to signify that the ARCH has CPUFREQ support
 158           and that the relevant menu configurations are displayed for
 159           it.
 160
 161 config ARCH_HAS_CPU_IDLE_WAIT
 162        def_bool y
 163
 164 config GENERIC_HWEIGHT
 165         bool
 166         default y
 167
 168 config GENERIC_CALIBRATE_DELAY
 169         bool
 170         default y
 171
 172 config ARCH_MAY_HAVE_PC_FDC
 173         bool
 174
 175 config ZONE_DMA
 176         bool
 177
 178 config NEED_DMA_MAP_STATE
 179        def_bool y
 180
 181 config GENERIC_ISA_DMA
 182         bool
 183
 184 config FIQ
 185         bool
 186
 187 config ARCH_MTD_XIP
 188         bool
 189
 190 config VECTORS_BASE
 191         hex
 192         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 193         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 194         default 0x00000000
 195         help
 196           The base address of exception vectors.
 197
 198 config ARM_PATCH_PHYS_VIRT
 199         bool "Patch physical to virtual translations at runtime"
 200         depends on !XIP_KERNEL && MMU
 201         depends on !ARCH_REALVIEW || !SPARSEMEM
 202         help
 203           Patch phys-to-virt and virt-to-phys translation functions at
 204           boot and module load time according to the position of the
 205           kernel in system memory.
 206
 207           This can only be used with non-XIP MMU kernels where the base
 208           of physical memory is at a 16MB boundary, or theoretically 64K
 209           for the MSM machine class.
 210
 211 config ARM_PATCH_PHYS_VIRT_16BIT
 212         def_bool y
 213         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 214         help
 215           This option extends the physical to virtual translation patching
 216           to allow physical memory down to a theoretical minimum of 64K
 217           boundaries.
 218
 219 source "init/Kconfig"
 220
 221 source "kernel/Kconfig.freezer"
 222
 223 menu "System Type"
 224
 225 config MMU
 226         bool "MMU-based Paged Memory Management Support"
 227         default y
 228         help
 229           Select if you want MMU-based virtualised addressing space
 230           support by paged memory management. If unsure, say 'Y'.
 231
 232 #
 233 # The "ARM system type" choice list is ordered alphabetically by option
 234 # text.  Please add new entries in the option alphabetic order.
 235 #
 236 choice
 237         prompt "ARM system type"
 238         default ARCH_VERSATILE
 239
 240 config ARCH_INTEGRATOR
 241         bool "ARM Ltd. Integrator family"
 242         select ARM_AMBA
 243         select ARCH_HAS_CPUFREQ
 244         select CLKDEV_LOOKUP
 245         select HAVE_MACH_CLKDEV
 246         select ICST
 247         select GENERIC_CLOCKEVENTS
 248         select PLAT_VERSATILE
 249         select PLAT_VERSATILE_FPGA_IRQ
 250         help
 251           Support for ARM's Integrator platform.
 252
 253 config ARCH_REALVIEW
 254         bool "ARM Ltd. RealView family"
 255         select ARM_AMBA
 256         select CLKDEV_LOOKUP
 257         select HAVE_MACH_CLKDEV
 258         select ICST
 259         select GENERIC_CLOCKEVENTS
 260         select ARCH_WANT_OPTIONAL_GPIOLIB
 261         select PLAT_VERSATILE
 262         select PLAT_VERSATILE_CLCD
 263         select ARM_TIMER_SP804
 264         select GPIO_PL061 if GPIOLIB
 265         help
 266           This enables support for ARM Ltd RealView boards.
 267
 268 config ARCH_VERSATILE
 269         bool "ARM Ltd. Versatile family"
 270         select ARM_AMBA
 271         select ARM_VIC
 272         select CLKDEV_LOOKUP
 273         select HAVE_MACH_CLKDEV
 274         select ICST
 275         select GENERIC_CLOCKEVENTS
 276         select ARCH_WANT_OPTIONAL_GPIOLIB
 277         select PLAT_VERSATILE
 278         select PLAT_VERSATILE_CLCD
 279         select PLAT_VERSATILE_FPGA_IRQ
 280         select ARM_TIMER_SP804
 281         help
 282           This enables support for ARM Ltd Versatile board.
 283
 284 config ARCH_VEXPRESS
 285         bool "ARM Ltd. Versatile Express family"
 286         select ARCH_WANT_OPTIONAL_GPIOLIB
 287         select ARM_AMBA
 288         select ARM_TIMER_SP804
 289         select CLKDEV_LOOKUP
 290         select HAVE_MACH_CLKDEV
 291         select GENERIC_CLOCKEVENTS
 292         select HAVE_CLK
 293         select HAVE_PATA_PLATFORM
 294         select ICST
 295         select PLAT_VERSATILE
 296         select PLAT_VERSATILE_CLCD
 297         help
 298           This enables support for the ARM Ltd Versatile Express boards.
 299
 300 config ARCH_AT91
 301         bool "Atmel AT91"
 302         select ARCH_REQUIRE_GPIOLIB
 303         select HAVE_CLK
 304         select CLKDEV_LOOKUP
 305         select ARM_PATCH_PHYS_VIRT if MMU
 306         help
 307           This enables support for systems based on the Atmel AT91RM9200,
 308           AT91SAM9 and AT91CAP9 processors.
 309
 310 config ARCH_BCMRING
 311         bool "Broadcom BCMRING"
 312         depends on MMU
 313         select CPU_V6
 314         select ARM_AMBA
 315         select ARM_TIMER_SP804
 316         select CLKDEV_LOOKUP
 317         select GENERIC_CLOCKEVENTS
 318         select ARCH_WANT_OPTIONAL_GPIOLIB
 319         help
 320           Support for Broadcom's BCMRing platform.
 321
 322 config ARCH_CLPS711X
 323         bool "Cirrus Logic CLPS711x/EP721x-based"
 324         select CPU_ARM720T
 325         select ARCH_USES_GETTIMEOFFSET
 326         help
 327           Support for Cirrus Logic 711x/721x based boards.
 328
 329 config ARCH_CNS3XXX
 330         bool "Cavium Networks CNS3XXX family"
 331         select CPU_V6K
 332         select GENERIC_CLOCKEVENTS
 333         select ARM_GIC
 334         select MIGHT_HAVE_PCI
 335         select PCI_DOMAINS if PCI
 336         help
 337           Support for Cavium Networks CNS3XXX platform.
 338
 339 config ARCH_GEMINI
 340         bool "Cortina Systems Gemini"
 341         select CPU_FA526
 342         select ARCH_REQUIRE_GPIOLIB
 343         select ARCH_USES_GETTIMEOFFSET
 344         help
 345           Support for the Cortina Systems Gemini family SoCs
 346
 347 config ARCH_PRIMA2
 348         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 349         select CPU_V7
 350         select GENERIC_TIME
 351         select NO_IOPORT
 352         select GENERIC_CLOCKEVENTS
 353         select CLKDEV_LOOKUP
 354         select GENERIC_IRQ_CHIP
 355         select USE_OF
 356         select ZONE_DMA
 357         help
 358           Support for CSR SiRFSoC ARM Cortex A9 Platform
 359
 360 config ARCH_EBSA110
 361         bool "EBSA-110"
 362         select CPU_SA110
 363         select ISA
 364         select NO_IOPORT
 365         select ARCH_USES_GETTIMEOFFSET
 366         help
 367           This is an evaluation board for the StrongARM processor available
 368           from Digital. It has limited hardware on-board, including an
 369           Ethernet interface, two PCMCIA sockets, two serial ports and a
 370           parallel port.
 371
 372 config ARCH_EP93XX
 373         bool "EP93xx-based"
 374         select CPU_ARM920T
 375         select ARM_AMBA
 376         select ARM_VIC
 377         select CLKDEV_LOOKUP
 378         select ARCH_REQUIRE_GPIOLIB
 379         select ARCH_HAS_HOLES_MEMORYMODEL
 380         select ARCH_USES_GETTIMEOFFSET
 381         help
 382           This enables support for the Cirrus EP93xx series of CPUs.
 383
 384 config ARCH_FOOTBRIDGE
 385         bool "FootBridge"
 386         select CPU_SA110
 387         select FOOTBRIDGE
 388         select GENERIC_CLOCKEVENTS
 389         help
 390           Support for systems based on the DC21285 companion chip
 391           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 392
 393 config ARCH_MXC
 394         bool "Freescale MXC/iMX-based"
 395         select GENERIC_CLOCKEVENTS
 396         select ARCH_REQUIRE_GPIOLIB
 397         select CLKDEV_LOOKUP
 398         select CLKSRC_MMIO
 399         select GENERIC_IRQ_CHIP
 400         select HAVE_SCHED_CLOCK
 401         help
 402           Support for Freescale MXC/iMX-based family of processors
 403
 404 config ARCH_MXS
 405         bool "Freescale MXS-based"
 406         select GENERIC_CLOCKEVENTS
 407         select ARCH_REQUIRE_GPIOLIB
 408         select CLKDEV_LOOKUP
 409         select CLKSRC_MMIO
 410         help
 411           Support for Freescale MXS-based family of processors
 412
 413 config ARCH_NETX
 414         bool "Hilscher NetX based"
 415         select CLKSRC_MMIO
 416         select CPU_ARM926T
 417         select ARM_VIC
 418         select GENERIC_CLOCKEVENTS
 419         help
 420           This enables support for systems based on the Hilscher NetX Soc
 421
 422 config ARCH_H720X
 423         bool "Hynix HMS720x-based"
 424         select CPU_ARM720T
 425         select ISA_DMA_API
 426         select ARCH_USES_GETTIMEOFFSET
 427         help
 428           This enables support for systems based on the Hynix HMS720x
 429
 430 config ARCH_IOP13XX
 431         bool "IOP13xx-based"
 432         depends on MMU
 433         select CPU_XSC3
 434         select PLAT_IOP
 435         select PCI
 436         select ARCH_SUPPORTS_MSI
 437         select VMSPLIT_1G
 438         help
 439           Support for Intel's IOP13XX (XScale) family of processors.
 440
 441 config ARCH_IOP32X
 442         bool "IOP32x-based"
 443         depends on MMU
 444         select CPU_XSCALE
 445         select PLAT_IOP
 446         select PCI
 447         select ARCH_REQUIRE_GPIOLIB
 448         help
 449           Support for Intel's 80219 and IOP32X (XScale) family of
 450           processors.
 451
 452 config ARCH_IOP33X
 453         bool "IOP33x-based"
 454         depends on MMU
 455         select CPU_XSCALE
 456         select PLAT_IOP
 457         select PCI
 458         select ARCH_REQUIRE_GPIOLIB
 459         help
 460           Support for Intel's IOP33X (XScale) family of processors.
 461
 462 config ARCH_IXP23XX
 463         bool "IXP23XX-based"
 464         depends on MMU
 465         select CPU_XSC3
 466         select PCI
 467         select ARCH_USES_GETTIMEOFFSET
 468         help
 469           Support for Intel's IXP23xx (XScale) family of processors.
 470
 471 config ARCH_IXP2000
 472         bool "IXP2400/2800-based"
 473         depends on MMU
 474         select CPU_XSCALE
 475         select PCI
 476         select ARCH_USES_GETTIMEOFFSET
 477         help
 478           Support for Intel's IXP2400/2800 (XScale) family of processors.
 479
 480 config ARCH_IXP4XX
 481         bool "IXP4xx-based"
 482         depends on MMU
 483         select CLKSRC_MMIO
 484         select CPU_XSCALE
 485         select GENERIC_GPIO
 486         select GENERIC_CLOCKEVENTS
 487         select HAVE_SCHED_CLOCK
 488         select MIGHT_HAVE_PCI
 489         select DMABOUNCE if PCI
 490         help
 491           Support for Intel's IXP4XX (XScale) family of processors.
 492
 493 config ARCH_DOVE
 494         bool "Marvell Dove"
 495         select CPU_V7
 496         select PCI
 497         select ARCH_REQUIRE_GPIOLIB
 498         select GENERIC_CLOCKEVENTS
 499         select PLAT_ORION
 500         help
 501           Support for the Marvell Dove SoC 88AP510
 502
 503 config ARCH_KIRKWOOD
 504         bool "Marvell Kirkwood"
 505         select CPU_FEROCEON
 506         select PCI
 507         select ARCH_REQUIRE_GPIOLIB
 508         select GENERIC_CLOCKEVENTS
 509         select PLAT_ORION
 510         help
 511           Support for the following Marvell Kirkwood series SoCs:
 512           88F6180, 88F6192 and 88F6281.
 513
 514 config ARCH_LPC32XX
 515         bool "NXP LPC32XX"
 516         select CLKSRC_MMIO
 517         select CPU_ARM926T
 518         select ARCH_REQUIRE_GPIOLIB
 519         select HAVE_IDE
 520         select ARM_AMBA
 521         select USB_ARCH_HAS_OHCI
 522         select CLKDEV_LOOKUP
 523         select GENERIC_TIME
 524         select GENERIC_CLOCKEVENTS
 525         help
 526           Support for the NXP LPC32XX family of processors
 527
 528 config ARCH_MV78XX0
 529         bool "Marvell MV78xx0"
 530         select CPU_FEROCEON
 531         select PCI
 532         select ARCH_REQUIRE_GPIOLIB
 533         select GENERIC_CLOCKEVENTS
 534         select PLAT_ORION
 535         help
 536           Support for the following Marvell MV78xx0 series SoCs:
 537           MV781x0, MV782x0.
 538
 539 config ARCH_ORION5X
 540         bool "Marvell Orion"
 541         depends on MMU
 542         select CPU_FEROCEON
 543         select PCI
 544         select ARCH_REQUIRE_GPIOLIB
 545         select GENERIC_CLOCKEVENTS
 546         select PLAT_ORION
 547         help
 548           Support for the following Marvell Orion 5x series SoCs:
 549           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 550           Orion-2 (5281), Orion-1-90 (6183).
 551
 552 config ARCH_MMP
 553         bool "Marvell PXA168/910/MMP2"
 554         depends on MMU
 555         select ARCH_REQUIRE_GPIOLIB
 556         select CLKDEV_LOOKUP
 557         select GENERIC_CLOCKEVENTS
 558         select HAVE_SCHED_CLOCK
 559         select TICK_ONESHOT
 560         select PLAT_PXA
 561         select SPARSE_IRQ
 562         help
 563           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 564
 565 config ARCH_KS8695
 566         bool "Micrel/Kendin KS8695"
 567         select CPU_ARM922T
 568         select ARCH_REQUIRE_GPIOLIB
 569         select ARCH_USES_GETTIMEOFFSET
 570         help
 571           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 572           System-on-Chip devices.
 573
 574 config ARCH_W90X900
 575         bool "Nuvoton W90X900 CPU"
 576         select CPU_ARM926T
 577         select ARCH_REQUIRE_GPIOLIB
 578         select CLKDEV_LOOKUP
 579         select CLKSRC_MMIO
 580         select GENERIC_CLOCKEVENTS
 581         help
 582           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 583           At present, the w90x900 has been renamed nuc900, regarding
 584           the ARM series product line, you can login the following
 585           link address to know more.
 586
 587           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 588                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 589
 590 config ARCH_NUC93X
 591         bool "Nuvoton NUC93X CPU"
 592         select CPU_ARM926T
 593         select CLKDEV_LOOKUP
 594         help
 595           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 596           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 597
 598 config ARCH_TEGRA
 599         bool "NVIDIA Tegra"
 600         select CLKDEV_LOOKUP
 601         select CLKSRC_MMIO
 602         select GENERIC_TIME
 603         select GENERIC_CLOCKEVENTS
 604         select GENERIC_GPIO
 605         select HAVE_CLK
 606         select HAVE_SCHED_CLOCK
 607         select ARCH_HAS_CPUFREQ
 608         help
 609           This enables support for NVIDIA Tegra based systems (Tegra APX,
 610           Tegra 6xx and Tegra 2 series).
 611
 612 config ARCH_PNX4008
 613         bool "Philips Nexperia PNX4008 Mobile"
 614         select CPU_ARM926T
 615         select CLKDEV_LOOKUP
 616         select ARCH_USES_GETTIMEOFFSET
 617         help
 618           This enables support for Philips PNX4008 mobile platform.
 619
 620 config ARCH_PXA
 621         bool "PXA2xx/PXA3xx-based"
 622         depends on MMU
 623         select ARCH_MTD_XIP
 624         select ARCH_HAS_CPUFREQ
 625         select CLKDEV_LOOKUP
 626         select CLKSRC_MMIO
 627         select ARCH_REQUIRE_GPIOLIB
 628         select GENERIC_CLOCKEVENTS
 629         select HAVE_SCHED_CLOCK
 630         select TICK_ONESHOT
 631         select PLAT_PXA
 632         select SPARSE_IRQ
 633         select AUTO_ZRELADDR
 634         select MULTI_IRQ_HANDLER
 635         help
 636           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 637
 638 config ARCH_MSM
 639         bool "Qualcomm MSM"
 640         select HAVE_CLK
 641         select GENERIC_CLOCKEVENTS
 642         select ARCH_REQUIRE_GPIOLIB
 643         select CLKDEV_LOOKUP
 644         help
 645           Support for Qualcomm MSM/QSD based systems.  This runs on the
 646           apps processor of the MSM/QSD and depends on a shared memory
 647           interface to the modem processor which runs the baseband
 648           stack and controls some vital subsystems
 649           (clock and power control, etc).
 650
 651 config ARCH_SHMOBILE
 652         bool "Renesas SH-Mobile / R-Mobile"
 653         select HAVE_CLK
 654         select CLKDEV_LOOKUP
 655         select HAVE_MACH_CLKDEV
 656         select GENERIC_CLOCKEVENTS
 657         select NO_IOPORT
 658         select SPARSE_IRQ
 659         select MULTI_IRQ_HANDLER
 660         select PM_GENERIC_DOMAINS if PM
 661         help
 662           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 663
 664 config ARCH_RPC
 665         bool "RiscPC"
 666         select ARCH_ACORN
 667         select FIQ
 668         select TIMER_ACORN
 669         select ARCH_MAY_HAVE_PC_FDC
 670         select HAVE_PATA_PLATFORM
 671         select ISA_DMA_API
 672         select NO_IOPORT
 673         select ARCH_SPARSEMEM_ENABLE
 674         select ARCH_USES_GETTIMEOFFSET
 675         help
 676           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 677           CD-ROM interface, serial and parallel port, and the floppy drive.
 678
 679 config ARCH_SA1100
 680         bool "SA1100-based"
 681         select CLKSRC_MMIO
 682         select CPU_SA1100
 683         select ISA
 684         select ARCH_SPARSEMEM_ENABLE
 685         select ARCH_MTD_XIP
 686         select ARCH_HAS_CPUFREQ
 687         select CPU_FREQ
 688         select GENERIC_CLOCKEVENTS
 689         select HAVE_CLK
 690         select HAVE_SCHED_CLOCK
 691         select TICK_ONESHOT
 692         select ARCH_REQUIRE_GPIOLIB
 693         help
 694           Support for StrongARM 11x0 based boards.
 695
 696 config ARCH_S3C2410
 697         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 698         select GENERIC_GPIO
 699         select ARCH_HAS_CPUFREQ
 700         select HAVE_CLK
 701         select CLKDEV_LOOKUP
 702         select ARCH_USES_GETTIMEOFFSET
 703         select HAVE_S3C2410_I2C if I2C
 704         help
 705           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 706           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 707           the Samsung SMDK2410 development board (and derivatives).
 708
 709           Note, the S3C2416 and the S3C2450 are so close that they even share
 710           the same SoC ID code. This means that there is no separate machine
 711           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 712
 713 config ARCH_S3C64XX
 714         bool "Samsung S3C64XX"
 715         select PLAT_SAMSUNG
 716         select CPU_V6
 717         select ARM_VIC
 718         select HAVE_CLK
 719         select CLKDEV_LOOKUP
 720         select NO_IOPORT
 721         select ARCH_USES_GETTIMEOFFSET
 722         select ARCH_HAS_CPUFREQ
 723         select ARCH_REQUIRE_GPIOLIB
 724         select SAMSUNG_CLKSRC
 725         select SAMSUNG_IRQ_VIC_TIMER
 726         select SAMSUNG_IRQ_UART
 727         select S3C_GPIO_TRACK
 728         select S3C_GPIO_PULL_UPDOWN
 729         select S3C_GPIO_CFG_S3C24XX
 730         select S3C_GPIO_CFG_S3C64XX
 731         select S3C_DEV_NAND
 732         select USB_ARCH_HAS_OHCI
 733         select SAMSUNG_GPIOLIB_4BIT
 734         select HAVE_S3C2410_I2C if I2C
 735         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 736         help
 737           Samsung S3C64XX series based systems
 738
 739 config ARCH_S5P64X0
 740         bool "Samsung S5P6440 S5P6450"
 741         select CPU_V6
 742         select GENERIC_GPIO
 743         select HAVE_CLK
 744         select CLKDEV_LOOKUP
 745         select CLKSRC_MMIO
 746         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 747         select GENERIC_CLOCKEVENTS
 748         select HAVE_SCHED_CLOCK
 749         select HAVE_S3C2410_I2C if I2C
 750         select HAVE_S3C_RTC if RTC_CLASS
 751         help
 752           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 753           SMDK6450.
 754
 755 config ARCH_S5PC100
 756         bool "Samsung S5PC100"
 757         select GENERIC_GPIO
 758         select HAVE_CLK
 759         select CLKDEV_LOOKUP
 760         select CPU_V7
 761         select ARM_L1_CACHE_SHIFT_6
 762         select ARCH_USES_GETTIMEOFFSET
 763         select HAVE_S3C2410_I2C if I2C
 764         select HAVE_S3C_RTC if RTC_CLASS
 765         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 766         help
 767           Samsung S5PC100 series based systems
 768
 769 config ARCH_S5PV210
 770         bool "Samsung S5PV210/S5PC110"
 771         select CPU_V7
 772         select ARCH_SPARSEMEM_ENABLE
 773         select ARCH_HAS_HOLES_MEMORYMODEL
 774         select GENERIC_GPIO
 775         select HAVE_CLK
 776         select CLKDEV_LOOKUP
 777         select CLKSRC_MMIO
 778         select ARM_L1_CACHE_SHIFT_6
 779         select ARCH_HAS_CPUFREQ
 780         select GENERIC_CLOCKEVENTS
 781         select HAVE_SCHED_CLOCK
 782         select HAVE_S3C2410_I2C if I2C
 783         select HAVE_S3C_RTC if RTC_CLASS
 784         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 785         help
 786           Samsung S5PV210/S5PC110 series based systems
 787
 788 config ARCH_EXYNOS4
 789         bool "Samsung EXYNOS4"
 790         select CPU_V7
 791         select ARCH_SPARSEMEM_ENABLE
 792         select ARCH_HAS_HOLES_MEMORYMODEL
 793         select GENERIC_GPIO
 794         select HAVE_CLK
 795         select CLKDEV_LOOKUP
 796         select ARCH_HAS_CPUFREQ
 797         select GENERIC_CLOCKEVENTS
 798         select HAVE_S3C_RTC if RTC_CLASS
 799         select HAVE_S3C2410_I2C if I2C
 800         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 801         help
 802           Samsung EXYNOS4 series based systems
 803
 804 config ARCH_SHARK
 805         bool "Shark"
 806         select CPU_SA110
 807         select ISA
 808         select ISA_DMA
 809         select ZONE_DMA
 810         select PCI
 811         select ARCH_USES_GETTIMEOFFSET
 812         help
 813           Support for the StrongARM based Digital DNARD machine, also known
 814           as "Shark" (<http://www.shark-linux.de/shark.html>).
 815
 816 config ARCH_TCC_926
 817         bool "Telechips TCC ARM926-based systems"
 818         select CLKSRC_MMIO
 819         select CPU_ARM926T
 820         select HAVE_CLK
 821         select CLKDEV_LOOKUP
 822         select GENERIC_CLOCKEVENTS
 823         help
 824           Support for Telechips TCC ARM926-based systems.
 825
 826 config ARCH_U300
 827         bool "ST-Ericsson U300 Series"
 828         depends on MMU
 829         select CLKSRC_MMIO
 830         select CPU_ARM926T
 831         select HAVE_SCHED_CLOCK
 832         select HAVE_TCM
 833         select ARM_AMBA
 834         select ARM_VIC
 835         select GENERIC_CLOCKEVENTS
 836         select CLKDEV_LOOKUP
 837         select HAVE_MACH_CLKDEV
 838         select GENERIC_GPIO
 839         help
 840           Support for ST-Ericsson U300 series mobile platforms.
 841
 842 config ARCH_U8500
 843         bool "ST-Ericsson U8500 Series"
 844         select CPU_V7
 845         select ARM_AMBA
 846         select GENERIC_CLOCKEVENTS
 847         select CLKDEV_LOOKUP
 848         select ARCH_REQUIRE_GPIOLIB
 849         select ARCH_HAS_CPUFREQ
 850         help
 851           Support for ST-Ericsson's Ux500 architecture
 852
 853 config ARCH_NOMADIK
 854         bool "STMicroelectronics Nomadik"
 855         select ARM_AMBA
 856         select ARM_VIC
 857         select CPU_ARM926T
 858         select CLKDEV_LOOKUP
 859         select GENERIC_CLOCKEVENTS
 860         select ARCH_REQUIRE_GPIOLIB
 861         help
 862           Support for the Nomadik platform by ST-Ericsson
 863
 864 config ARCH_DAVINCI
 865         bool "TI DaVinci"
 866         select GENERIC_CLOCKEVENTS
 867         select ARCH_REQUIRE_GPIOLIB
 868         select ZONE_DMA
 869         select HAVE_IDE
 870         select CLKDEV_LOOKUP
 871         select GENERIC_ALLOCATOR
 872         select GENERIC_IRQ_CHIP
 873         select ARCH_HAS_HOLES_MEMORYMODEL
 874         help
 875           Support for TI's DaVinci platform.
 876
 877 config ARCH_OMAP
 878         bool "TI OMAP"
 879         select HAVE_CLK
 880         select ARCH_REQUIRE_GPIOLIB
 881         select ARCH_HAS_CPUFREQ
 882         select CLKSRC_MMIO
 883         select GENERIC_CLOCKEVENTS
 884         select HAVE_SCHED_CLOCK
 885         select ARCH_HAS_HOLES_MEMORYMODEL
 886         help
 887           Support for TI's OMAP platform (OMAP1/2/3/4).
 888
 889 config PLAT_SPEAR
 890         bool "ST SPEAr"
 891         select ARM_AMBA
 892         select ARCH_REQUIRE_GPIOLIB
 893         select CLKDEV_LOOKUP
 894         select CLKSRC_MMIO
 895         select GENERIC_CLOCKEVENTS
 896         select HAVE_CLK
 897         help
 898           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 899
 900 config ARCH_VT8500
 901         bool "VIA/WonderMedia 85xx"
 902         select CPU_ARM926T
 903         select GENERIC_GPIO
 904         select ARCH_HAS_CPUFREQ
 905         select GENERIC_CLOCKEVENTS
 906         select ARCH_REQUIRE_GPIOLIB
 907         select HAVE_PWM
 908         help
 909           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 910
 911 config ARCH_ZYNQ
 912         bool "Xilinx Zynq ARM Cortex A9 Platform"
 913         select CPU_V7
 914         select GENERIC_TIME
 915         select GENERIC_CLOCKEVENTS
 916         select CLKDEV_LOOKUP
 917         select ARM_GIC
 918         select ARM_AMBA
 919         select ICST
 920         select USE_OF
 921         help
 922           Support for Xilinx Zynq ARM Cortex A9 Platform
 923 endchoice
 924
 925 #
 926 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 927 # Kconfigs may be included either alphabetically (according to the
 928 # plat- suffix) or along side the corresponding mach-* source.
 929 #
 930 source "arch/arm/mach-at91/Kconfig"
 931
 932 source "arch/arm/mach-bcmring/Kconfig"
 933
 934 source "arch/arm/mach-clps711x/Kconfig"
 935
 936 source "arch/arm/mach-cns3xxx/Kconfig"
 937
 938 source "arch/arm/mach-davinci/Kconfig"
 939
 940 source "arch/arm/mach-dove/Kconfig"
 941
 942 source "arch/arm/mach-ep93xx/Kconfig"
 943
 944 source "arch/arm/mach-footbridge/Kconfig"
 945
 946 source "arch/arm/mach-gemini/Kconfig"
 947
 948 source "arch/arm/mach-h720x/Kconfig"
 949
 950 source "arch/arm/mach-integrator/Kconfig"
 951
 952 source "arch/arm/mach-iop32x/Kconfig"
 953
 954 source "arch/arm/mach-iop33x/Kconfig"
 955
 956 source "arch/arm/mach-iop13xx/Kconfig"
 957
 958 source "arch/arm/mach-ixp4xx/Kconfig"
 959
 960 source "arch/arm/mach-ixp2000/Kconfig"
 961
 962 source "arch/arm/mach-ixp23xx/Kconfig"
 963
 964 source "arch/arm/mach-kirkwood/Kconfig"
 965
 966 source "arch/arm/mach-ks8695/Kconfig"
 967
 968 source "arch/arm/mach-lpc32xx/Kconfig"
 969
 970 source "arch/arm/mach-msm/Kconfig"
 971
 972 source "arch/arm/mach-mv78xx0/Kconfig"
 973
 974 source "arch/arm/plat-mxc/Kconfig"
 975
 976 source "arch/arm/mach-mxs/Kconfig"
 977
 978 source "arch/arm/mach-netx/Kconfig"
 979
 980 source "arch/arm/mach-nomadik/Kconfig"
 981 source "arch/arm/plat-nomadik/Kconfig"
 982
 983 source "arch/arm/mach-nuc93x/Kconfig"
 984
 985 source "arch/arm/plat-omap/Kconfig"
 986
 987 source "arch/arm/mach-omap1/Kconfig"
 988
 989 source "arch/arm/mach-omap2/Kconfig"
 990
 991 source "arch/arm/mach-orion5x/Kconfig"
 992
 993 source "arch/arm/mach-pxa/Kconfig"
 994 source "arch/arm/plat-pxa/Kconfig"
 995
 996 source "arch/arm/mach-mmp/Kconfig"
 997
 998 source "arch/arm/mach-realview/Kconfig"
 999
1000 source "arch/arm/mach-sa1100/Kconfig"
1001
1002 source "arch/arm/plat-samsung/Kconfig"
1003 source "arch/arm/plat-s3c24xx/Kconfig"
1004 source "arch/arm/plat-s5p/Kconfig"
1005
1006 source "arch/arm/plat-spear/Kconfig"
1007
1008 source "arch/arm/plat-tcc/Kconfig"
1009
1010 if ARCH_S3C2410
1011 source "arch/arm/mach-s3c2410/Kconfig"
1012 source "arch/arm/mach-s3c2412/Kconfig"
1013 source "arch/arm/mach-s3c2416/Kconfig"
1014 source "arch/arm/mach-s3c2440/Kconfig"
1015 source "arch/arm/mach-s3c2443/Kconfig"
1016 endif
1017
1018 if ARCH_S3C64XX
1019 source "arch/arm/mach-s3c64xx/Kconfig"
1020 endif
1021
1022 source "arch/arm/mach-s5p64x0/Kconfig"
1023
1024 source "arch/arm/mach-s5pc100/Kconfig"
1025
1026 source "arch/arm/mach-s5pv210/Kconfig"
1027
1028 source "arch/arm/mach-exynos4/Kconfig"
1029
1030 source "arch/arm/mach-shmobile/Kconfig"
1031
1032 source "arch/arm/mach-tegra/Kconfig"
1033
1034 source "arch/arm/mach-u300/Kconfig"
1035
1036 source "arch/arm/mach-ux500/Kconfig"
1037
1038 source "arch/arm/mach-versatile/Kconfig"
1039
1040 source "arch/arm/mach-vexpress/Kconfig"
1041 source "arch/arm/plat-versatile/Kconfig"
1042
1043 source "arch/arm/mach-vt8500/Kconfig"
1044
1045 source "arch/arm/mach-w90x900/Kconfig"
1046
1047 # Definitions to make life easier
1048 config ARCH_ACORN
1049         bool
1050
1051 config PLAT_IOP
1052         bool
1053         select GENERIC_CLOCKEVENTS
1054         select HAVE_SCHED_CLOCK
1055
1056 config PLAT_ORION
1057         bool
1058         select CLKSRC_MMIO
1059         select GENERIC_IRQ_CHIP
1060         select HAVE_SCHED_CLOCK
1061
1062 config PLAT_PXA
1063         bool
1064
1065 config PLAT_VERSATILE
1066         bool
1067
1068 config ARM_TIMER_SP804
1069         bool
1070         select CLKSRC_MMIO
1071
1072 source arch/arm/mm/Kconfig
1073
1074 config IWMMXT
1075         bool "Enable iWMMXt support"
1076         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1077         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1078         help
1079           Enable support for iWMMXt context switching at run time if
1080           running on a CPU that supports it.
1081
1082 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1083 config XSCALE_PMU
1084         bool
1085         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1086         default y
1087
1088 config CPU_HAS_PMU
1089         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1090                    (!ARCH_OMAP3 || OMAP3_EMU)
1091         default y
1092         bool
1093
1094 config MULTI_IRQ_HANDLER
1095         bool
1096         help
1097           Allow each machine to specify it's own IRQ handler at run time.
1098
1099 if !MMU
1100 source "arch/arm/Kconfig-nommu"
1101 endif
1102
1103 config ARM_ERRATA_411920
1104         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1105         depends on CPU_V6 || CPU_V6K
1106         help
1107           Invalidation of the Instruction Cache operation can
1108           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1109           It does not affect the MPCore. This option enables the ARM Ltd.
1110           recommended workaround.
1111
1112 config ARM_ERRATA_430973
1113         bool "ARM errata: Stale prediction on replaced interworking branch"
1114         depends on CPU_V7
1115         help
1116           This option enables the workaround for the 430973 Cortex-A8
1117           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1118           interworking branch is replaced with another code sequence at the
1119           same virtual address, whether due to self-modifying code or virtual
1120           to physical address re-mapping, Cortex-A8 does not recover from the
1121           stale interworking branch prediction. This results in Cortex-A8
1122           executing the new code sequence in the incorrect ARM or Thumb state.
1123           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1124           and also flushes the branch target cache at every context switch.
1125           Note that setting specific bits in the ACTLR register may not be
1126           available in non-secure mode.
1127
1128 config ARM_ERRATA_458693
1129         bool "ARM errata: Processor deadlock when a false hazard is created"
1130         depends on CPU_V7
1131         help
1132           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1133           erratum. For very specific sequences of memory operations, it is
1134           possible for a hazard condition intended for a cache line to instead
1135           be incorrectly associated with a different cache line. This false
1136           hazard might then cause a processor deadlock. The workaround enables
1137           the L1 caching of the NEON accesses and disables the PLD instruction
1138           in the ACTLR register. Note that setting specific bits in the ACTLR
1139           register may not be available in non-secure mode.
1140
1141 config ARM_ERRATA_460075
1142         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1143         depends on CPU_V7
1144         help
1145           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1146           erratum. Any asynchronous access to the L2 cache may encounter a
1147           situation in which recent store transactions to the L2 cache are lost
1148           and overwritten with stale memory contents from external memory. The
1149           workaround disables the write-allocate mode for the L2 cache via the
1150           ACTLR register. Note that setting specific bits in the ACTLR register
1151           may not be available in non-secure mode.
1152
1153 config ARM_ERRATA_742230
1154         bool "ARM errata: DMB operation may be faulty"
1155         depends on CPU_V7 && SMP
1156         help
1157           This option enables the workaround for the 742230 Cortex-A9
1158           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1159           between two write operations may not ensure the correct visibility
1160           ordering of the two writes. This workaround sets a specific bit in
1161           the diagnostic register of the Cortex-A9 which causes the DMB
1162           instruction to behave as a DSB, ensuring the correct behaviour of
1163           the two writes.
1164
1165 config ARM_ERRATA_742231
1166         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1167         depends on CPU_V7 && SMP
1168         help
1169           This option enables the workaround for the 742231 Cortex-A9
1170           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1171           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1172           accessing some data located in the same cache line, may get corrupted
1173           data due to bad handling of the address hazard when the line gets
1174           replaced from one of the CPUs at the same time as another CPU is
1175           accessing it. This workaround sets specific bits in the diagnostic
1176           register of the Cortex-A9 which reduces the linefill issuing
1177           capabilities of the processor.
1178
1179 config PL310_ERRATA_588369
1180         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1181         depends on CACHE_L2X0
1182         help
1183            The PL310 L2 cache controller implements three types of Clean &
1184            Invalidate maintenance operations: by Physical Address
1185            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1186            They are architecturally defined to behave as the execution of a
1187            clean operation followed immediately by an invalidate operation,
1188            both performing to the same memory location. This functionality
1189            is not correctly implemented in PL310 as clean lines are not
1190            invalidated as a result of these operations.
1191
1192 config ARM_ERRATA_720789
1193         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1194         depends on CPU_V7 && SMP
1195         help
1196           This option enables the workaround for the 720789 Cortex-A9 (prior to
1197           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1198           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1199           As a consequence of this erratum, some TLB entries which should be
1200           invalidated are not, resulting in an incoherency in the system page
1201           tables. The workaround changes the TLB flushing routines to invalidate
1202           entries regardless of the ASID.
1203
1204 config PL310_ERRATA_727915
1205         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1206         depends on CACHE_L2X0
1207         help
1208           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1209           operation (offset 0x7FC). This operation runs in background so that
1210           PL310 can handle normal accesses while it is in progress. Under very
1211           rare circumstances, due to this erratum, write data can be lost when
1212           PL310 treats a cacheable write transaction during a Clean &
1213           Invalidate by Way operation.
1214
1215 config ARM_ERRATA_743622
1216         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1217         depends on CPU_V7
1218         help
1219           This option enables the workaround for the 743622 Cortex-A9
1220           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1221           optimisation in the Cortex-A9 Store Buffer may lead to data
1222           corruption. This workaround sets a specific bit in the diagnostic
1223           register of the Cortex-A9 which disables the Store Buffer
1224           optimisation, preventing the defect from occurring. This has no
1225           visible impact on the overall performance or power consumption of the
1226           processor.
1227
1228 config ARM_ERRATA_751472
1229         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1230         depends on CPU_V7 && SMP
1231         help
1232           This option enables the workaround for the 751472 Cortex-A9 (prior
1233           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1234           completion of a following broadcasted operation if the second
1235           operation is received by a CPU before the ICIALLUIS has completed,
1236           potentially leading to corrupted entries in the cache or TLB.
1237
1238 config ARM_ERRATA_753970
1239         bool "ARM errata: cache sync operation may be faulty"
1240         depends on CACHE_PL310
1241         help
1242           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1243
1244           Under some condition the effect of cache sync operation on
1245           the store buffer still remains when the operation completes.
1246           This means that the store buffer is always asked to drain and
1247           this prevents it from merging any further writes. The workaround
1248           is to replace the normal offset of cache sync operation (0x730)
1249           by another offset targeting an unmapped PL310 register 0x740.
1250           This has the same effect as the cache sync operation: store buffer
1251           drain and waiting for all buffers empty.
1252
1253 config ARM_ERRATA_754322
1254         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1255         depends on CPU_V7
1256         help
1257           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1258           r3p*) erratum. A speculative memory access may cause a page table walk
1259           which starts prior to an ASID switch but completes afterwards. This
1260           can populate the micro-TLB with a stale entry which may be hit with
1261           the new ASID. This workaround places two dsb instructions in the mm
1262           switching code so that no page table walks can cross the ASID switch.
1263
1264 config ARM_ERRATA_754327
1265         bool "ARM errata: no automatic Store Buffer drain"
1266         depends on CPU_V7 && SMP
1267         help
1268           This option enables the workaround for the 754327 Cortex-A9 (prior to
1269           r2p0) erratum. The Store Buffer does not have any automatic draining
1270           mechanism and therefore a livelock may occur if an external agent
1271           continuously polls a memory location waiting to observe an update.
1272           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1273           written polling loops from denying visibility of updates to memory.
1274
1275 config ARM_ERRATA_364296
1276         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1277         depends on CPU_V6 && !SMP
1278         help
1279           This options enables the workaround for the 364296 ARM1136
1280           r0p2 erratum (possible cache data corruption with
1281           hit-under-miss enabled). It sets the undocumented bit 31 in
1282           the auxiliary control register and the FI bit in the control
1283           register, thus disabling hit-under-miss without putting the
1284           processor into full low interrupt latency mode. ARM11MPCore
1285           is not affected.
1286
1287 endmenu
1288
1289 source "arch/arm/common/Kconfig"
1290
1291 menu "Bus support"
1292
1293 config ARM_AMBA
1294         bool
1295
1296 config ISA
1297         bool
1298         help
1299           Find out whether you have ISA slots on your motherboard.  ISA is the
1300           name of a bus system, i.e. the way the CPU talks to the other stuff
1301           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1302           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1303           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1304
1305 # Select ISA DMA controller support
1306 config ISA_DMA
1307         bool
1308         select ISA_DMA_API
1309
1310 # Select ISA DMA interface
1311 config ISA_DMA_API
1312         bool
1313
1314 config PCI
1315         bool "PCI support" if MIGHT_HAVE_PCI
1316         help
1317           Find out whether you have a PCI motherboard. PCI is the name of a
1318           bus system, i.e. the way the CPU talks to the other stuff inside
1319           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1320           VESA. If you have PCI, say Y, otherwise N.
1321
1322 config PCI_DOMAINS
1323         bool
1324         depends on PCI
1325
1326 config PCI_NANOENGINE
1327         bool "BSE nanoEngine PCI support"
1328         depends on SA1100_NANOENGINE
1329         help
1330           Enable PCI on the BSE nanoEngine board.
1331
1332 config PCI_SYSCALL
1333         def_bool PCI
1334
1335 # Select the host bridge type
1336 config PCI_HOST_VIA82C505
1337         bool
1338         depends on PCI && ARCH_SHARK
1339         default y
1340
1341 config PCI_HOST_ITE8152
1342         bool
1343         depends on PCI && MACH_ARMCORE
1344         default y
1345         select DMABOUNCE
1346
1347 source "drivers/pci/Kconfig"
1348
1349 source "drivers/pcmcia/Kconfig"
1350
1351 endmenu
1352
1353 menu "Kernel Features"
1354
1355 source "kernel/time/Kconfig"
1356
1357 config SMP
1358         bool "Symmetric Multi-Processing"
1359         depends on CPU_V6K || CPU_V7
1360         depends on GENERIC_CLOCKEVENTS
1361         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1362                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1363                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1364                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1365         select USE_GENERIC_SMP_HELPERS
1366         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1367         help
1368           This enables support for systems with more than one CPU. If you have
1369           a system with only one CPU, like most personal computers, say N. If
1370           you have a system with more than one CPU, say Y.
1371
1372           If you say N here, the kernel will run on single and multiprocessor
1373           machines, but will use only one CPU of a multiprocessor machine. If
1374           you say Y here, the kernel will run on many, but not all, single
1375           processor machines. On a single processor machine, the kernel will
1376           run faster if you say N here.
1377
1378           See also <file:Documentation/i386/IO-APIC.txt>,
1379           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1380           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1381
1382           If you don't know what to do here, say N.
1383
1384 config SMP_ON_UP
1385         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1386         depends on EXPERIMENTAL
1387         depends on SMP && !XIP_KERNEL
1388         default y
1389         help
1390           SMP kernels contain instructions which fail on non-SMP processors.
1391           Enabling this option allows the kernel to modify itself to make
1392           these instructions safe.  Disabling it allows about 1K of space
1393           savings.
1394
1395           If you don't know what to do here, say Y.
1396
1397 config HAVE_ARM_SCU
1398         bool
1399         help
1400           This option enables support for the ARM system coherency unit
1401
1402 config HAVE_ARM_TWD
1403         bool
1404         depends on SMP
1405         select TICK_ONESHOT
1406         help
1407           This options enables support for the ARM timer and watchdog unit
1408
1409 choice
1410         prompt "Memory split"
1411         default VMSPLIT_3G
1412         help
1413           Select the desired split between kernel and user memory.
1414
1415           If you are not absolutely sure what you are doing, leave this
1416           option alone!
1417
1418         config VMSPLIT_3G
1419                 bool "3G/1G user/kernel split"
1420         config VMSPLIT_2G
1421                 bool "2G/2G user/kernel split"
1422         config VMSPLIT_1G
1423                 bool "1G/3G user/kernel split"
1424 endchoice
1425
1426 config PAGE_OFFSET
1427         hex
1428         default 0x40000000 if VMSPLIT_1G
1429         default 0x80000000 if VMSPLIT_2G
1430         default 0xC0000000
1431
1432 config NR_CPUS
1433         int "Maximum number of CPUs (2-32)"
1434         range 2 32
1435         depends on SMP
1436         default "4"
1437
1438 config HOTPLUG_CPU
1439         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1440         depends on SMP && HOTPLUG && EXPERIMENTAL
1441         help
1442           Say Y here to experiment with turning CPUs off and on.  CPUs
1443           can be controlled through /sys/devices/system/cpu.
1444
1445 config LOCAL_TIMERS
1446         bool "Use local timer interrupts"
1447         depends on SMP
1448         default y
1449         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1450         help
1451           Enable support for local timers on SMP platforms, rather then the
1452           legacy IPI broadcast method.  Local timers allows the system
1453           accounting to be spread across the timer interval, preventing a
1454           "thundering herd" at every timer tick.
1455
1456 source kernel/Kconfig.preempt
1457
1458 config HZ
1459         int
1460         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1461                 ARCH_S5PV210 || ARCH_EXYNOS4
1462         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1463         default AT91_TIMER_HZ if ARCH_AT91
1464         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1465         default 100
1466
1467 config THUMB2_KERNEL
1468         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1469         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1470         select AEABI
1471         select ARM_ASM_UNIFIED
1472         help
1473           By enabling this option, the kernel will be compiled in
1474           Thumb-2 mode. A compiler/assembler that understand the unified
1475           ARM-Thumb syntax is needed.
1476
1477           If unsure, say N.
1478
1479 config THUMB2_AVOID_R_ARM_THM_JUMP11
1480         bool "Work around buggy Thumb-2 short branch relocations in gas"
1481         depends on THUMB2_KERNEL && MODULES
1482         default y
1483         help
1484           Various binutils versions can resolve Thumb-2 branches to
1485           locally-defined, preemptible global symbols as short-range "b.n"
1486           branch instructions.
1487
1488           This is a problem, because there's no guarantee the final
1489           destination of the symbol, or any candidate locations for a
1490           trampoline, are within range of the branch.  For this reason, the
1491           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1492           relocation in modules at all, and it makes little sense to add
1493           support.
1494
1495           The symptom is that the kernel fails with an "unsupported
1496           relocation" error when loading some modules.
1497
1498           Until fixed tools are available, passing
1499           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1500           code which hits this problem, at the cost of a bit of extra runtime
1501           stack usage in some cases.
1502
1503           The problem is described in more detail at:
1504               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1505
1506           Only Thumb-2 kernels are affected.
1507
1508           Unless you are sure your tools don't have this problem, say Y.
1509
1510 config ARM_ASM_UNIFIED
1511         bool
1512
1513 config AEABI
1514         bool "Use the ARM EABI to compile the kernel"
1515         help
1516           This option allows for the kernel to be compiled using the latest
1517           ARM ABI (aka EABI).  This is only useful if you are using a user
1518           space environment that is also compiled with EABI.
1519
1520           Since there are major incompatibilities between the legacy ABI and
1521           EABI, especially with regard to structure member alignment, this
1522           option also changes the kernel syscall calling convention to
1523           disambiguate both ABIs and allow for backward compatibility support
1524           (selected with CONFIG_OABI_COMPAT).
1525
1526           To use this you need GCC version 4.0.0 or later.
1527
1528 config OABI_COMPAT
1529         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1530         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1531         default y
1532         help
1533           This option preserves the old syscall interface along with the
1534           new (ARM EABI) one. It also provides a compatibility layer to
1535           intercept syscalls that have structure arguments which layout
1536           in memory differs between the legacy ABI and the new ARM EABI
1537           (only for non "thumb" binaries). This option adds a tiny
1538           overhead to all syscalls and produces a slightly larger kernel.
1539           If you know you'll be using only pure EABI user space then you
1540           can say N here. If this option is not selected and you attempt
1541           to execute a legacy ABI binary then the result will be
1542           UNPREDICTABLE (in fact it can be predicted that it won't work
1543           at all). If in doubt say Y.
1544
1545 config ARCH_HAS_HOLES_MEMORYMODEL
1546         bool
1547
1548 config ARCH_SPARSEMEM_ENABLE
1549         bool
1550
1551 config ARCH_SPARSEMEM_DEFAULT
1552         def_bool ARCH_SPARSEMEM_ENABLE
1553
1554 config ARCH_SELECT_MEMORY_MODEL
1555         def_bool ARCH_SPARSEMEM_ENABLE
1556
1557 config HAVE_ARCH_PFN_VALID
1558         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1559
1560 config HIGHMEM
1561         bool "High Memory Support"
1562         depends on MMU
1563         help
1564           The address space of ARM processors is only 4 Gigabytes large
1565           and it has to accommodate user address space, kernel address
1566           space as well as some memory mapped IO. That means that, if you
1567           have a large amount of physical memory and/or IO, not all of the
1568           memory can be "permanently mapped" by the kernel. The physical
1569           memory that is not permanently mapped is called "high memory".
1570
1571           Depending on the selected kernel/user memory split, minimum
1572           vmalloc space and actual amount of RAM, you may not need this
1573           option which should result in a slightly faster kernel.
1574
1575           If unsure, say n.
1576
1577 config HIGHPTE
1578         bool "Allocate 2nd-level pagetables from highmem"
1579         depends on HIGHMEM
1580
1581 config HW_PERF_EVENTS
1582         bool "Enable hardware performance counter support for perf events"
1583         depends on PERF_EVENTS && CPU_HAS_PMU
1584         default y
1585         help
1586           Enable hardware performance counter support for perf events. If
1587           disabled, perf events will use software events only.
1588
1589 source "mm/Kconfig"
1590
1591 config FORCE_MAX_ZONEORDER
1592         int "Maximum zone order" if ARCH_SHMOBILE
1593         range 11 64 if ARCH_SHMOBILE
1594         default "9" if SA1111
1595         default "11"
1596         help
1597           The kernel memory allocator divides physically contiguous memory
1598           blocks into "zones", where each zone is a power of two number of
1599           pages.  This option selects the largest power of two that the kernel
1600           keeps in the memory allocator.  If you need to allocate very large
1601           blocks of physically contiguous memory, then you may need to
1602           increase this value.
1603
1604           This config option is actually maximum order plus one. For example,
1605           a value of 11 means that the largest free memory block is 2^10 pages.
1606
1607 config LEDS
1608         bool "Timer and CPU usage LEDs"
1609         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1610                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1611                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1612                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1613                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1614                    ARCH_AT91 || ARCH_DAVINCI || \
1615                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1616         help
1617           If you say Y here, the LEDs on your machine will be used
1618           to provide useful information about your current system status.
1619
1620           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1621           be able to select which LEDs are active using the options below. If
1622           you are compiling a kernel for the EBSA-110 or the LART however, the
1623           red LED will simply flash regularly to indicate that the system is
1624           still functional. It is safe to say Y here if you have a CATS
1625           system, but the driver will do nothing.
1626
1627 config LEDS_TIMER
1628         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1629                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1630                             || MACH_OMAP_PERSEUS2
1631         depends on LEDS
1632         depends on !GENERIC_CLOCKEVENTS
1633         default y if ARCH_EBSA110
1634         help
1635           If you say Y here, one of the system LEDs (the green one on the
1636           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1637           will flash regularly to indicate that the system is still
1638           operational. This is mainly useful to kernel hackers who are
1639           debugging unstable kernels.
1640
1641           The LART uses the same LED for both Timer LED and CPU usage LED
1642           functions. You may choose to use both, but the Timer LED function
1643           will overrule the CPU usage LED.
1644
1645 config LEDS_CPU
1646         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1647                         !ARCH_OMAP) \
1648                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1649                         || MACH_OMAP_PERSEUS2
1650         depends on LEDS
1651         help
1652           If you say Y here, the red LED will be used to give a good real
1653           time indication of CPU usage, by lighting whenever the idle task
1654           is not currently executing.
1655
1656           The LART uses the same LED for both Timer LED and CPU usage LED
1657           functions. You may choose to use both, but the Timer LED function
1658           will overrule the CPU usage LED.
1659
1660 config ALIGNMENT_TRAP
1661         bool
1662         depends on CPU_CP15_MMU
1663         default y if !ARCH_EBSA110
1664         select HAVE_PROC_CPU if PROC_FS
1665         help
1666           ARM processors cannot fetch/store information which is not
1667           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1668           address divisible by 4. On 32-bit ARM processors, these non-aligned
1669           fetch/store instructions will be emulated in software if you say
1670           here, which has a severe performance impact. This is necessary for
1671           correct operation of some network protocols. With an IP-only
1672           configuration it is safe to say N, otherwise say Y.
1673
1674 config UACCESS_WITH_MEMCPY
1675         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1676         depends on MMU && EXPERIMENTAL
1677         default y if CPU_FEROCEON
1678         help
1679           Implement faster copy_to_user and clear_user methods for CPU
1680           cores where a 8-word STM instruction give significantly higher
1681           memory write throughput than a sequence of individual 32bit stores.
1682
1683           A possible side effect is a slight increase in scheduling latency
1684           between threads sharing the same address space if they invoke
1685           such copy operations with large buffers.
1686
1687           However, if the CPU data cache is using a write-allocate mode,
1688           this option is unlikely to provide any performance gain.
1689
1690 config SECCOMP
1691         bool
1692         prompt "Enable seccomp to safely compute untrusted bytecode"
1693         ---help---
1694           This kernel feature is useful for number crunching applications
1695           that may need to compute untrusted bytecode during their
1696           execution. By using pipes or other transports made available to
1697           the process as file descriptors supporting the read/write
1698           syscalls, it's possible to isolate those applications in
1699           their own address space using seccomp. Once seccomp is
1700           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1701           and the task is only allowed to execute a few safe syscalls
1702           defined by each seccomp mode.
1703
1704 config CC_STACKPROTECTOR
1705         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1706         depends on EXPERIMENTAL
1707         help
1708           This option turns on the -fstack-protector GCC feature. This
1709           feature puts, at the beginning of functions, a canary value on
1710           the stack just before the return address, and validates
1711           the value just before actually returning.  Stack based buffer
1712           overflows (that need to overwrite this return address) now also
1713           overwrite the canary, which gets detected and the attack is then
1714           neutralized via a kernel panic.
1715           This feature requires gcc version 4.2 or above.
1716
1717 config DEPRECATED_PARAM_STRUCT
1718         bool "Provide old way to pass kernel parameters"
1719         help
1720           This was deprecated in 2001 and announced to live on for 5 years.
1721           Some old boot loaders still use this way.
1722
1723 endmenu
1724
1725 menu "Boot options"
1726
1727 config USE_OF
1728         bool "Flattened Device Tree support"
1729         select OF
1730         select OF_EARLY_FLATTREE
1731         select IRQ_DOMAIN
1732         help
1733           Include support for flattened device tree machine descriptions.
1734
1735 # Compressed boot loader in ROM.  Yes, we really want to ask about
1736 # TEXT and BSS so we preserve their values in the config files.
1737 config ZBOOT_ROM_TEXT
1738         hex "Compressed ROM boot loader base address"
1739         default "0"
1740         help
1741           The physical address at which the ROM-able zImage is to be
1742           placed in the target.  Platforms which normally make use of
1743           ROM-able zImage formats normally set this to a suitable
1744           value in their defconfig file.
1745
1746           If ZBOOT_ROM is not enabled, this has no effect.
1747
1748 config ZBOOT_ROM_BSS
1749         hex "Compressed ROM boot loader BSS address"
1750         default "0"
1751         help
1752           The base address of an area of read/write memory in the target
1753           for the ROM-able zImage which must be available while the
1754           decompressor is running. It must be large enough to hold the
1755           entire decompressed kernel plus an additional 128 KiB.
1756           Platforms which normally make use of ROM-able zImage formats
1757           normally set this to a suitable value in their defconfig file.
1758
1759           If ZBOOT_ROM is not enabled, this has no effect.
1760
1761 config ZBOOT_ROM
1762         bool "Compressed boot loader in ROM/flash"
1763         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1764         help
1765           Say Y here if you intend to execute your compressed kernel image
1766           (zImage) directly from ROM or flash.  If unsure, say N.
1767
1768 choice
1769         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1770         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1771         default ZBOOT_ROM_NONE
1772         help
1773           Include experimental SD/MMC loading code in the ROM-able zImage.
1774           With this enabled it is possible to write the the ROM-able zImage
1775           kernel image to an MMC or SD card and boot the kernel straight
1776           from the reset vector. At reset the processor Mask ROM will load
1777           the first part of the the ROM-able zImage which in turn loads the
1778           rest the kernel image to RAM.
1779
1780 config ZBOOT_ROM_NONE
1781         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1782         help
1783           Do not load image from SD or MMC
1784
1785 config ZBOOT_ROM_MMCIF
1786         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1787         help
1788           Load image from MMCIF hardware block.
1789
1790 config ZBOOT_ROM_SH_MOBILE_SDHI
1791         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1792         help
1793           Load image from SDHI hardware block
1794
1795 endchoice
1796
1797 config CMDLINE
1798         string "Default kernel command string"
1799         default ""
1800         help
1801           On some architectures (EBSA110 and CATS), there is currently no way
1802           for the boot loader to pass arguments to the kernel. For these
1803           architectures, you should supply some command-line options at build
1804           time by entering them here. As a minimum, you should specify the
1805           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1806
1807 choice
1808         prompt "Kernel command line type" if CMDLINE != ""
1809         default CMDLINE_FROM_BOOTLOADER
1810
1811 config CMDLINE_FROM_BOOTLOADER
1812         bool "Use bootloader kernel arguments if available"
1813         help
1814           Uses the command-line options passed by the boot loader. If
1815           the boot loader doesn't provide any, the default kernel command
1816           string provided in CMDLINE will be used.
1817
1818 config CMDLINE_EXTEND
1819         bool "Extend bootloader kernel arguments"
1820         help
1821           The command-line arguments provided by the boot loader will be
1822           appended to the default kernel command string.
1823
1824 config CMDLINE_FORCE
1825         bool "Always use the default kernel command string"
1826         help
1827           Always use the default kernel command string, even if the boot
1828           loader passes other arguments to the kernel.
1829           This is useful if you cannot or don't want to change the
1830           command-line options your boot loader passes to the kernel.
1831 endchoice
1832
1833 config XIP_KERNEL
1834         bool "Kernel Execute-In-Place from ROM"
1835         depends on !ZBOOT_ROM
1836         help
1837           Execute-In-Place allows the kernel to run from non-volatile storage
1838           directly addressable by the CPU, such as NOR flash. This saves RAM
1839           space since the text section of the kernel is not loaded from flash
1840           to RAM.  Read-write sections, such as the data section and stack,
1841           are still copied to RAM.  The XIP kernel is not compressed since
1842           it has to run directly from flash, so it will take more space to
1843           store it.  The flash address used to link the kernel object files,
1844           and for storing it, is configuration dependent. Therefore, if you
1845           say Y here, you must know the proper physical address where to
1846           store the kernel image depending on your own flash memory usage.
1847
1848           Also note that the make target becomes "make xipImage" rather than
1849           "make zImage" or "make Image".  The final kernel binary to put in
1850           ROM memory will be arch/arm/boot/xipImage.
1851
1852           If unsure, say N.
1853
1854 config XIP_PHYS_ADDR
1855         hex "XIP Kernel Physical Location"
1856         depends on XIP_KERNEL
1857         default "0x00080000"
1858         help
1859           This is the physical address in your flash memory the kernel will
1860           be linked for and stored to.  This address is dependent on your
1861           own flash usage.
1862
1863 config KEXEC
1864         bool "Kexec system call (EXPERIMENTAL)"
1865         depends on EXPERIMENTAL
1866         help
1867           kexec is a system call that implements the ability to shutdown your
1868           current kernel, and to start another kernel.  It is like a reboot
1869           but it is independent of the system firmware.   And like a reboot
1870           you can start any kernel with it, not just Linux.
1871
1872           It is an ongoing process to be certain the hardware in a machine
1873           is properly shutdown, so do not be surprised if this code does not
1874           initially work for you.  It may help to enable device hotplugging
1875           support.
1876
1877 config ATAGS_PROC
1878         bool "Export atags in procfs"
1879         depends on KEXEC
1880         default y
1881         help
1882           Should the atags used to boot the kernel be exported in an "atags"
1883           file in procfs. Useful with kexec.
1884
1885 config CRASH_DUMP
1886         bool "Build kdump crash kernel (EXPERIMENTAL)"
1887         depends on EXPERIMENTAL
1888         help
1889           Generate crash dump after being started by kexec. This should
1890           be normally only set in special crash dump kernels which are
1891           loaded in the main kernel with kexec-tools into a specially
1892           reserved region and then later executed after a crash by
1893           kdump/kexec. The crash dump kernel must be compiled to a
1894           memory address not used by the main kernel
1895
1896           For more details see Documentation/kdump/kdump.txt
1897
1898 config AUTO_ZRELADDR
1899         bool "Auto calculation of the decompressed kernel image address"
1900         depends on !ZBOOT_ROM && !ARCH_U300
1901         help
1902           ZRELADDR is the physical address where the decompressed kernel
1903           image will be placed. If AUTO_ZRELADDR is selected, the address
1904           will be determined at run-time by masking the current IP with
1905           0xf8000000. This assumes the zImage being placed in the first 128MB
1906           from start of memory.
1907
1908 endmenu
1909
1910 menu "CPU Power Management"
1911
1912 if ARCH_HAS_CPUFREQ
1913
1914 source "drivers/cpufreq/Kconfig"
1915
1916 config CPU_FREQ_IMX
1917         tristate "CPUfreq driver for i.MX CPUs"
1918         depends on ARCH_MXC && CPU_FREQ
1919         help
1920           This enables the CPUfreq driver for i.MX CPUs.
1921
1922 config CPU_FREQ_SA1100
1923         bool
1924
1925 config CPU_FREQ_SA1110
1926         bool
1927
1928 config CPU_FREQ_INTEGRATOR
1929         tristate "CPUfreq driver for ARM Integrator CPUs"
1930         depends on ARCH_INTEGRATOR && CPU_FREQ
1931         default y
1932         help
1933           This enables the CPUfreq driver for ARM Integrator CPUs.
1934
1935           For details, take a look at <file:Documentation/cpu-freq>.
1936
1937           If in doubt, say Y.
1938
1939 config CPU_FREQ_PXA
1940         bool
1941         depends on CPU_FREQ && ARCH_PXA && PXA25x
1942         default y
1943         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1944
1945 config CPU_FREQ_S3C
1946         bool
1947         help
1948           Internal configuration node for common cpufreq on Samsung SoC
1949
1950 config CPU_FREQ_S3C24XX
1951         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1952         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1953         select CPU_FREQ_S3C
1954         help
1955           This enables the CPUfreq driver for the Samsung S3C24XX family
1956           of CPUs.
1957
1958           For details, take a look at <file:Documentation/cpu-freq>.
1959
1960           If in doubt, say N.
1961
1962 config CPU_FREQ_S3C24XX_PLL
1963         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1964         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1965         help
1966           Compile in support for changing the PLL frequency from the
1967           S3C24XX series CPUfreq driver. The PLL takes time to settle
1968           after a frequency change, so by default it is not enabled.
1969
1970           This also means that the PLL tables for the selected CPU(s) will
1971           be built which may increase the size of the kernel image.
1972
1973 config CPU_FREQ_S3C24XX_DEBUG
1974         bool "Debug CPUfreq Samsung driver core"
1975         depends on CPU_FREQ_S3C24XX
1976         help
1977           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1978
1979 config CPU_FREQ_S3C24XX_IODEBUG
1980         bool "Debug CPUfreq Samsung driver IO timing"
1981         depends on CPU_FREQ_S3C24XX
1982         help
1983           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1984
1985 config CPU_FREQ_S3C24XX_DEBUGFS
1986         bool "Export debugfs for CPUFreq"
1987         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1988         help
1989           Export status information via debugfs.
1990
1991 endif
1992
1993 source "drivers/cpuidle/Kconfig"
1994
1995 endmenu
1996
1997 menu "Floating point emulation"
1998
1999 comment "At least one emulation must be selected"
2000
2001 config FPE_NWFPE
2002         bool "NWFPE math emulation"
2003         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2004         ---help---
2005           Say Y to include the NWFPE floating point emulator in the kernel.
2006           This is necessary to run most binaries. Linux does not currently
2007           support floating point hardware so you need to say Y here even if
2008           your machine has an FPA or floating point co-processor podule.
2009
2010           You may say N here if you are going to load the Acorn FPEmulator
2011           early in the bootup.
2012
2013 config FPE_NWFPE_XP
2014         bool "Support extended precision"
2015         depends on FPE_NWFPE
2016         help
2017           Say Y to include 80-bit support in the kernel floating-point
2018           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2019           Note that gcc does not generate 80-bit operations by default,
2020           so in most cases this option only enlarges the size of the
2021           floating point emulator without any good reason.
2022
2023           You almost surely want to say N here.
2024
2025 config FPE_FASTFPE
2026         bool "FastFPE math emulation (EXPERIMENTAL)"
2027         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2028         ---help---
2029           Say Y here to include the FAST floating point emulator in the kernel.
2030           This is an experimental much faster emulator which now also has full
2031           precision for the mantissa.  It does not support any exceptions.
2032           It is very simple, and approximately 3-6 times faster than NWFPE.
2033
2034           It should be sufficient for most programs.  It may be not suitable
2035           for scientific calculations, but you have to check this for yourself.
2036           If you do not feel you need a faster FP emulation you should better
2037           choose NWFPE.
2038
2039 config VFP
2040         bool "VFP-format floating point maths"
2041         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2042         help
2043           Say Y to include VFP support code in the kernel. This is needed
2044           if your hardware includes a VFP unit.
2045
2046           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2047           release notes and additional status information.
2048
2049           Say N if your target does not have VFP hardware.
2050
2051 config VFPv3
2052         bool
2053         depends on VFP
2054         default y if CPU_V7
2055
2056 config NEON
2057         bool "Advanced SIMD (NEON) Extension support"
2058         depends on VFPv3 && CPU_V7
2059         help
2060           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2061           Extension.
2062
2063 endmenu
2064
2065 menu "Userspace binary formats"
2066
2067 source "fs/Kconfig.binfmt"
2068
2069 config ARTHUR
2070         tristate "RISC OS personality"
2071         depends on !AEABI
2072         help
2073           Say Y here to include the kernel code necessary if you want to run
2074           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2075           experimental; if this sounds frightening, say N and sleep in peace.
2076           You can also say M here to compile this support as a module (which
2077           will be called arthur).
2078
2079 endmenu
2080
2081 menu "Power management options"
2082
2083 source "kernel/power/Kconfig"
2084
2085 config ARCH_SUSPEND_POSSIBLE
2086         depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2087         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2088                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2089         def_bool y
2090
2091 endmenu
2092
2093 source "net/Kconfig"
2094
2095 source "drivers/Kconfig"
2096
2097 source "fs/Kconfig"
2098
2099 source "arch/arm/Kconfig.debug"
2100
2101 source "security/Kconfig"
2102
2103 source "crypto/Kconfig"
2104
2105 source "lib/Kconfig"