ARM: mach-kirkwood: remove mach/memory.h
[deliverable/linux.git] / arch / arm / Kconfig
1 config ARM
2 bool
3 default y
4 select HAVE_AOUT
5 select HAVE_DMA_API_DEBUG
6 select HAVE_IDE
7 select HAVE_MEMBLOCK
8 select RTC_LIB
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_ARCH_KGDB
13 select HAVE_KPROBES if !XIP_KERNEL
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
23 select HAVE_IRQ_WORK
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
32 help
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
39
40 config ARM_HAS_SG_CHAIN
41 bool
42
43 config HAVE_PWM
44 bool
45
46 config MIGHT_HAVE_PCI
47 bool
48
49 config SYS_SUPPORTS_APM_EMULATION
50 bool
51
52 config HAVE_SCHED_CLOCK
53 bool
54
55 config GENERIC_GPIO
56 bool
57
58 config ARCH_USES_GETTIMEOFFSET
59 bool
60 default n
61
62 config GENERIC_CLOCKEVENTS
63 bool
64
65 config GENERIC_CLOCKEVENTS_BROADCAST
66 bool
67 depends on GENERIC_CLOCKEVENTS
68 default y if SMP
69
70 config KTIME_SCALAR
71 bool
72 default y
73
74 config HAVE_TCM
75 bool
76 select GENERIC_ALLOCATOR
77
78 config HAVE_PROC_CPU
79 bool
80
81 config NO_IOPORT
82 bool
83
84 config EISA
85 bool
86 ---help---
87 The Extended Industry Standard Architecture (EISA) bus was
88 developed as an open alternative to the IBM MicroChannel bus.
89
90 The EISA bus provided some of the features of the IBM MicroChannel
91 bus while maintaining backward compatibility with cards made for
92 the older ISA bus. The EISA bus saw limited use between 1988 and
93 1995 when it was made obsolete by the PCI bus.
94
95 Say Y here if you are building a kernel for an EISA-based machine.
96
97 Otherwise, say N.
98
99 config SBUS
100 bool
101
102 config MCA
103 bool
104 help
105 MicroChannel Architecture is found in some IBM PS/2 machines and
106 laptops. It is a bus system similar to PCI or ISA. See
107 <file:Documentation/mca.txt> (and especially the web page given
108 there) before attempting to build an MCA bus kernel.
109
110 config STACKTRACE_SUPPORT
111 bool
112 default y
113
114 config HAVE_LATENCYTOP_SUPPORT
115 bool
116 depends on !SMP
117 default y
118
119 config LOCKDEP_SUPPORT
120 bool
121 default y
122
123 config TRACE_IRQFLAGS_SUPPORT
124 bool
125 default y
126
127 config HARDIRQS_SW_RESEND
128 bool
129 default y
130
131 config GENERIC_IRQ_PROBE
132 bool
133 default y
134
135 config GENERIC_LOCKBREAK
136 bool
137 default y
138 depends on SMP && PREEMPT
139
140 config RWSEM_GENERIC_SPINLOCK
141 bool
142 default y
143
144 config RWSEM_XCHGADD_ALGORITHM
145 bool
146
147 config ARCH_HAS_ILOG2_U32
148 bool
149
150 config ARCH_HAS_ILOG2_U64
151 bool
152
153 config ARCH_HAS_CPUFREQ
154 bool
155 help
156 Internal node to signify that the ARCH has CPUFREQ support
157 and that the relevant menu configurations are displayed for
158 it.
159
160 config ARCH_HAS_CPU_IDLE_WAIT
161 def_bool y
162
163 config GENERIC_HWEIGHT
164 bool
165 default y
166
167 config GENERIC_CALIBRATE_DELAY
168 bool
169 default y
170
171 config ARCH_MAY_HAVE_PC_FDC
172 bool
173
174 config ZONE_DMA
175 bool
176
177 config NEED_DMA_MAP_STATE
178 def_bool y
179
180 config GENERIC_ISA_DMA
181 bool
182
183 config FIQ
184 bool
185
186 config ARCH_MTD_XIP
187 bool
188
189 config VECTORS_BASE
190 hex
191 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
192 default DRAM_BASE if REMAP_VECTORS_TO_RAM
193 default 0x00000000
194 help
195 The base address of exception vectors.
196
197 config ARM_PATCH_PHYS_VIRT
198 bool "Patch physical to virtual translations at runtime" if EMBEDDED
199 default y
200 depends on !XIP_KERNEL && MMU
201 depends on !ARCH_REALVIEW || !SPARSEMEM
202 help
203 Patch phys-to-virt and virt-to-phys translation functions at
204 boot and module load time according to the position of the
205 kernel in system memory.
206
207 This can only be used with non-XIP MMU kernels where the base
208 of physical memory is at a 16MB boundary.
209
210 Only disable this option if you know that you do not require
211 this feature (eg, building a kernel for a single machine) and
212 you need to shrink the kernel to the minimal size.
213
214 config NO_MACH_MEMORY_H
215 bool
216 help
217 Select this when mach/memory.h is removed.
218
219 config PHYS_OFFSET
220 hex "Physical address of main memory"
221 depends on !ARM_PATCH_PHYS_VIRT && NO_MACH_MEMORY_H
222 help
223 Please provide the physical address corresponding to the
224 location of main memory in your system.
225
226 source "init/Kconfig"
227
228 source "kernel/Kconfig.freezer"
229
230 menu "System Type"
231
232 config MMU
233 bool "MMU-based Paged Memory Management Support"
234 default y
235 help
236 Select if you want MMU-based virtualised addressing space
237 support by paged memory management. If unsure, say 'Y'.
238
239 #
240 # The "ARM system type" choice list is ordered alphabetically by option
241 # text. Please add new entries in the option alphabetic order.
242 #
243 choice
244 prompt "ARM system type"
245 default ARCH_VERSATILE
246
247 config ARCH_INTEGRATOR
248 bool "ARM Ltd. Integrator family"
249 select ARM_AMBA
250 select ARCH_HAS_CPUFREQ
251 select CLKDEV_LOOKUP
252 select HAVE_MACH_CLKDEV
253 select ICST
254 select GENERIC_CLOCKEVENTS
255 select PLAT_VERSATILE
256 select PLAT_VERSATILE_FPGA_IRQ
257 help
258 Support for ARM's Integrator platform.
259
260 config ARCH_REALVIEW
261 bool "ARM Ltd. RealView family"
262 select ARM_AMBA
263 select CLKDEV_LOOKUP
264 select HAVE_MACH_CLKDEV
265 select ICST
266 select GENERIC_CLOCKEVENTS
267 select ARCH_WANT_OPTIONAL_GPIOLIB
268 select PLAT_VERSATILE
269 select PLAT_VERSATILE_CLCD
270 select ARM_TIMER_SP804
271 select GPIO_PL061 if GPIOLIB
272 help
273 This enables support for ARM Ltd RealView boards.
274
275 config ARCH_VERSATILE
276 bool "ARM Ltd. Versatile family"
277 select ARM_AMBA
278 select ARM_VIC
279 select CLKDEV_LOOKUP
280 select HAVE_MACH_CLKDEV
281 select ICST
282 select GENERIC_CLOCKEVENTS
283 select ARCH_WANT_OPTIONAL_GPIOLIB
284 select PLAT_VERSATILE
285 select PLAT_VERSATILE_CLCD
286 select PLAT_VERSATILE_FPGA_IRQ
287 select ARM_TIMER_SP804
288 help
289 This enables support for ARM Ltd Versatile board.
290
291 config ARCH_VEXPRESS
292 bool "ARM Ltd. Versatile Express family"
293 select ARCH_WANT_OPTIONAL_GPIOLIB
294 select ARM_AMBA
295 select ARM_TIMER_SP804
296 select CLKDEV_LOOKUP
297 select HAVE_MACH_CLKDEV
298 select GENERIC_CLOCKEVENTS
299 select HAVE_CLK
300 select HAVE_PATA_PLATFORM
301 select ICST
302 select PLAT_VERSATILE
303 select PLAT_VERSATILE_CLCD
304 help
305 This enables support for the ARM Ltd Versatile Express boards.
306
307 config ARCH_AT91
308 bool "Atmel AT91"
309 select ARCH_REQUIRE_GPIOLIB
310 select HAVE_CLK
311 select CLKDEV_LOOKUP
312 help
313 This enables support for systems based on the Atmel AT91RM9200,
314 AT91SAM9 and AT91CAP9 processors.
315
316 config ARCH_BCMRING
317 bool "Broadcom BCMRING"
318 depends on MMU
319 select CPU_V6
320 select ARM_AMBA
321 select ARM_TIMER_SP804
322 select CLKDEV_LOOKUP
323 select GENERIC_CLOCKEVENTS
324 select ARCH_WANT_OPTIONAL_GPIOLIB
325 help
326 Support for Broadcom's BCMRing platform.
327
328 config ARCH_CLPS711X
329 bool "Cirrus Logic CLPS711x/EP721x-based"
330 select CPU_ARM720T
331 select ARCH_USES_GETTIMEOFFSET
332 help
333 Support for Cirrus Logic 711x/721x based boards.
334
335 config ARCH_CNS3XXX
336 bool "Cavium Networks CNS3XXX family"
337 select CPU_V6K
338 select GENERIC_CLOCKEVENTS
339 select ARM_GIC
340 select MIGHT_HAVE_PCI
341 select PCI_DOMAINS if PCI
342 help
343 Support for Cavium Networks CNS3XXX platform.
344
345 config ARCH_GEMINI
346 bool "Cortina Systems Gemini"
347 select CPU_FA526
348 select ARCH_REQUIRE_GPIOLIB
349 select ARCH_USES_GETTIMEOFFSET
350 help
351 Support for the Cortina Systems Gemini family SoCs
352
353 config ARCH_PRIMA2
354 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
355 select CPU_V7
356 select GENERIC_TIME
357 select NO_IOPORT
358 select GENERIC_CLOCKEVENTS
359 select CLKDEV_LOOKUP
360 select GENERIC_IRQ_CHIP
361 select USE_OF
362 select ZONE_DMA
363 help
364 Support for CSR SiRFSoC ARM Cortex A9 Platform
365
366 config ARCH_EBSA110
367 bool "EBSA-110"
368 select CPU_SA110
369 select ISA
370 select NO_IOPORT
371 select ARCH_USES_GETTIMEOFFSET
372 help
373 This is an evaluation board for the StrongARM processor available
374 from Digital. It has limited hardware on-board, including an
375 Ethernet interface, two PCMCIA sockets, two serial ports and a
376 parallel port.
377
378 config ARCH_EP93XX
379 bool "EP93xx-based"
380 select CPU_ARM920T
381 select ARM_AMBA
382 select ARM_VIC
383 select CLKDEV_LOOKUP
384 select ARCH_REQUIRE_GPIOLIB
385 select ARCH_HAS_HOLES_MEMORYMODEL
386 select ARCH_USES_GETTIMEOFFSET
387 help
388 This enables support for the Cirrus EP93xx series of CPUs.
389
390 config ARCH_FOOTBRIDGE
391 bool "FootBridge"
392 select CPU_SA110
393 select FOOTBRIDGE
394 select GENERIC_CLOCKEVENTS
395 help
396 Support for systems based on the DC21285 companion chip
397 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
398
399 config ARCH_MXC
400 bool "Freescale MXC/iMX-based"
401 select GENERIC_CLOCKEVENTS
402 select ARCH_REQUIRE_GPIOLIB
403 select CLKDEV_LOOKUP
404 select CLKSRC_MMIO
405 select GENERIC_IRQ_CHIP
406 select HAVE_SCHED_CLOCK
407 help
408 Support for Freescale MXC/iMX-based family of processors
409
410 config ARCH_MXS
411 bool "Freescale MXS-based"
412 select GENERIC_CLOCKEVENTS
413 select ARCH_REQUIRE_GPIOLIB
414 select CLKDEV_LOOKUP
415 select CLKSRC_MMIO
416 help
417 Support for Freescale MXS-based family of processors
418
419 config ARCH_NETX
420 bool "Hilscher NetX based"
421 select CLKSRC_MMIO
422 select CPU_ARM926T
423 select ARM_VIC
424 select GENERIC_CLOCKEVENTS
425 help
426 This enables support for systems based on the Hilscher NetX Soc
427
428 config ARCH_H720X
429 bool "Hynix HMS720x-based"
430 select CPU_ARM720T
431 select ISA_DMA_API
432 select ARCH_USES_GETTIMEOFFSET
433 help
434 This enables support for systems based on the Hynix HMS720x
435
436 config ARCH_IOP13XX
437 bool "IOP13xx-based"
438 depends on MMU
439 select CPU_XSC3
440 select PLAT_IOP
441 select PCI
442 select ARCH_SUPPORTS_MSI
443 select VMSPLIT_1G
444 help
445 Support for Intel's IOP13XX (XScale) family of processors.
446
447 config ARCH_IOP32X
448 bool "IOP32x-based"
449 depends on MMU
450 select CPU_XSCALE
451 select PLAT_IOP
452 select PCI
453 select ARCH_REQUIRE_GPIOLIB
454 help
455 Support for Intel's 80219 and IOP32X (XScale) family of
456 processors.
457
458 config ARCH_IOP33X
459 bool "IOP33x-based"
460 depends on MMU
461 select CPU_XSCALE
462 select PLAT_IOP
463 select PCI
464 select ARCH_REQUIRE_GPIOLIB
465 help
466 Support for Intel's IOP33X (XScale) family of processors.
467
468 config ARCH_IXP23XX
469 bool "IXP23XX-based"
470 depends on MMU
471 select CPU_XSC3
472 select PCI
473 select ARCH_USES_GETTIMEOFFSET
474 help
475 Support for Intel's IXP23xx (XScale) family of processors.
476
477 config ARCH_IXP2000
478 bool "IXP2400/2800-based"
479 depends on MMU
480 select CPU_XSCALE
481 select PCI
482 select ARCH_USES_GETTIMEOFFSET
483 help
484 Support for Intel's IXP2400/2800 (XScale) family of processors.
485
486 config ARCH_IXP4XX
487 bool "IXP4xx-based"
488 depends on MMU
489 select CLKSRC_MMIO
490 select CPU_XSCALE
491 select GENERIC_GPIO
492 select GENERIC_CLOCKEVENTS
493 select HAVE_SCHED_CLOCK
494 select MIGHT_HAVE_PCI
495 select DMABOUNCE if PCI
496 help
497 Support for Intel's IXP4XX (XScale) family of processors.
498
499 config ARCH_DOVE
500 bool "Marvell Dove"
501 select CPU_V7
502 select PCI
503 select ARCH_REQUIRE_GPIOLIB
504 select GENERIC_CLOCKEVENTS
505 select PLAT_ORION
506 select NO_MACH_MEMORY_H
507 help
508 Support for the Marvell Dove SoC 88AP510
509
510 config ARCH_KIRKWOOD
511 bool "Marvell Kirkwood"
512 select CPU_FEROCEON
513 select PCI
514 select ARCH_REQUIRE_GPIOLIB
515 select GENERIC_CLOCKEVENTS
516 select PLAT_ORION
517 select NO_MACH_MEMORY_H
518 help
519 Support for the following Marvell Kirkwood series SoCs:
520 88F6180, 88F6192 and 88F6281.
521
522 config ARCH_LPC32XX
523 bool "NXP LPC32XX"
524 select CLKSRC_MMIO
525 select CPU_ARM926T
526 select ARCH_REQUIRE_GPIOLIB
527 select HAVE_IDE
528 select ARM_AMBA
529 select USB_ARCH_HAS_OHCI
530 select CLKDEV_LOOKUP
531 select GENERIC_TIME
532 select GENERIC_CLOCKEVENTS
533 help
534 Support for the NXP LPC32XX family of processors
535
536 config ARCH_MV78XX0
537 bool "Marvell MV78xx0"
538 select CPU_FEROCEON
539 select PCI
540 select ARCH_REQUIRE_GPIOLIB
541 select GENERIC_CLOCKEVENTS
542 select PLAT_ORION
543 help
544 Support for the following Marvell MV78xx0 series SoCs:
545 MV781x0, MV782x0.
546
547 config ARCH_ORION5X
548 bool "Marvell Orion"
549 depends on MMU
550 select CPU_FEROCEON
551 select PCI
552 select ARCH_REQUIRE_GPIOLIB
553 select GENERIC_CLOCKEVENTS
554 select PLAT_ORION
555 help
556 Support for the following Marvell Orion 5x series SoCs:
557 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
558 Orion-2 (5281), Orion-1-90 (6183).
559
560 config ARCH_MMP
561 bool "Marvell PXA168/910/MMP2"
562 depends on MMU
563 select ARCH_REQUIRE_GPIOLIB
564 select CLKDEV_LOOKUP
565 select GENERIC_CLOCKEVENTS
566 select HAVE_SCHED_CLOCK
567 select TICK_ONESHOT
568 select PLAT_PXA
569 select SPARSE_IRQ
570 help
571 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
572
573 config ARCH_KS8695
574 bool "Micrel/Kendin KS8695"
575 select CPU_ARM922T
576 select ARCH_REQUIRE_GPIOLIB
577 select ARCH_USES_GETTIMEOFFSET
578 help
579 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
580 System-on-Chip devices.
581
582 config ARCH_W90X900
583 bool "Nuvoton W90X900 CPU"
584 select CPU_ARM926T
585 select ARCH_REQUIRE_GPIOLIB
586 select CLKDEV_LOOKUP
587 select CLKSRC_MMIO
588 select GENERIC_CLOCKEVENTS
589 help
590 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
591 At present, the w90x900 has been renamed nuc900, regarding
592 the ARM series product line, you can login the following
593 link address to know more.
594
595 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
596 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
597
598 config ARCH_NUC93X
599 bool "Nuvoton NUC93X CPU"
600 select CPU_ARM926T
601 select CLKDEV_LOOKUP
602 help
603 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
604 low-power and high performance MPEG-4/JPEG multimedia controller chip.
605
606 config ARCH_TEGRA
607 bool "NVIDIA Tegra"
608 select CLKDEV_LOOKUP
609 select CLKSRC_MMIO
610 select GENERIC_TIME
611 select GENERIC_CLOCKEVENTS
612 select GENERIC_GPIO
613 select HAVE_CLK
614 select HAVE_SCHED_CLOCK
615 select ARCH_HAS_CPUFREQ
616 help
617 This enables support for NVIDIA Tegra based systems (Tegra APX,
618 Tegra 6xx and Tegra 2 series).
619
620 config ARCH_PNX4008
621 bool "Philips Nexperia PNX4008 Mobile"
622 select CPU_ARM926T
623 select CLKDEV_LOOKUP
624 select ARCH_USES_GETTIMEOFFSET
625 help
626 This enables support for Philips PNX4008 mobile platform.
627
628 config ARCH_PXA
629 bool "PXA2xx/PXA3xx-based"
630 depends on MMU
631 select ARCH_MTD_XIP
632 select ARCH_HAS_CPUFREQ
633 select CLKDEV_LOOKUP
634 select CLKSRC_MMIO
635 select ARCH_REQUIRE_GPIOLIB
636 select GENERIC_CLOCKEVENTS
637 select HAVE_SCHED_CLOCK
638 select TICK_ONESHOT
639 select PLAT_PXA
640 select SPARSE_IRQ
641 select AUTO_ZRELADDR
642 select MULTI_IRQ_HANDLER
643 help
644 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
645
646 config ARCH_MSM
647 bool "Qualcomm MSM"
648 select HAVE_CLK
649 select GENERIC_CLOCKEVENTS
650 select ARCH_REQUIRE_GPIOLIB
651 select CLKDEV_LOOKUP
652 help
653 Support for Qualcomm MSM/QSD based systems. This runs on the
654 apps processor of the MSM/QSD and depends on a shared memory
655 interface to the modem processor which runs the baseband
656 stack and controls some vital subsystems
657 (clock and power control, etc).
658
659 config ARCH_SHMOBILE
660 bool "Renesas SH-Mobile / R-Mobile"
661 select HAVE_CLK
662 select CLKDEV_LOOKUP
663 select HAVE_MACH_CLKDEV
664 select GENERIC_CLOCKEVENTS
665 select NO_IOPORT
666 select SPARSE_IRQ
667 select MULTI_IRQ_HANDLER
668 select PM_GENERIC_DOMAINS if PM
669 help
670 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
671
672 config ARCH_RPC
673 bool "RiscPC"
674 select ARCH_ACORN
675 select FIQ
676 select TIMER_ACORN
677 select ARCH_MAY_HAVE_PC_FDC
678 select HAVE_PATA_PLATFORM
679 select ISA_DMA_API
680 select NO_IOPORT
681 select ARCH_SPARSEMEM_ENABLE
682 select ARCH_USES_GETTIMEOFFSET
683 help
684 On the Acorn Risc-PC, Linux can support the internal IDE disk and
685 CD-ROM interface, serial and parallel port, and the floppy drive.
686
687 config ARCH_SA1100
688 bool "SA1100-based"
689 select CLKSRC_MMIO
690 select CPU_SA1100
691 select ISA
692 select ARCH_SPARSEMEM_ENABLE
693 select ARCH_MTD_XIP
694 select ARCH_HAS_CPUFREQ
695 select CPU_FREQ
696 select GENERIC_CLOCKEVENTS
697 select HAVE_CLK
698 select HAVE_SCHED_CLOCK
699 select TICK_ONESHOT
700 select ARCH_REQUIRE_GPIOLIB
701 help
702 Support for StrongARM 11x0 based boards.
703
704 config ARCH_S3C2410
705 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
706 select GENERIC_GPIO
707 select ARCH_HAS_CPUFREQ
708 select HAVE_CLK
709 select CLKDEV_LOOKUP
710 select ARCH_USES_GETTIMEOFFSET
711 select HAVE_S3C2410_I2C if I2C
712 help
713 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
714 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
715 the Samsung SMDK2410 development board (and derivatives).
716
717 Note, the S3C2416 and the S3C2450 are so close that they even share
718 the same SoC ID code. This means that there is no separate machine
719 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
720
721 config ARCH_S3C64XX
722 bool "Samsung S3C64XX"
723 select PLAT_SAMSUNG
724 select CPU_V6
725 select ARM_VIC
726 select HAVE_CLK
727 select CLKDEV_LOOKUP
728 select NO_IOPORT
729 select ARCH_USES_GETTIMEOFFSET
730 select ARCH_HAS_CPUFREQ
731 select ARCH_REQUIRE_GPIOLIB
732 select SAMSUNG_CLKSRC
733 select SAMSUNG_IRQ_VIC_TIMER
734 select SAMSUNG_IRQ_UART
735 select S3C_GPIO_TRACK
736 select S3C_GPIO_PULL_UPDOWN
737 select S3C_GPIO_CFG_S3C24XX
738 select S3C_GPIO_CFG_S3C64XX
739 select S3C_DEV_NAND
740 select USB_ARCH_HAS_OHCI
741 select SAMSUNG_GPIOLIB_4BIT
742 select HAVE_S3C2410_I2C if I2C
743 select HAVE_S3C2410_WATCHDOG if WATCHDOG
744 help
745 Samsung S3C64XX series based systems
746
747 config ARCH_S5P64X0
748 bool "Samsung S5P6440 S5P6450"
749 select CPU_V6
750 select GENERIC_GPIO
751 select HAVE_CLK
752 select CLKDEV_LOOKUP
753 select CLKSRC_MMIO
754 select HAVE_S3C2410_WATCHDOG if WATCHDOG
755 select GENERIC_CLOCKEVENTS
756 select HAVE_SCHED_CLOCK
757 select HAVE_S3C2410_I2C if I2C
758 select HAVE_S3C_RTC if RTC_CLASS
759 help
760 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
761 SMDK6450.
762
763 config ARCH_S5PC100
764 bool "Samsung S5PC100"
765 select GENERIC_GPIO
766 select HAVE_CLK
767 select CLKDEV_LOOKUP
768 select CPU_V7
769 select ARM_L1_CACHE_SHIFT_6
770 select ARCH_USES_GETTIMEOFFSET
771 select HAVE_S3C2410_I2C if I2C
772 select HAVE_S3C_RTC if RTC_CLASS
773 select HAVE_S3C2410_WATCHDOG if WATCHDOG
774 help
775 Samsung S5PC100 series based systems
776
777 config ARCH_S5PV210
778 bool "Samsung S5PV210/S5PC110"
779 select CPU_V7
780 select ARCH_SPARSEMEM_ENABLE
781 select ARCH_HAS_HOLES_MEMORYMODEL
782 select GENERIC_GPIO
783 select HAVE_CLK
784 select CLKDEV_LOOKUP
785 select CLKSRC_MMIO
786 select ARM_L1_CACHE_SHIFT_6
787 select ARCH_HAS_CPUFREQ
788 select GENERIC_CLOCKEVENTS
789 select HAVE_SCHED_CLOCK
790 select HAVE_S3C2410_I2C if I2C
791 select HAVE_S3C_RTC if RTC_CLASS
792 select HAVE_S3C2410_WATCHDOG if WATCHDOG
793 help
794 Samsung S5PV210/S5PC110 series based systems
795
796 config ARCH_EXYNOS4
797 bool "Samsung EXYNOS4"
798 select CPU_V7
799 select ARCH_SPARSEMEM_ENABLE
800 select ARCH_HAS_HOLES_MEMORYMODEL
801 select GENERIC_GPIO
802 select HAVE_CLK
803 select CLKDEV_LOOKUP
804 select ARCH_HAS_CPUFREQ
805 select GENERIC_CLOCKEVENTS
806 select HAVE_S3C_RTC if RTC_CLASS
807 select HAVE_S3C2410_I2C if I2C
808 select HAVE_S3C2410_WATCHDOG if WATCHDOG
809 help
810 Samsung EXYNOS4 series based systems
811
812 config ARCH_SHARK
813 bool "Shark"
814 select CPU_SA110
815 select ISA
816 select ISA_DMA
817 select ZONE_DMA
818 select PCI
819 select ARCH_USES_GETTIMEOFFSET
820 help
821 Support for the StrongARM based Digital DNARD machine, also known
822 as "Shark" (<http://www.shark-linux.de/shark.html>).
823
824 config ARCH_TCC_926
825 bool "Telechips TCC ARM926-based systems"
826 select CLKSRC_MMIO
827 select CPU_ARM926T
828 select HAVE_CLK
829 select CLKDEV_LOOKUP
830 select GENERIC_CLOCKEVENTS
831 help
832 Support for Telechips TCC ARM926-based systems.
833
834 config ARCH_U300
835 bool "ST-Ericsson U300 Series"
836 depends on MMU
837 select CLKSRC_MMIO
838 select CPU_ARM926T
839 select HAVE_SCHED_CLOCK
840 select HAVE_TCM
841 select ARM_AMBA
842 select ARM_VIC
843 select GENERIC_CLOCKEVENTS
844 select CLKDEV_LOOKUP
845 select HAVE_MACH_CLKDEV
846 select GENERIC_GPIO
847 help
848 Support for ST-Ericsson U300 series mobile platforms.
849
850 config ARCH_U8500
851 bool "ST-Ericsson U8500 Series"
852 select CPU_V7
853 select ARM_AMBA
854 select GENERIC_CLOCKEVENTS
855 select CLKDEV_LOOKUP
856 select ARCH_REQUIRE_GPIOLIB
857 select ARCH_HAS_CPUFREQ
858 help
859 Support for ST-Ericsson's Ux500 architecture
860
861 config ARCH_NOMADIK
862 bool "STMicroelectronics Nomadik"
863 select ARM_AMBA
864 select ARM_VIC
865 select CPU_ARM926T
866 select CLKDEV_LOOKUP
867 select GENERIC_CLOCKEVENTS
868 select ARCH_REQUIRE_GPIOLIB
869 help
870 Support for the Nomadik platform by ST-Ericsson
871
872 config ARCH_DAVINCI
873 bool "TI DaVinci"
874 select GENERIC_CLOCKEVENTS
875 select ARCH_REQUIRE_GPIOLIB
876 select ZONE_DMA
877 select HAVE_IDE
878 select CLKDEV_LOOKUP
879 select GENERIC_ALLOCATOR
880 select GENERIC_IRQ_CHIP
881 select ARCH_HAS_HOLES_MEMORYMODEL
882 help
883 Support for TI's DaVinci platform.
884
885 config ARCH_OMAP
886 bool "TI OMAP"
887 select HAVE_CLK
888 select ARCH_REQUIRE_GPIOLIB
889 select ARCH_HAS_CPUFREQ
890 select CLKSRC_MMIO
891 select GENERIC_CLOCKEVENTS
892 select HAVE_SCHED_CLOCK
893 select ARCH_HAS_HOLES_MEMORYMODEL
894 help
895 Support for TI's OMAP platform (OMAP1/2/3/4).
896
897 config PLAT_SPEAR
898 bool "ST SPEAr"
899 select ARM_AMBA
900 select ARCH_REQUIRE_GPIOLIB
901 select CLKDEV_LOOKUP
902 select CLKSRC_MMIO
903 select GENERIC_CLOCKEVENTS
904 select HAVE_CLK
905 help
906 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
907
908 config ARCH_VT8500
909 bool "VIA/WonderMedia 85xx"
910 select CPU_ARM926T
911 select GENERIC_GPIO
912 select ARCH_HAS_CPUFREQ
913 select GENERIC_CLOCKEVENTS
914 select ARCH_REQUIRE_GPIOLIB
915 select HAVE_PWM
916 help
917 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
918
919 config ARCH_ZYNQ
920 bool "Xilinx Zynq ARM Cortex A9 Platform"
921 select CPU_V7
922 select GENERIC_TIME
923 select GENERIC_CLOCKEVENTS
924 select CLKDEV_LOOKUP
925 select ARM_GIC
926 select ARM_AMBA
927 select ICST
928 select USE_OF
929 help
930 Support for Xilinx Zynq ARM Cortex A9 Platform
931 endchoice
932
933 #
934 # This is sorted alphabetically by mach-* pathname. However, plat-*
935 # Kconfigs may be included either alphabetically (according to the
936 # plat- suffix) or along side the corresponding mach-* source.
937 #
938 source "arch/arm/mach-at91/Kconfig"
939
940 source "arch/arm/mach-bcmring/Kconfig"
941
942 source "arch/arm/mach-clps711x/Kconfig"
943
944 source "arch/arm/mach-cns3xxx/Kconfig"
945
946 source "arch/arm/mach-davinci/Kconfig"
947
948 source "arch/arm/mach-dove/Kconfig"
949
950 source "arch/arm/mach-ep93xx/Kconfig"
951
952 source "arch/arm/mach-footbridge/Kconfig"
953
954 source "arch/arm/mach-gemini/Kconfig"
955
956 source "arch/arm/mach-h720x/Kconfig"
957
958 source "arch/arm/mach-integrator/Kconfig"
959
960 source "arch/arm/mach-iop32x/Kconfig"
961
962 source "arch/arm/mach-iop33x/Kconfig"
963
964 source "arch/arm/mach-iop13xx/Kconfig"
965
966 source "arch/arm/mach-ixp4xx/Kconfig"
967
968 source "arch/arm/mach-ixp2000/Kconfig"
969
970 source "arch/arm/mach-ixp23xx/Kconfig"
971
972 source "arch/arm/mach-kirkwood/Kconfig"
973
974 source "arch/arm/mach-ks8695/Kconfig"
975
976 source "arch/arm/mach-lpc32xx/Kconfig"
977
978 source "arch/arm/mach-msm/Kconfig"
979
980 source "arch/arm/mach-mv78xx0/Kconfig"
981
982 source "arch/arm/plat-mxc/Kconfig"
983
984 source "arch/arm/mach-mxs/Kconfig"
985
986 source "arch/arm/mach-netx/Kconfig"
987
988 source "arch/arm/mach-nomadik/Kconfig"
989 source "arch/arm/plat-nomadik/Kconfig"
990
991 source "arch/arm/mach-nuc93x/Kconfig"
992
993 source "arch/arm/plat-omap/Kconfig"
994
995 source "arch/arm/mach-omap1/Kconfig"
996
997 source "arch/arm/mach-omap2/Kconfig"
998
999 source "arch/arm/mach-orion5x/Kconfig"
1000
1001 source "arch/arm/mach-pxa/Kconfig"
1002 source "arch/arm/plat-pxa/Kconfig"
1003
1004 source "arch/arm/mach-mmp/Kconfig"
1005
1006 source "arch/arm/mach-realview/Kconfig"
1007
1008 source "arch/arm/mach-sa1100/Kconfig"
1009
1010 source "arch/arm/plat-samsung/Kconfig"
1011 source "arch/arm/plat-s3c24xx/Kconfig"
1012 source "arch/arm/plat-s5p/Kconfig"
1013
1014 source "arch/arm/plat-spear/Kconfig"
1015
1016 source "arch/arm/plat-tcc/Kconfig"
1017
1018 if ARCH_S3C2410
1019 source "arch/arm/mach-s3c2410/Kconfig"
1020 source "arch/arm/mach-s3c2412/Kconfig"
1021 source "arch/arm/mach-s3c2416/Kconfig"
1022 source "arch/arm/mach-s3c2440/Kconfig"
1023 source "arch/arm/mach-s3c2443/Kconfig"
1024 endif
1025
1026 if ARCH_S3C64XX
1027 source "arch/arm/mach-s3c64xx/Kconfig"
1028 endif
1029
1030 source "arch/arm/mach-s5p64x0/Kconfig"
1031
1032 source "arch/arm/mach-s5pc100/Kconfig"
1033
1034 source "arch/arm/mach-s5pv210/Kconfig"
1035
1036 source "arch/arm/mach-exynos4/Kconfig"
1037
1038 source "arch/arm/mach-shmobile/Kconfig"
1039
1040 source "arch/arm/mach-tegra/Kconfig"
1041
1042 source "arch/arm/mach-u300/Kconfig"
1043
1044 source "arch/arm/mach-ux500/Kconfig"
1045
1046 source "arch/arm/mach-versatile/Kconfig"
1047
1048 source "arch/arm/mach-vexpress/Kconfig"
1049 source "arch/arm/plat-versatile/Kconfig"
1050
1051 source "arch/arm/mach-vt8500/Kconfig"
1052
1053 source "arch/arm/mach-w90x900/Kconfig"
1054
1055 # Definitions to make life easier
1056 config ARCH_ACORN
1057 bool
1058
1059 config PLAT_IOP
1060 bool
1061 select GENERIC_CLOCKEVENTS
1062 select HAVE_SCHED_CLOCK
1063
1064 config PLAT_ORION
1065 bool
1066 select CLKSRC_MMIO
1067 select GENERIC_IRQ_CHIP
1068 select HAVE_SCHED_CLOCK
1069
1070 config PLAT_PXA
1071 bool
1072
1073 config PLAT_VERSATILE
1074 bool
1075
1076 config ARM_TIMER_SP804
1077 bool
1078 select CLKSRC_MMIO
1079
1080 source arch/arm/mm/Kconfig
1081
1082 config IWMMXT
1083 bool "Enable iWMMXt support"
1084 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1085 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1086 help
1087 Enable support for iWMMXt context switching at run time if
1088 running on a CPU that supports it.
1089
1090 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1091 config XSCALE_PMU
1092 bool
1093 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1094 default y
1095
1096 config CPU_HAS_PMU
1097 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1098 (!ARCH_OMAP3 || OMAP3_EMU)
1099 default y
1100 bool
1101
1102 config MULTI_IRQ_HANDLER
1103 bool
1104 help
1105 Allow each machine to specify it's own IRQ handler at run time.
1106
1107 if !MMU
1108 source "arch/arm/Kconfig-nommu"
1109 endif
1110
1111 config ARM_ERRATA_411920
1112 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1113 depends on CPU_V6 || CPU_V6K
1114 help
1115 Invalidation of the Instruction Cache operation can
1116 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1117 It does not affect the MPCore. This option enables the ARM Ltd.
1118 recommended workaround.
1119
1120 config ARM_ERRATA_430973
1121 bool "ARM errata: Stale prediction on replaced interworking branch"
1122 depends on CPU_V7
1123 help
1124 This option enables the workaround for the 430973 Cortex-A8
1125 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1126 interworking branch is replaced with another code sequence at the
1127 same virtual address, whether due to self-modifying code or virtual
1128 to physical address re-mapping, Cortex-A8 does not recover from the
1129 stale interworking branch prediction. This results in Cortex-A8
1130 executing the new code sequence in the incorrect ARM or Thumb state.
1131 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1132 and also flushes the branch target cache at every context switch.
1133 Note that setting specific bits in the ACTLR register may not be
1134 available in non-secure mode.
1135
1136 config ARM_ERRATA_458693
1137 bool "ARM errata: Processor deadlock when a false hazard is created"
1138 depends on CPU_V7
1139 help
1140 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1141 erratum. For very specific sequences of memory operations, it is
1142 possible for a hazard condition intended for a cache line to instead
1143 be incorrectly associated with a different cache line. This false
1144 hazard might then cause a processor deadlock. The workaround enables
1145 the L1 caching of the NEON accesses and disables the PLD instruction
1146 in the ACTLR register. Note that setting specific bits in the ACTLR
1147 register may not be available in non-secure mode.
1148
1149 config ARM_ERRATA_460075
1150 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1151 depends on CPU_V7
1152 help
1153 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1154 erratum. Any asynchronous access to the L2 cache may encounter a
1155 situation in which recent store transactions to the L2 cache are lost
1156 and overwritten with stale memory contents from external memory. The
1157 workaround disables the write-allocate mode for the L2 cache via the
1158 ACTLR register. Note that setting specific bits in the ACTLR register
1159 may not be available in non-secure mode.
1160
1161 config ARM_ERRATA_742230
1162 bool "ARM errata: DMB operation may be faulty"
1163 depends on CPU_V7 && SMP
1164 help
1165 This option enables the workaround for the 742230 Cortex-A9
1166 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1167 between two write operations may not ensure the correct visibility
1168 ordering of the two writes. This workaround sets a specific bit in
1169 the diagnostic register of the Cortex-A9 which causes the DMB
1170 instruction to behave as a DSB, ensuring the correct behaviour of
1171 the two writes.
1172
1173 config ARM_ERRATA_742231
1174 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1175 depends on CPU_V7 && SMP
1176 help
1177 This option enables the workaround for the 742231 Cortex-A9
1178 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1179 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1180 accessing some data located in the same cache line, may get corrupted
1181 data due to bad handling of the address hazard when the line gets
1182 replaced from one of the CPUs at the same time as another CPU is
1183 accessing it. This workaround sets specific bits in the diagnostic
1184 register of the Cortex-A9 which reduces the linefill issuing
1185 capabilities of the processor.
1186
1187 config PL310_ERRATA_588369
1188 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1189 depends on CACHE_L2X0
1190 help
1191 The PL310 L2 cache controller implements three types of Clean &
1192 Invalidate maintenance operations: by Physical Address
1193 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1194 They are architecturally defined to behave as the execution of a
1195 clean operation followed immediately by an invalidate operation,
1196 both performing to the same memory location. This functionality
1197 is not correctly implemented in PL310 as clean lines are not
1198 invalidated as a result of these operations.
1199
1200 config ARM_ERRATA_720789
1201 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1202 depends on CPU_V7 && SMP
1203 help
1204 This option enables the workaround for the 720789 Cortex-A9 (prior to
1205 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1206 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1207 As a consequence of this erratum, some TLB entries which should be
1208 invalidated are not, resulting in an incoherency in the system page
1209 tables. The workaround changes the TLB flushing routines to invalidate
1210 entries regardless of the ASID.
1211
1212 config PL310_ERRATA_727915
1213 bool "Background Clean & Invalidate by Way operation can cause data corruption"
1214 depends on CACHE_L2X0
1215 help
1216 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1217 operation (offset 0x7FC). This operation runs in background so that
1218 PL310 can handle normal accesses while it is in progress. Under very
1219 rare circumstances, due to this erratum, write data can be lost when
1220 PL310 treats a cacheable write transaction during a Clean &
1221 Invalidate by Way operation.
1222
1223 config ARM_ERRATA_743622
1224 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1225 depends on CPU_V7
1226 help
1227 This option enables the workaround for the 743622 Cortex-A9
1228 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1229 optimisation in the Cortex-A9 Store Buffer may lead to data
1230 corruption. This workaround sets a specific bit in the diagnostic
1231 register of the Cortex-A9 which disables the Store Buffer
1232 optimisation, preventing the defect from occurring. This has no
1233 visible impact on the overall performance or power consumption of the
1234 processor.
1235
1236 config ARM_ERRATA_751472
1237 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1238 depends on CPU_V7 && SMP
1239 help
1240 This option enables the workaround for the 751472 Cortex-A9 (prior
1241 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1242 completion of a following broadcasted operation if the second
1243 operation is received by a CPU before the ICIALLUIS has completed,
1244 potentially leading to corrupted entries in the cache or TLB.
1245
1246 config ARM_ERRATA_753970
1247 bool "ARM errata: cache sync operation may be faulty"
1248 depends on CACHE_PL310
1249 help
1250 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1251
1252 Under some condition the effect of cache sync operation on
1253 the store buffer still remains when the operation completes.
1254 This means that the store buffer is always asked to drain and
1255 this prevents it from merging any further writes. The workaround
1256 is to replace the normal offset of cache sync operation (0x730)
1257 by another offset targeting an unmapped PL310 register 0x740.
1258 This has the same effect as the cache sync operation: store buffer
1259 drain and waiting for all buffers empty.
1260
1261 config ARM_ERRATA_754322
1262 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1263 depends on CPU_V7
1264 help
1265 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1266 r3p*) erratum. A speculative memory access may cause a page table walk
1267 which starts prior to an ASID switch but completes afterwards. This
1268 can populate the micro-TLB with a stale entry which may be hit with
1269 the new ASID. This workaround places two dsb instructions in the mm
1270 switching code so that no page table walks can cross the ASID switch.
1271
1272 config ARM_ERRATA_754327
1273 bool "ARM errata: no automatic Store Buffer drain"
1274 depends on CPU_V7 && SMP
1275 help
1276 This option enables the workaround for the 754327 Cortex-A9 (prior to
1277 r2p0) erratum. The Store Buffer does not have any automatic draining
1278 mechanism and therefore a livelock may occur if an external agent
1279 continuously polls a memory location waiting to observe an update.
1280 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1281 written polling loops from denying visibility of updates to memory.
1282
1283 endmenu
1284
1285 source "arch/arm/common/Kconfig"
1286
1287 menu "Bus support"
1288
1289 config ARM_AMBA
1290 bool
1291
1292 config ISA
1293 bool
1294 help
1295 Find out whether you have ISA slots on your motherboard. ISA is the
1296 name of a bus system, i.e. the way the CPU talks to the other stuff
1297 inside your box. Other bus systems are PCI, EISA, MicroChannel
1298 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1299 newer boards don't support it. If you have ISA, say Y, otherwise N.
1300
1301 # Select ISA DMA controller support
1302 config ISA_DMA
1303 bool
1304 select ISA_DMA_API
1305
1306 # Select ISA DMA interface
1307 config ISA_DMA_API
1308 bool
1309
1310 config PCI
1311 bool "PCI support" if MIGHT_HAVE_PCI
1312 help
1313 Find out whether you have a PCI motherboard. PCI is the name of a
1314 bus system, i.e. the way the CPU talks to the other stuff inside
1315 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1316 VESA. If you have PCI, say Y, otherwise N.
1317
1318 config PCI_DOMAINS
1319 bool
1320 depends on PCI
1321
1322 config PCI_NANOENGINE
1323 bool "BSE nanoEngine PCI support"
1324 depends on SA1100_NANOENGINE
1325 help
1326 Enable PCI on the BSE nanoEngine board.
1327
1328 config PCI_SYSCALL
1329 def_bool PCI
1330
1331 # Select the host bridge type
1332 config PCI_HOST_VIA82C505
1333 bool
1334 depends on PCI && ARCH_SHARK
1335 default y
1336
1337 config PCI_HOST_ITE8152
1338 bool
1339 depends on PCI && MACH_ARMCORE
1340 default y
1341 select DMABOUNCE
1342
1343 source "drivers/pci/Kconfig"
1344
1345 source "drivers/pcmcia/Kconfig"
1346
1347 endmenu
1348
1349 menu "Kernel Features"
1350
1351 source "kernel/time/Kconfig"
1352
1353 config SMP
1354 bool "Symmetric Multi-Processing"
1355 depends on CPU_V6K || CPU_V7
1356 depends on GENERIC_CLOCKEVENTS
1357 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1358 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1359 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1360 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1361 select USE_GENERIC_SMP_HELPERS
1362 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1363 help
1364 This enables support for systems with more than one CPU. If you have
1365 a system with only one CPU, like most personal computers, say N. If
1366 you have a system with more than one CPU, say Y.
1367
1368 If you say N here, the kernel will run on single and multiprocessor
1369 machines, but will use only one CPU of a multiprocessor machine. If
1370 you say Y here, the kernel will run on many, but not all, single
1371 processor machines. On a single processor machine, the kernel will
1372 run faster if you say N here.
1373
1374 See also <file:Documentation/i386/IO-APIC.txt>,
1375 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1376 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1377
1378 If you don't know what to do here, say N.
1379
1380 config SMP_ON_UP
1381 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1382 depends on EXPERIMENTAL
1383 depends on SMP && !XIP_KERNEL
1384 default y
1385 help
1386 SMP kernels contain instructions which fail on non-SMP processors.
1387 Enabling this option allows the kernel to modify itself to make
1388 these instructions safe. Disabling it allows about 1K of space
1389 savings.
1390
1391 If you don't know what to do here, say Y.
1392
1393 config HAVE_ARM_SCU
1394 bool
1395 help
1396 This option enables support for the ARM system coherency unit
1397
1398 config HAVE_ARM_TWD
1399 bool
1400 depends on SMP
1401 select TICK_ONESHOT
1402 help
1403 This options enables support for the ARM timer and watchdog unit
1404
1405 choice
1406 prompt "Memory split"
1407 default VMSPLIT_3G
1408 help
1409 Select the desired split between kernel and user memory.
1410
1411 If you are not absolutely sure what you are doing, leave this
1412 option alone!
1413
1414 config VMSPLIT_3G
1415 bool "3G/1G user/kernel split"
1416 config VMSPLIT_2G
1417 bool "2G/2G user/kernel split"
1418 config VMSPLIT_1G
1419 bool "1G/3G user/kernel split"
1420 endchoice
1421
1422 config PAGE_OFFSET
1423 hex
1424 default 0x40000000 if VMSPLIT_1G
1425 default 0x80000000 if VMSPLIT_2G
1426 default 0xC0000000
1427
1428 config NR_CPUS
1429 int "Maximum number of CPUs (2-32)"
1430 range 2 32
1431 depends on SMP
1432 default "4"
1433
1434 config HOTPLUG_CPU
1435 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1436 depends on SMP && HOTPLUG && EXPERIMENTAL
1437 help
1438 Say Y here to experiment with turning CPUs off and on. CPUs
1439 can be controlled through /sys/devices/system/cpu.
1440
1441 config LOCAL_TIMERS
1442 bool "Use local timer interrupts"
1443 depends on SMP
1444 default y
1445 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1446 help
1447 Enable support for local timers on SMP platforms, rather then the
1448 legacy IPI broadcast method. Local timers allows the system
1449 accounting to be spread across the timer interval, preventing a
1450 "thundering herd" at every timer tick.
1451
1452 source kernel/Kconfig.preempt
1453
1454 config HZ
1455 int
1456 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1457 ARCH_S5PV210 || ARCH_EXYNOS4
1458 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1459 default AT91_TIMER_HZ if ARCH_AT91
1460 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1461 default 100
1462
1463 config THUMB2_KERNEL
1464 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1465 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1466 select AEABI
1467 select ARM_ASM_UNIFIED
1468 help
1469 By enabling this option, the kernel will be compiled in
1470 Thumb-2 mode. A compiler/assembler that understand the unified
1471 ARM-Thumb syntax is needed.
1472
1473 If unsure, say N.
1474
1475 config THUMB2_AVOID_R_ARM_THM_JUMP11
1476 bool "Work around buggy Thumb-2 short branch relocations in gas"
1477 depends on THUMB2_KERNEL && MODULES
1478 default y
1479 help
1480 Various binutils versions can resolve Thumb-2 branches to
1481 locally-defined, preemptible global symbols as short-range "b.n"
1482 branch instructions.
1483
1484 This is a problem, because there's no guarantee the final
1485 destination of the symbol, or any candidate locations for a
1486 trampoline, are within range of the branch. For this reason, the
1487 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1488 relocation in modules at all, and it makes little sense to add
1489 support.
1490
1491 The symptom is that the kernel fails with an "unsupported
1492 relocation" error when loading some modules.
1493
1494 Until fixed tools are available, passing
1495 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1496 code which hits this problem, at the cost of a bit of extra runtime
1497 stack usage in some cases.
1498
1499 The problem is described in more detail at:
1500 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1501
1502 Only Thumb-2 kernels are affected.
1503
1504 Unless you are sure your tools don't have this problem, say Y.
1505
1506 config ARM_ASM_UNIFIED
1507 bool
1508
1509 config AEABI
1510 bool "Use the ARM EABI to compile the kernel"
1511 help
1512 This option allows for the kernel to be compiled using the latest
1513 ARM ABI (aka EABI). This is only useful if you are using a user
1514 space environment that is also compiled with EABI.
1515
1516 Since there are major incompatibilities between the legacy ABI and
1517 EABI, especially with regard to structure member alignment, this
1518 option also changes the kernel syscall calling convention to
1519 disambiguate both ABIs and allow for backward compatibility support
1520 (selected with CONFIG_OABI_COMPAT).
1521
1522 To use this you need GCC version 4.0.0 or later.
1523
1524 config OABI_COMPAT
1525 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1526 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1527 default y
1528 help
1529 This option preserves the old syscall interface along with the
1530 new (ARM EABI) one. It also provides a compatibility layer to
1531 intercept syscalls that have structure arguments which layout
1532 in memory differs between the legacy ABI and the new ARM EABI
1533 (only for non "thumb" binaries). This option adds a tiny
1534 overhead to all syscalls and produces a slightly larger kernel.
1535 If you know you'll be using only pure EABI user space then you
1536 can say N here. If this option is not selected and you attempt
1537 to execute a legacy ABI binary then the result will be
1538 UNPREDICTABLE (in fact it can be predicted that it won't work
1539 at all). If in doubt say Y.
1540
1541 config ARCH_HAS_HOLES_MEMORYMODEL
1542 bool
1543
1544 config ARCH_SPARSEMEM_ENABLE
1545 bool
1546
1547 config ARCH_SPARSEMEM_DEFAULT
1548 def_bool ARCH_SPARSEMEM_ENABLE
1549
1550 config ARCH_SELECT_MEMORY_MODEL
1551 def_bool ARCH_SPARSEMEM_ENABLE
1552
1553 config HAVE_ARCH_PFN_VALID
1554 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1555
1556 config HIGHMEM
1557 bool "High Memory Support"
1558 depends on MMU
1559 help
1560 The address space of ARM processors is only 4 Gigabytes large
1561 and it has to accommodate user address space, kernel address
1562 space as well as some memory mapped IO. That means that, if you
1563 have a large amount of physical memory and/or IO, not all of the
1564 memory can be "permanently mapped" by the kernel. The physical
1565 memory that is not permanently mapped is called "high memory".
1566
1567 Depending on the selected kernel/user memory split, minimum
1568 vmalloc space and actual amount of RAM, you may not need this
1569 option which should result in a slightly faster kernel.
1570
1571 If unsure, say n.
1572
1573 config HIGHPTE
1574 bool "Allocate 2nd-level pagetables from highmem"
1575 depends on HIGHMEM
1576
1577 config HW_PERF_EVENTS
1578 bool "Enable hardware performance counter support for perf events"
1579 depends on PERF_EVENTS && CPU_HAS_PMU
1580 default y
1581 help
1582 Enable hardware performance counter support for perf events. If
1583 disabled, perf events will use software events only.
1584
1585 source "mm/Kconfig"
1586
1587 config FORCE_MAX_ZONEORDER
1588 int "Maximum zone order" if ARCH_SHMOBILE
1589 range 11 64 if ARCH_SHMOBILE
1590 default "9" if SA1111
1591 default "11"
1592 help
1593 The kernel memory allocator divides physically contiguous memory
1594 blocks into "zones", where each zone is a power of two number of
1595 pages. This option selects the largest power of two that the kernel
1596 keeps in the memory allocator. If you need to allocate very large
1597 blocks of physically contiguous memory, then you may need to
1598 increase this value.
1599
1600 This config option is actually maximum order plus one. For example,
1601 a value of 11 means that the largest free memory block is 2^10 pages.
1602
1603 config LEDS
1604 bool "Timer and CPU usage LEDs"
1605 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1606 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1607 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1608 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1609 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1610 ARCH_AT91 || ARCH_DAVINCI || \
1611 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1612 help
1613 If you say Y here, the LEDs on your machine will be used
1614 to provide useful information about your current system status.
1615
1616 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1617 be able to select which LEDs are active using the options below. If
1618 you are compiling a kernel for the EBSA-110 or the LART however, the
1619 red LED will simply flash regularly to indicate that the system is
1620 still functional. It is safe to say Y here if you have a CATS
1621 system, but the driver will do nothing.
1622
1623 config LEDS_TIMER
1624 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1625 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1626 || MACH_OMAP_PERSEUS2
1627 depends on LEDS
1628 depends on !GENERIC_CLOCKEVENTS
1629 default y if ARCH_EBSA110
1630 help
1631 If you say Y here, one of the system LEDs (the green one on the
1632 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1633 will flash regularly to indicate that the system is still
1634 operational. This is mainly useful to kernel hackers who are
1635 debugging unstable kernels.
1636
1637 The LART uses the same LED for both Timer LED and CPU usage LED
1638 functions. You may choose to use both, but the Timer LED function
1639 will overrule the CPU usage LED.
1640
1641 config LEDS_CPU
1642 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1643 !ARCH_OMAP) \
1644 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1645 || MACH_OMAP_PERSEUS2
1646 depends on LEDS
1647 help
1648 If you say Y here, the red LED will be used to give a good real
1649 time indication of CPU usage, by lighting whenever the idle task
1650 is not currently executing.
1651
1652 The LART uses the same LED for both Timer LED and CPU usage LED
1653 functions. You may choose to use both, but the Timer LED function
1654 will overrule the CPU usage LED.
1655
1656 config ALIGNMENT_TRAP
1657 bool
1658 depends on CPU_CP15_MMU
1659 default y if !ARCH_EBSA110
1660 select HAVE_PROC_CPU if PROC_FS
1661 help
1662 ARM processors cannot fetch/store information which is not
1663 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1664 address divisible by 4. On 32-bit ARM processors, these non-aligned
1665 fetch/store instructions will be emulated in software if you say
1666 here, which has a severe performance impact. This is necessary for
1667 correct operation of some network protocols. With an IP-only
1668 configuration it is safe to say N, otherwise say Y.
1669
1670 config UACCESS_WITH_MEMCPY
1671 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1672 depends on MMU && EXPERIMENTAL
1673 default y if CPU_FEROCEON
1674 help
1675 Implement faster copy_to_user and clear_user methods for CPU
1676 cores where a 8-word STM instruction give significantly higher
1677 memory write throughput than a sequence of individual 32bit stores.
1678
1679 A possible side effect is a slight increase in scheduling latency
1680 between threads sharing the same address space if they invoke
1681 such copy operations with large buffers.
1682
1683 However, if the CPU data cache is using a write-allocate mode,
1684 this option is unlikely to provide any performance gain.
1685
1686 config SECCOMP
1687 bool
1688 prompt "Enable seccomp to safely compute untrusted bytecode"
1689 ---help---
1690 This kernel feature is useful for number crunching applications
1691 that may need to compute untrusted bytecode during their
1692 execution. By using pipes or other transports made available to
1693 the process as file descriptors supporting the read/write
1694 syscalls, it's possible to isolate those applications in
1695 their own address space using seccomp. Once seccomp is
1696 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1697 and the task is only allowed to execute a few safe syscalls
1698 defined by each seccomp mode.
1699
1700 config CC_STACKPROTECTOR
1701 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1702 depends on EXPERIMENTAL
1703 help
1704 This option turns on the -fstack-protector GCC feature. This
1705 feature puts, at the beginning of functions, a canary value on
1706 the stack just before the return address, and validates
1707 the value just before actually returning. Stack based buffer
1708 overflows (that need to overwrite this return address) now also
1709 overwrite the canary, which gets detected and the attack is then
1710 neutralized via a kernel panic.
1711 This feature requires gcc version 4.2 or above.
1712
1713 config DEPRECATED_PARAM_STRUCT
1714 bool "Provide old way to pass kernel parameters"
1715 help
1716 This was deprecated in 2001 and announced to live on for 5 years.
1717 Some old boot loaders still use this way.
1718
1719 endmenu
1720
1721 menu "Boot options"
1722
1723 config USE_OF
1724 bool "Flattened Device Tree support"
1725 select OF
1726 select OF_EARLY_FLATTREE
1727 select IRQ_DOMAIN
1728 help
1729 Include support for flattened device tree machine descriptions.
1730
1731 # Compressed boot loader in ROM. Yes, we really want to ask about
1732 # TEXT and BSS so we preserve their values in the config files.
1733 config ZBOOT_ROM_TEXT
1734 hex "Compressed ROM boot loader base address"
1735 default "0"
1736 help
1737 The physical address at which the ROM-able zImage is to be
1738 placed in the target. Platforms which normally make use of
1739 ROM-able zImage formats normally set this to a suitable
1740 value in their defconfig file.
1741
1742 If ZBOOT_ROM is not enabled, this has no effect.
1743
1744 config ZBOOT_ROM_BSS
1745 hex "Compressed ROM boot loader BSS address"
1746 default "0"
1747 help
1748 The base address of an area of read/write memory in the target
1749 for the ROM-able zImage which must be available while the
1750 decompressor is running. It must be large enough to hold the
1751 entire decompressed kernel plus an additional 128 KiB.
1752 Platforms which normally make use of ROM-able zImage formats
1753 normally set this to a suitable value in their defconfig file.
1754
1755 If ZBOOT_ROM is not enabled, this has no effect.
1756
1757 config ZBOOT_ROM
1758 bool "Compressed boot loader in ROM/flash"
1759 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1760 help
1761 Say Y here if you intend to execute your compressed kernel image
1762 (zImage) directly from ROM or flash. If unsure, say N.
1763
1764 choice
1765 prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1766 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1767 default ZBOOT_ROM_NONE
1768 help
1769 Include experimental SD/MMC loading code in the ROM-able zImage.
1770 With this enabled it is possible to write the the ROM-able zImage
1771 kernel image to an MMC or SD card and boot the kernel straight
1772 from the reset vector. At reset the processor Mask ROM will load
1773 the first part of the the ROM-able zImage which in turn loads the
1774 rest the kernel image to RAM.
1775
1776 config ZBOOT_ROM_NONE
1777 bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1778 help
1779 Do not load image from SD or MMC
1780
1781 config ZBOOT_ROM_MMCIF
1782 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1783 help
1784 Load image from MMCIF hardware block.
1785
1786 config ZBOOT_ROM_SH_MOBILE_SDHI
1787 bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1788 help
1789 Load image from SDHI hardware block
1790
1791 endchoice
1792
1793 config CMDLINE
1794 string "Default kernel command string"
1795 default ""
1796 help
1797 On some architectures (EBSA110 and CATS), there is currently no way
1798 for the boot loader to pass arguments to the kernel. For these
1799 architectures, you should supply some command-line options at build
1800 time by entering them here. As a minimum, you should specify the
1801 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1802
1803 choice
1804 prompt "Kernel command line type" if CMDLINE != ""
1805 default CMDLINE_FROM_BOOTLOADER
1806
1807 config CMDLINE_FROM_BOOTLOADER
1808 bool "Use bootloader kernel arguments if available"
1809 help
1810 Uses the command-line options passed by the boot loader. If
1811 the boot loader doesn't provide any, the default kernel command
1812 string provided in CMDLINE will be used.
1813
1814 config CMDLINE_EXTEND
1815 bool "Extend bootloader kernel arguments"
1816 help
1817 The command-line arguments provided by the boot loader will be
1818 appended to the default kernel command string.
1819
1820 config CMDLINE_FORCE
1821 bool "Always use the default kernel command string"
1822 help
1823 Always use the default kernel command string, even if the boot
1824 loader passes other arguments to the kernel.
1825 This is useful if you cannot or don't want to change the
1826 command-line options your boot loader passes to the kernel.
1827 endchoice
1828
1829 config XIP_KERNEL
1830 bool "Kernel Execute-In-Place from ROM"
1831 depends on !ZBOOT_ROM
1832 help
1833 Execute-In-Place allows the kernel to run from non-volatile storage
1834 directly addressable by the CPU, such as NOR flash. This saves RAM
1835 space since the text section of the kernel is not loaded from flash
1836 to RAM. Read-write sections, such as the data section and stack,
1837 are still copied to RAM. The XIP kernel is not compressed since
1838 it has to run directly from flash, so it will take more space to
1839 store it. The flash address used to link the kernel object files,
1840 and for storing it, is configuration dependent. Therefore, if you
1841 say Y here, you must know the proper physical address where to
1842 store the kernel image depending on your own flash memory usage.
1843
1844 Also note that the make target becomes "make xipImage" rather than
1845 "make zImage" or "make Image". The final kernel binary to put in
1846 ROM memory will be arch/arm/boot/xipImage.
1847
1848 If unsure, say N.
1849
1850 config XIP_PHYS_ADDR
1851 hex "XIP Kernel Physical Location"
1852 depends on XIP_KERNEL
1853 default "0x00080000"
1854 help
1855 This is the physical address in your flash memory the kernel will
1856 be linked for and stored to. This address is dependent on your
1857 own flash usage.
1858
1859 config KEXEC
1860 bool "Kexec system call (EXPERIMENTAL)"
1861 depends on EXPERIMENTAL
1862 help
1863 kexec is a system call that implements the ability to shutdown your
1864 current kernel, and to start another kernel. It is like a reboot
1865 but it is independent of the system firmware. And like a reboot
1866 you can start any kernel with it, not just Linux.
1867
1868 It is an ongoing process to be certain the hardware in a machine
1869 is properly shutdown, so do not be surprised if this code does not
1870 initially work for you. It may help to enable device hotplugging
1871 support.
1872
1873 config ATAGS_PROC
1874 bool "Export atags in procfs"
1875 depends on KEXEC
1876 default y
1877 help
1878 Should the atags used to boot the kernel be exported in an "atags"
1879 file in procfs. Useful with kexec.
1880
1881 config CRASH_DUMP
1882 bool "Build kdump crash kernel (EXPERIMENTAL)"
1883 depends on EXPERIMENTAL
1884 help
1885 Generate crash dump after being started by kexec. This should
1886 be normally only set in special crash dump kernels which are
1887 loaded in the main kernel with kexec-tools into a specially
1888 reserved region and then later executed after a crash by
1889 kdump/kexec. The crash dump kernel must be compiled to a
1890 memory address not used by the main kernel
1891
1892 For more details see Documentation/kdump/kdump.txt
1893
1894 config AUTO_ZRELADDR
1895 bool "Auto calculation of the decompressed kernel image address"
1896 depends on !ZBOOT_ROM && !ARCH_U300
1897 help
1898 ZRELADDR is the physical address where the decompressed kernel
1899 image will be placed. If AUTO_ZRELADDR is selected, the address
1900 will be determined at run-time by masking the current IP with
1901 0xf8000000. This assumes the zImage being placed in the first 128MB
1902 from start of memory.
1903
1904 endmenu
1905
1906 menu "CPU Power Management"
1907
1908 if ARCH_HAS_CPUFREQ
1909
1910 source "drivers/cpufreq/Kconfig"
1911
1912 config CPU_FREQ_IMX
1913 tristate "CPUfreq driver for i.MX CPUs"
1914 depends on ARCH_MXC && CPU_FREQ
1915 help
1916 This enables the CPUfreq driver for i.MX CPUs.
1917
1918 config CPU_FREQ_SA1100
1919 bool
1920
1921 config CPU_FREQ_SA1110
1922 bool
1923
1924 config CPU_FREQ_INTEGRATOR
1925 tristate "CPUfreq driver for ARM Integrator CPUs"
1926 depends on ARCH_INTEGRATOR && CPU_FREQ
1927 default y
1928 help
1929 This enables the CPUfreq driver for ARM Integrator CPUs.
1930
1931 For details, take a look at <file:Documentation/cpu-freq>.
1932
1933 If in doubt, say Y.
1934
1935 config CPU_FREQ_PXA
1936 bool
1937 depends on CPU_FREQ && ARCH_PXA && PXA25x
1938 default y
1939 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1940
1941 config CPU_FREQ_S3C
1942 bool
1943 help
1944 Internal configuration node for common cpufreq on Samsung SoC
1945
1946 config CPU_FREQ_S3C24XX
1947 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1948 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1949 select CPU_FREQ_S3C
1950 help
1951 This enables the CPUfreq driver for the Samsung S3C24XX family
1952 of CPUs.
1953
1954 For details, take a look at <file:Documentation/cpu-freq>.
1955
1956 If in doubt, say N.
1957
1958 config CPU_FREQ_S3C24XX_PLL
1959 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1960 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1961 help
1962 Compile in support for changing the PLL frequency from the
1963 S3C24XX series CPUfreq driver. The PLL takes time to settle
1964 after a frequency change, so by default it is not enabled.
1965
1966 This also means that the PLL tables for the selected CPU(s) will
1967 be built which may increase the size of the kernel image.
1968
1969 config CPU_FREQ_S3C24XX_DEBUG
1970 bool "Debug CPUfreq Samsung driver core"
1971 depends on CPU_FREQ_S3C24XX
1972 help
1973 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1974
1975 config CPU_FREQ_S3C24XX_IODEBUG
1976 bool "Debug CPUfreq Samsung driver IO timing"
1977 depends on CPU_FREQ_S3C24XX
1978 help
1979 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1980
1981 config CPU_FREQ_S3C24XX_DEBUGFS
1982 bool "Export debugfs for CPUFreq"
1983 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1984 help
1985 Export status information via debugfs.
1986
1987 endif
1988
1989 source "drivers/cpuidle/Kconfig"
1990
1991 endmenu
1992
1993 menu "Floating point emulation"
1994
1995 comment "At least one emulation must be selected"
1996
1997 config FPE_NWFPE
1998 bool "NWFPE math emulation"
1999 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2000 ---help---
2001 Say Y to include the NWFPE floating point emulator in the kernel.
2002 This is necessary to run most binaries. Linux does not currently
2003 support floating point hardware so you need to say Y here even if
2004 your machine has an FPA or floating point co-processor podule.
2005
2006 You may say N here if you are going to load the Acorn FPEmulator
2007 early in the bootup.
2008
2009 config FPE_NWFPE_XP
2010 bool "Support extended precision"
2011 depends on FPE_NWFPE
2012 help
2013 Say Y to include 80-bit support in the kernel floating-point
2014 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2015 Note that gcc does not generate 80-bit operations by default,
2016 so in most cases this option only enlarges the size of the
2017 floating point emulator without any good reason.
2018
2019 You almost surely want to say N here.
2020
2021 config FPE_FASTFPE
2022 bool "FastFPE math emulation (EXPERIMENTAL)"
2023 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2024 ---help---
2025 Say Y here to include the FAST floating point emulator in the kernel.
2026 This is an experimental much faster emulator which now also has full
2027 precision for the mantissa. It does not support any exceptions.
2028 It is very simple, and approximately 3-6 times faster than NWFPE.
2029
2030 It should be sufficient for most programs. It may be not suitable
2031 for scientific calculations, but you have to check this for yourself.
2032 If you do not feel you need a faster FP emulation you should better
2033 choose NWFPE.
2034
2035 config VFP
2036 bool "VFP-format floating point maths"
2037 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2038 help
2039 Say Y to include VFP support code in the kernel. This is needed
2040 if your hardware includes a VFP unit.
2041
2042 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2043 release notes and additional status information.
2044
2045 Say N if your target does not have VFP hardware.
2046
2047 config VFPv3
2048 bool
2049 depends on VFP
2050 default y if CPU_V7
2051
2052 config NEON
2053 bool "Advanced SIMD (NEON) Extension support"
2054 depends on VFPv3 && CPU_V7
2055 help
2056 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2057 Extension.
2058
2059 endmenu
2060
2061 menu "Userspace binary formats"
2062
2063 source "fs/Kconfig.binfmt"
2064
2065 config ARTHUR
2066 tristate "RISC OS personality"
2067 depends on !AEABI
2068 help
2069 Say Y here to include the kernel code necessary if you want to run
2070 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2071 experimental; if this sounds frightening, say N and sleep in peace.
2072 You can also say M here to compile this support as a module (which
2073 will be called arthur).
2074
2075 endmenu
2076
2077 menu "Power management options"
2078
2079 source "kernel/power/Kconfig"
2080
2081 config ARCH_SUSPEND_POSSIBLE
2082 depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2083 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2084 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2085 def_bool y
2086
2087 endmenu
2088
2089 source "net/Kconfig"
2090
2091 source "drivers/Kconfig"
2092
2093 source "fs/Kconfig"
2094
2095 source "arch/arm/Kconfig.debug"
2096
2097 source "security/Kconfig"
2098
2099 source "crypto/Kconfig"
2100
2101 source "lib/Kconfig"
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