arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_WANT_IPC_PARSE_VERSION
   8         select BUILDTIME_EXTABLE_SORT if MMU
   9         select CPU_PM if (SUSPEND || CPU_IDLE)
  10         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  11         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  12         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  13         select GENERIC_IRQ_PROBE
  14         select GENERIC_IRQ_SHOW
  15         select GENERIC_PCI_IOMAP
  16         select GENERIC_SMP_IDLE_THREAD
  17         select GENERIC_STRNCPY_FROM_USER
  18         select GENERIC_STRNLEN_USER
  19         select HARDIRQS_SW_RESEND
  20         select HAVE_AOUT
  21         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  22         select HAVE_ARCH_KGDB
  23         select HAVE_ARCH_SECCOMP_FILTER
  24         select HAVE_ARCH_TRACEHOOK
  25         select HAVE_BPF_JIT
  26         select HAVE_C_RECORDMCOUNT
  27         select HAVE_DEBUG_KMEMLEAK
  28         select HAVE_DMA_API_DEBUG
  29         select HAVE_DMA_ATTRS
  30         select HAVE_DMA_CONTIGUOUS if MMU
  31         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  32         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  33         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  34         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  35         select HAVE_GENERIC_DMA_COHERENT
  36         select HAVE_GENERIC_HARDIRQS
  37         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  38         select HAVE_IDE if PCI || ISA || PCMCIA
  39         select HAVE_KERNEL_GZIP
  40         select HAVE_KERNEL_LZMA
  41         select HAVE_KERNEL_LZO
  42         select HAVE_KERNEL_XZ
  43         select HAVE_KPROBES if !XIP_KERNEL
  44         select HAVE_KRETPROBES if (HAVE_KPROBES)
  45         select HAVE_MEMBLOCK
  46         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  47         select HAVE_PERF_EVENTS
  48         select HAVE_REGS_AND_STACK_ACCESS_API
  49         select HAVE_SYSCALL_TRACEPOINTS
  50         select HAVE_UID16
  51         select KTIME_SCALAR
  52         select PERF_USE_VMALLOC
  53         select RTC_LIB
  54         select SYS_SUPPORTS_APM_EMULATION
  55         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  56         select MODULES_USE_ELF_REL
  57         select CLONE_BACKWARDS
  58         help
  59           The ARM series is a line of low-power-consumption RISC chip designs
  60           licensed by ARM Ltd and targeted at embedded applications and
  61           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  62           manufactured, but legacy ARM-based PC hardware remains popular in
  63           Europe.  There is an ARM Linux project with a web page at
  64           <http://www.arm.linux.org.uk/>.
  65
  66 config ARM_HAS_SG_CHAIN
  67         bool
  68
  69 config NEED_SG_DMA_LENGTH
  70         bool
  71
  72 config ARM_DMA_USE_IOMMU
  73         bool
  74         select ARM_HAS_SG_CHAIN
  75         select NEED_SG_DMA_LENGTH
  76
  77 config HAVE_PWM
  78         bool
  79
  80 config MIGHT_HAVE_PCI
  81         bool
  82
  83 config SYS_SUPPORTS_APM_EMULATION
  84         bool
  85
  86 config GENERIC_GPIO
  87         bool
  88
  89 config HAVE_TCM
  90         bool
  91         select GENERIC_ALLOCATOR
  92
  93 config HAVE_PROC_CPU
  94         bool
  95
  96 config NO_IOPORT
  97         bool
  98
  99 config EISA
 100         bool
 101         ---help---
 102           The Extended Industry Standard Architecture (EISA) bus was
 103           developed as an open alternative to the IBM MicroChannel bus.
 104
 105           The EISA bus provided some of the features of the IBM MicroChannel
 106           bus while maintaining backward compatibility with cards made for
 107           the older ISA bus.  The EISA bus saw limited use between 1988 and
 108           1995 when it was made obsolete by the PCI bus.
 109
 110           Say Y here if you are building a kernel for an EISA-based machine.
 111
 112           Otherwise, say N.
 113
 114 config SBUS
 115         bool
 116
 117 config STACKTRACE_SUPPORT
 118         bool
 119         default y
 120
 121 config HAVE_LATENCYTOP_SUPPORT
 122         bool
 123         depends on !SMP
 124         default y
 125
 126 config LOCKDEP_SUPPORT
 127         bool
 128         default y
 129
 130 config TRACE_IRQFLAGS_SUPPORT
 131         bool
 132         default y
 133
 134 config RWSEM_GENERIC_SPINLOCK
 135         bool
 136         default y
 137
 138 config RWSEM_XCHGADD_ALGORITHM
 139         bool
 140
 141 config ARCH_HAS_ILOG2_U32
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U64
 145         bool
 146
 147 config ARCH_HAS_CPUFREQ
 148         bool
 149         help
 150           Internal node to signify that the ARCH has CPUFREQ support
 151           and that the relevant menu configurations are displayed for
 152           it.
 153
 154 config GENERIC_HWEIGHT
 155         bool
 156         default y
 157
 158 config GENERIC_CALIBRATE_DELAY
 159         bool
 160         default y
 161
 162 config ARCH_MAY_HAVE_PC_FDC
 163         bool
 164
 165 config ZONE_DMA
 166         bool
 167
 168 config NEED_DMA_MAP_STATE
 169        def_bool y
 170
 171 config ARCH_HAS_DMA_SET_COHERENT_MASK
 172         bool
 173
 174 config GENERIC_ISA_DMA
 175         bool
 176
 177 config FIQ
 178         bool
 179
 180 config NEED_RET_TO_USER
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 196         default y
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary.
 206
 207           Only disable this option if you know that you do not require
 208           this feature (eg, building a kernel for a single machine) and
 209           you need to shrink the kernel to the minimal size.
 210
 211 config NEED_MACH_GPIO_H
 212         bool
 213         help
 214           Select this when mach/gpio.h is required to provide special
 215           definitions for this platform. The need for mach/gpio.h should
 216           be avoided when possible.
 217
 218 config NEED_MACH_IO_H
 219         bool
 220         help
 221           Select this when mach/io.h is required to provide special
 222           definitions for this platform.  The need for mach/io.h should
 223           be avoided when possible.
 224
 225 config NEED_MACH_MEMORY_H
 226         bool
 227         help
 228           Select this when mach/memory.h is required to provide special
 229           definitions for this platform.  The need for mach/memory.h should
 230           be avoided when possible.
 231
 232 config PHYS_OFFSET
 233         hex "Physical address of main memory" if MMU
 234         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 235         default DRAM_BASE if !MMU
 236         help
 237           Please provide the physical address corresponding to the
 238           location of main memory in your system.
 239
 240 config GENERIC_BUG
 241         def_bool y
 242         depends on BUG
 243
 244 source "init/Kconfig"
 245
 246 source "kernel/Kconfig.freezer"
 247
 248 menu "System Type"
 249
 250 config MMU
 251         bool "MMU-based Paged Memory Management Support"
 252         default y
 253         help
 254           Select if you want MMU-based virtualised addressing space
 255           support by paged memory management. If unsure, say 'Y'.
 256
 257 #
 258 # The "ARM system type" choice list is ordered alphabetically by option
 259 # text.  Please add new entries in the option alphabetic order.
 260 #
 261 choice
 262         prompt "ARM system type"
 263         default ARCH_VERSATILE if !MMU
 264         default ARCH_MULTIPLATFORM if MMU
 265
 266 config ARCH_MULTIPLATFORM
 267         bool "Allow multiple platforms to be selected"
 268         depends on MMU
 269         select ARM_PATCH_PHYS_VIRT
 270         select AUTO_ZRELADDR
 271         select COMMON_CLK
 272         select MULTI_IRQ_HANDLER
 273         select SPARSE_IRQ
 274         select USE_OF
 275
 276 config ARCH_INTEGRATOR
 277         bool "ARM Ltd. Integrator family"
 278         select ARCH_HAS_CPUFREQ
 279         select ARM_AMBA
 280         select COMMON_CLK
 281         select COMMON_CLK_VERSATILE
 282         select GENERIC_CLOCKEVENTS
 283         select HAVE_TCM
 284         select ICST
 285         select MULTI_IRQ_HANDLER
 286         select NEED_MACH_MEMORY_H
 287         select PLAT_VERSATILE
 288         select SPARSE_IRQ
 289         select VERSATILE_FPGA_IRQ
 290         help
 291           Support for ARM's Integrator platform.
 292
 293 config ARCH_REALVIEW
 294         bool "ARM Ltd. RealView family"
 295         select ARCH_WANT_OPTIONAL_GPIOLIB
 296         select ARM_AMBA
 297         select ARM_TIMER_SP804
 298         select COMMON_CLK
 299         select COMMON_CLK_VERSATILE
 300         select GENERIC_CLOCKEVENTS
 301         select GPIO_PL061 if GPIOLIB
 302         select ICST
 303         select NEED_MACH_MEMORY_H
 304         select PLAT_VERSATILE
 305         select PLAT_VERSATILE_CLCD
 306         help
 307           This enables support for ARM Ltd RealView boards.
 308
 309 config ARCH_VERSATILE
 310         bool "ARM Ltd. Versatile family"
 311         select ARCH_WANT_OPTIONAL_GPIOLIB
 312         select ARM_AMBA
 313         select ARM_TIMER_SP804
 314         select ARM_VIC
 315         select CLKDEV_LOOKUP
 316         select GENERIC_CLOCKEVENTS
 317         select HAVE_MACH_CLKDEV
 318         select ICST
 319         select PLAT_VERSATILE
 320         select PLAT_VERSATILE_CLCD
 321         select PLAT_VERSATILE_CLOCK
 322         select VERSATILE_FPGA_IRQ
 323         help
 324           This enables support for ARM Ltd Versatile board.
 325
 326 config ARCH_AT91
 327         bool "Atmel AT91"
 328         select ARCH_REQUIRE_GPIOLIB
 329         select CLKDEV_LOOKUP
 330         select HAVE_CLK
 331         select IRQ_DOMAIN
 332         select NEED_MACH_GPIO_H
 333         select NEED_MACH_IO_H if PCCARD
 334         select PINCTRL
 335         select PINCTRL_AT91 if USE_OF
 336         help
 337           This enables support for systems based on Atmel
 338           AT91RM9200 and AT91SAM9* processors.
 339
 340 config ARCH_BCM2835
 341         bool "Broadcom BCM2835 family"
 342         select ARCH_REQUIRE_GPIOLIB
 343         select ARM_AMBA
 344         select ARM_ERRATA_411920
 345         select ARM_TIMER_SP804
 346         select CLKDEV_LOOKUP
 347         select CLKSRC_OF
 348         select COMMON_CLK
 349         select CPU_V6
 350         select GENERIC_CLOCKEVENTS
 351         select MULTI_IRQ_HANDLER
 352         select PINCTRL
 353         select PINCTRL_BCM2835
 354         select SPARSE_IRQ
 355         select USE_OF
 356         help
 357           This enables support for the Broadcom BCM2835 SoC. This SoC is
 358           use in the Raspberry Pi, and Roku 2 devices.
 359
 360 config ARCH_CNS3XXX
 361         bool "Cavium Networks CNS3XXX family"
 362         select ARM_GIC
 363         select CPU_V6K
 364         select GENERIC_CLOCKEVENTS
 365         select MIGHT_HAVE_CACHE_L2X0
 366         select MIGHT_HAVE_PCI
 367         select PCI_DOMAINS if PCI
 368         help
 369           Support for Cavium Networks CNS3XXX platform.
 370
 371 config ARCH_CLPS711X
 372         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 373         select ARCH_REQUIRE_GPIOLIB
 374         select AUTO_ZRELADDR
 375         select CLKDEV_LOOKUP
 376         select COMMON_CLK
 377         select CPU_ARM720T
 378         select GENERIC_CLOCKEVENTS
 379         select MULTI_IRQ_HANDLER
 380         select NEED_MACH_MEMORY_H
 381         select SPARSE_IRQ
 382         help
 383           Support for Cirrus Logic 711x/721x/731x based boards.
 384
 385 config ARCH_GEMINI
 386         bool "Cortina Systems Gemini"
 387         select ARCH_REQUIRE_GPIOLIB
 388         select ARCH_USES_GETTIMEOFFSET
 389         select CPU_FA526
 390         help
 391           Support for the Cortina Systems Gemini family SoCs
 392
 393 config ARCH_SIRF
 394         bool "CSR SiRF"
 395         select ARCH_REQUIRE_GPIOLIB
 396         select COMMON_CLK
 397         select GENERIC_CLOCKEVENTS
 398         select GENERIC_IRQ_CHIP
 399         select MIGHT_HAVE_CACHE_L2X0
 400         select NO_IOPORT
 401         select PINCTRL
 402         select PINCTRL_SIRF
 403         select USE_OF
 404         help
 405           Support for CSR SiRFprimaII/Marco/Polo platforms
 406
 407 config ARCH_EBSA110
 408         bool "EBSA-110"
 409         select ARCH_USES_GETTIMEOFFSET
 410         select CPU_SA110
 411         select ISA
 412         select NEED_MACH_IO_H
 413         select NEED_MACH_MEMORY_H
 414         select NO_IOPORT
 415         help
 416           This is an evaluation board for the StrongARM processor available
 417           from Digital. It has limited hardware on-board, including an
 418           Ethernet interface, two PCMCIA sockets, two serial ports and a
 419           parallel port.
 420
 421 config ARCH_EP93XX
 422         bool "EP93xx-based"
 423         select ARCH_HAS_HOLES_MEMORYMODEL
 424         select ARCH_REQUIRE_GPIOLIB
 425         select ARCH_USES_GETTIMEOFFSET
 426         select ARM_AMBA
 427         select ARM_VIC
 428         select CLKDEV_LOOKUP
 429         select CPU_ARM920T
 430         select NEED_MACH_MEMORY_H
 431         help
 432           This enables support for the Cirrus EP93xx series of CPUs.
 433
 434 config ARCH_FOOTBRIDGE
 435         bool "FootBridge"
 436         select CPU_SA110
 437         select FOOTBRIDGE
 438         select GENERIC_CLOCKEVENTS
 439         select HAVE_IDE
 440         select NEED_MACH_IO_H if !MMU
 441         select NEED_MACH_MEMORY_H
 442         help
 443           Support for systems based on the DC21285 companion chip
 444           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 445
 446 config ARCH_MXS
 447         bool "Freescale MXS-based"
 448         select ARCH_REQUIRE_GPIOLIB
 449         select CLKDEV_LOOKUP
 450         select CLKSRC_MMIO
 451         select COMMON_CLK
 452         select GENERIC_CLOCKEVENTS
 453         select HAVE_CLK_PREPARE
 454         select MULTI_IRQ_HANDLER
 455         select PINCTRL
 456         select SPARSE_IRQ
 457         select USE_OF
 458         help
 459           Support for Freescale MXS-based family of processors
 460
 461 config ARCH_NETX
 462         bool "Hilscher NetX based"
 463         select ARM_VIC
 464         select CLKSRC_MMIO
 465         select CPU_ARM926T
 466         select GENERIC_CLOCKEVENTS
 467         help
 468           This enables support for systems based on the Hilscher NetX Soc
 469
 470 config ARCH_H720X
 471         bool "Hynix HMS720x-based"
 472         select ARCH_USES_GETTIMEOFFSET
 473         select CPU_ARM720T
 474         select ISA_DMA_API
 475         help
 476           This enables support for systems based on the Hynix HMS720x
 477
 478 config ARCH_IOP13XX
 479         bool "IOP13xx-based"
 480         depends on MMU
 481         select ARCH_SUPPORTS_MSI
 482         select CPU_XSC3
 483         select NEED_MACH_MEMORY_H
 484         select NEED_RET_TO_USER
 485         select PCI
 486         select PLAT_IOP
 487         select VMSPLIT_1G
 488         help
 489           Support for Intel's IOP13XX (XScale) family of processors.
 490
 491 config ARCH_IOP32X
 492         bool "IOP32x-based"
 493         depends on MMU
 494         select ARCH_REQUIRE_GPIOLIB
 495         select CPU_XSCALE
 496         select NEED_MACH_GPIO_H
 497         select NEED_RET_TO_USER
 498         select PCI
 499         select PLAT_IOP
 500         help
 501           Support for Intel's 80219 and IOP32X (XScale) family of
 502           processors.
 503
 504 config ARCH_IOP33X
 505         bool "IOP33x-based"
 506         depends on MMU
 507         select ARCH_REQUIRE_GPIOLIB
 508         select CPU_XSCALE
 509         select NEED_MACH_GPIO_H
 510         select NEED_RET_TO_USER
 511         select PCI
 512         select PLAT_IOP
 513         help
 514           Support for Intel's IOP33X (XScale) family of processors.
 515
 516 config ARCH_IXP4XX
 517         bool "IXP4xx-based"
 518         depends on MMU
 519         select ARCH_HAS_DMA_SET_COHERENT_MASK
 520         select ARCH_REQUIRE_GPIOLIB
 521         select CLKSRC_MMIO
 522         select CPU_XSCALE
 523         select DMABOUNCE if PCI
 524         select GENERIC_CLOCKEVENTS
 525         select MIGHT_HAVE_PCI
 526         select NEED_MACH_IO_H
 527         help
 528           Support for Intel's IXP4XX (XScale) family of processors.
 529
 530 config ARCH_DOVE
 531         bool "Marvell Dove"
 532         select ARCH_REQUIRE_GPIOLIB
 533         select COMMON_CLK_DOVE
 534         select CPU_V7
 535         select GENERIC_CLOCKEVENTS
 536         select MIGHT_HAVE_PCI
 537         select PINCTRL
 538         select PINCTRL_DOVE
 539         select PLAT_ORION_LEGACY
 540         select USB_ARCH_HAS_EHCI
 541         help
 542           Support for the Marvell Dove SoC 88AP510
 543
 544 config ARCH_KIRKWOOD
 545         bool "Marvell Kirkwood"
 546         select ARCH_REQUIRE_GPIOLIB
 547         select CPU_FEROCEON
 548         select GENERIC_CLOCKEVENTS
 549         select PCI
 550         select PCI_QUIRKS
 551         select PINCTRL
 552         select PINCTRL_KIRKWOOD
 553         select PLAT_ORION_LEGACY
 554         help
 555           Support for the following Marvell Kirkwood series SoCs:
 556           88F6180, 88F6192 and 88F6281.
 557
 558 config ARCH_MV78XX0
 559         bool "Marvell MV78xx0"
 560         select ARCH_REQUIRE_GPIOLIB
 561         select CPU_FEROCEON
 562         select GENERIC_CLOCKEVENTS
 563         select PCI
 564         select PLAT_ORION_LEGACY
 565         help
 566           Support for the following Marvell MV78xx0 series SoCs:
 567           MV781x0, MV782x0.
 568
 569 config ARCH_ORION5X
 570         bool "Marvell Orion"
 571         depends on MMU
 572         select ARCH_REQUIRE_GPIOLIB
 573         select CPU_FEROCEON
 574         select GENERIC_CLOCKEVENTS
 575         select PCI
 576         select PLAT_ORION_LEGACY
 577         help
 578           Support for the following Marvell Orion 5x series SoCs:
 579           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 580           Orion-2 (5281), Orion-1-90 (6183).
 581
 582 config ARCH_MMP
 583         bool "Marvell PXA168/910/MMP2"
 584         depends on MMU
 585         select ARCH_REQUIRE_GPIOLIB
 586         select CLKDEV_LOOKUP
 587         select GENERIC_ALLOCATOR
 588         select GENERIC_CLOCKEVENTS
 589         select GPIO_PXA
 590         select IRQ_DOMAIN
 591         select NEED_MACH_GPIO_H
 592         select PINCTRL
 593         select PLAT_PXA
 594         select SPARSE_IRQ
 595         help
 596           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 597
 598 config ARCH_KS8695
 599         bool "Micrel/Kendin KS8695"
 600         select ARCH_REQUIRE_GPIOLIB
 601         select CLKSRC_MMIO
 602         select CPU_ARM922T
 603         select GENERIC_CLOCKEVENTS
 604         select NEED_MACH_MEMORY_H
 605         help
 606           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 607           System-on-Chip devices.
 608
 609 config ARCH_W90X900
 610         bool "Nuvoton W90X900 CPU"
 611         select ARCH_REQUIRE_GPIOLIB
 612         select CLKDEV_LOOKUP
 613         select CLKSRC_MMIO
 614         select CPU_ARM926T
 615         select GENERIC_CLOCKEVENTS
 616         help
 617           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 618           At present, the w90x900 has been renamed nuc900, regarding
 619           the ARM series product line, you can login the following
 620           link address to know more.
 621
 622           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 623                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 624
 625 config ARCH_LPC32XX
 626         bool "NXP LPC32XX"
 627         select ARCH_REQUIRE_GPIOLIB
 628         select ARM_AMBA
 629         select CLKDEV_LOOKUP
 630         select CLKSRC_MMIO
 631         select CPU_ARM926T
 632         select GENERIC_CLOCKEVENTS
 633         select HAVE_IDE
 634         select HAVE_PWM
 635         select USB_ARCH_HAS_OHCI
 636         select USE_OF
 637         help
 638           Support for the NXP LPC32XX family of processors
 639
 640 config ARCH_TEGRA
 641         bool "NVIDIA Tegra"
 642         select ARCH_HAS_CPUFREQ
 643         select CLKDEV_LOOKUP
 644         select CLKSRC_MMIO
 645         select CLKSRC_OF
 646         select COMMON_CLK
 647         select GENERIC_CLOCKEVENTS
 648         select HAVE_CLK
 649         select HAVE_SMP
 650         select MIGHT_HAVE_CACHE_L2X0
 651         select SPARSE_IRQ
 652         select USE_OF
 653         help
 654           This enables support for NVIDIA Tegra based systems (Tegra APX,
 655           Tegra 6xx and Tegra 2 series).
 656
 657 config ARCH_PXA
 658         bool "PXA2xx/PXA3xx-based"
 659         depends on MMU
 660         select ARCH_HAS_CPUFREQ
 661         select ARCH_MTD_XIP
 662         select ARCH_REQUIRE_GPIOLIB
 663         select ARM_CPU_SUSPEND if PM
 664         select AUTO_ZRELADDR
 665         select CLKDEV_LOOKUP
 666         select CLKSRC_MMIO
 667         select GENERIC_CLOCKEVENTS
 668         select GPIO_PXA
 669         select HAVE_IDE
 670         select MULTI_IRQ_HANDLER
 671         select NEED_MACH_GPIO_H
 672         select PLAT_PXA
 673         select SPARSE_IRQ
 674         help
 675           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 676
 677 config ARCH_MSM
 678         bool "Qualcomm MSM"
 679         select ARCH_REQUIRE_GPIOLIB
 680         select CLKDEV_LOOKUP
 681         select GENERIC_CLOCKEVENTS
 682         select HAVE_CLK
 683         help
 684           Support for Qualcomm MSM/QSD based systems.  This runs on the
 685           apps processor of the MSM/QSD and depends on a shared memory
 686           interface to the modem processor which runs the baseband
 687           stack and controls some vital subsystems
 688           (clock and power control, etc).
 689
 690 config ARCH_SHMOBILE
 691         bool "Renesas SH-Mobile / R-Mobile"
 692         select CLKDEV_LOOKUP
 693         select GENERIC_CLOCKEVENTS
 694         select HAVE_CLK
 695         select HAVE_MACH_CLKDEV
 696         select HAVE_SMP
 697         select MIGHT_HAVE_CACHE_L2X0
 698         select MULTI_IRQ_HANDLER
 699         select NEED_MACH_MEMORY_H
 700         select NO_IOPORT
 701         select PINCTRL
 702         select PM_GENERIC_DOMAINS if PM
 703         select SPARSE_IRQ
 704         help
 705           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 706
 707 config ARCH_RPC
 708         bool "RiscPC"
 709         select ARCH_ACORN
 710         select ARCH_MAY_HAVE_PC_FDC
 711         select ARCH_SPARSEMEM_ENABLE
 712         select ARCH_USES_GETTIMEOFFSET
 713         select FIQ
 714         select HAVE_IDE
 715         select HAVE_PATA_PLATFORM
 716         select ISA_DMA_API
 717         select NEED_MACH_IO_H
 718         select NEED_MACH_MEMORY_H
 719         select NO_IOPORT
 720         help
 721           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 722           CD-ROM interface, serial and parallel port, and the floppy drive.
 723
 724 config ARCH_SA1100
 725         bool "SA1100-based"
 726         select ARCH_HAS_CPUFREQ
 727         select ARCH_MTD_XIP
 728         select ARCH_REQUIRE_GPIOLIB
 729         select ARCH_SPARSEMEM_ENABLE
 730         select CLKDEV_LOOKUP
 731         select CLKSRC_MMIO
 732         select CPU_FREQ
 733         select CPU_SA1100
 734         select GENERIC_CLOCKEVENTS
 735         select HAVE_IDE
 736         select ISA
 737         select NEED_MACH_GPIO_H
 738         select NEED_MACH_MEMORY_H
 739         select SPARSE_IRQ
 740         help
 741           Support for StrongARM 11x0 based boards.
 742
 743 config ARCH_S3C24XX
 744         bool "Samsung S3C24XX SoCs"
 745         select ARCH_HAS_CPUFREQ
 746         select ARCH_USES_GETTIMEOFFSET
 747         select CLKDEV_LOOKUP
 748         select HAVE_CLK
 749         select HAVE_S3C2410_I2C if I2C
 750         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 751         select HAVE_S3C_RTC if RTC_CLASS
 752         select NEED_MACH_GPIO_H
 753         select NEED_MACH_IO_H
 754         help
 755           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 756           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 757           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 758           Samsung SMDK2410 development board (and derivatives).
 759
 760 config ARCH_S3C64XX
 761         bool "Samsung S3C64XX"
 762         select ARCH_HAS_CPUFREQ
 763         select ARCH_REQUIRE_GPIOLIB
 764         select ARCH_USES_GETTIMEOFFSET
 765         select ARM_VIC
 766         select CLKDEV_LOOKUP
 767         select CPU_V6
 768         select HAVE_CLK
 769         select HAVE_S3C2410_I2C if I2C
 770         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 771         select HAVE_TCM
 772         select NEED_MACH_GPIO_H
 773         select NO_IOPORT
 774         select PLAT_SAMSUNG
 775         select S3C_DEV_NAND
 776         select S3C_GPIO_TRACK
 777         select SAMSUNG_CLKSRC
 778         select SAMSUNG_GPIOLIB_4BIT
 779         select SAMSUNG_IRQ_VIC_TIMER
 780         select USB_ARCH_HAS_OHCI
 781         help
 782           Samsung S3C64XX series based systems
 783
 784 config ARCH_S5P64X0
 785         bool "Samsung S5P6440 S5P6450"
 786         select CLKDEV_LOOKUP
 787         select CLKSRC_MMIO
 788         select CPU_V6
 789         select GENERIC_CLOCKEVENTS
 790         select HAVE_CLK
 791         select HAVE_S3C2410_I2C if I2C
 792         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 793         select HAVE_S3C_RTC if RTC_CLASS
 794         select NEED_MACH_GPIO_H
 795         help
 796           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 797           SMDK6450.
 798
 799 config ARCH_S5PC100
 800         bool "Samsung S5PC100"
 801         select ARCH_USES_GETTIMEOFFSET
 802         select CLKDEV_LOOKUP
 803         select CPU_V7
 804         select HAVE_CLK
 805         select HAVE_S3C2410_I2C if I2C
 806         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 807         select HAVE_S3C_RTC if RTC_CLASS
 808         select NEED_MACH_GPIO_H
 809         help
 810           Samsung S5PC100 series based systems
 811
 812 config ARCH_S5PV210
 813         bool "Samsung S5PV210/S5PC110"
 814         select ARCH_HAS_CPUFREQ
 815         select ARCH_HAS_HOLES_MEMORYMODEL
 816         select ARCH_SPARSEMEM_ENABLE
 817         select CLKDEV_LOOKUP
 818         select CLKSRC_MMIO
 819         select CPU_V7
 820         select GENERIC_CLOCKEVENTS
 821         select HAVE_CLK
 822         select HAVE_S3C2410_I2C if I2C
 823         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 824         select HAVE_S3C_RTC if RTC_CLASS
 825         select NEED_MACH_GPIO_H
 826         select NEED_MACH_MEMORY_H
 827         help
 828           Samsung S5PV210/S5PC110 series based systems
 829
 830 config ARCH_EXYNOS
 831         bool "Samsung EXYNOS"
 832         select ARCH_HAS_CPUFREQ
 833         select ARCH_HAS_HOLES_MEMORYMODEL
 834         select ARCH_SPARSEMEM_ENABLE
 835         select CLKDEV_LOOKUP
 836         select CPU_V7
 837         select GENERIC_CLOCKEVENTS
 838         select HAVE_CLK
 839         select HAVE_S3C2410_I2C if I2C
 840         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 841         select HAVE_S3C_RTC if RTC_CLASS
 842         select NEED_MACH_GPIO_H
 843         select NEED_MACH_MEMORY_H
 844         help
 845           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 846
 847 config ARCH_SHARK
 848         bool "Shark"
 849         select ARCH_USES_GETTIMEOFFSET
 850         select CPU_SA110
 851         select ISA
 852         select ISA_DMA
 853         select NEED_MACH_MEMORY_H
 854         select PCI
 855         select ZONE_DMA
 856         help
 857           Support for the StrongARM based Digital DNARD machine, also known
 858           as "Shark" (<http://www.shark-linux.de/shark.html>).
 859
 860 config ARCH_U300
 861         bool "ST-Ericsson U300 Series"
 862         depends on MMU
 863         select ARCH_REQUIRE_GPIOLIB
 864         select ARM_AMBA
 865         select ARM_PATCH_PHYS_VIRT
 866         select ARM_VIC
 867         select CLKDEV_LOOKUP
 868         select CLKSRC_MMIO
 869         select COMMON_CLK
 870         select CPU_ARM926T
 871         select GENERIC_CLOCKEVENTS
 872         select HAVE_TCM
 873         select SPARSE_IRQ
 874         help
 875           Support for ST-Ericsson U300 series mobile platforms.
 876
 877 config ARCH_U8500
 878         bool "ST-Ericsson U8500 Series"
 879         depends on MMU
 880         select ARCH_HAS_CPUFREQ
 881         select ARCH_REQUIRE_GPIOLIB
 882         select ARM_AMBA
 883         select CLKDEV_LOOKUP
 884         select CPU_V7
 885         select GENERIC_CLOCKEVENTS
 886         select HAVE_SMP
 887         select MIGHT_HAVE_CACHE_L2X0
 888         select SPARSE_IRQ
 889         help
 890           Support for ST-Ericsson's Ux500 architecture
 891
 892 config ARCH_NOMADIK
 893         bool "STMicroelectronics Nomadik"
 894         select ARCH_REQUIRE_GPIOLIB
 895         select ARM_AMBA
 896         select ARM_VIC
 897         select COMMON_CLK
 898         select CPU_ARM926T
 899         select GENERIC_CLOCKEVENTS
 900         select MIGHT_HAVE_CACHE_L2X0
 901         select PINCTRL
 902         select PINCTRL_STN8815
 903         select SPARSE_IRQ
 904         help
 905           Support for the Nomadik platform by ST-Ericsson
 906
 907 config PLAT_SPEAR
 908         bool "ST SPEAr"
 909         select ARCH_HAS_CPUFREQ
 910         select ARCH_REQUIRE_GPIOLIB
 911         select ARM_AMBA
 912         select CLKDEV_LOOKUP
 913         select CLKSRC_MMIO
 914         select COMMON_CLK
 915         select GENERIC_CLOCKEVENTS
 916         select HAVE_CLK
 917         help
 918           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 919
 920 config ARCH_DAVINCI
 921         bool "TI DaVinci"
 922         select ARCH_HAS_HOLES_MEMORYMODEL
 923         select ARCH_REQUIRE_GPIOLIB
 924         select CLKDEV_LOOKUP
 925         select GENERIC_ALLOCATOR
 926         select GENERIC_CLOCKEVENTS
 927         select GENERIC_IRQ_CHIP
 928         select HAVE_IDE
 929         select NEED_MACH_GPIO_H
 930         select USE_OF
 931         select ZONE_DMA
 932         help
 933           Support for TI's DaVinci platform.
 934
 935 config ARCH_OMAP
 936         bool "TI OMAP"
 937         depends on MMU
 938         select ARCH_HAS_CPUFREQ
 939         select ARCH_HAS_HOLES_MEMORYMODEL
 940         select ARCH_REQUIRE_GPIOLIB
 941         select CLKSRC_MMIO
 942         select GENERIC_CLOCKEVENTS
 943         select HAVE_CLK
 944         help
 945           Support for TI's OMAP platform (OMAP1/2/3/4).
 946
 947 config ARCH_VT8500_SINGLE
 948         bool "VIA/WonderMedia 85xx"
 949         select ARCH_HAS_CPUFREQ
 950         select ARCH_REQUIRE_GPIOLIB
 951         select CLKDEV_LOOKUP
 952         select COMMON_CLK
 953         select CPU_ARM926T
 954         select GENERIC_CLOCKEVENTS
 955         select HAVE_CLK
 956         select MULTI_IRQ_HANDLER
 957         select SPARSE_IRQ
 958         select USE_OF
 959         help
 960           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 961
 962 endchoice
 963
 964 menu "Multiple platform selection"
 965         depends on ARCH_MULTIPLATFORM
 966
 967 comment "CPU Core family selection"
 968
 969 config ARCH_MULTI_V4
 970         bool "ARMv4 based platforms (FA526, StrongARM)"
 971         depends on !ARCH_MULTI_V6_V7
 972         select ARCH_MULTI_V4_V5
 973
 974 config ARCH_MULTI_V4T
 975         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 976         depends on !ARCH_MULTI_V6_V7
 977         select ARCH_MULTI_V4_V5
 978
 979 config ARCH_MULTI_V5
 980         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 981         depends on !ARCH_MULTI_V6_V7
 982         select ARCH_MULTI_V4_V5
 983
 984 config ARCH_MULTI_V4_V5
 985         bool
 986
 987 config ARCH_MULTI_V6
 988         bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
 989         select ARCH_MULTI_V6_V7
 990         select CPU_V6
 991
 992 config ARCH_MULTI_V7
 993         bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
 994         default y
 995         select ARCH_MULTI_V6_V7
 996         select ARCH_VEXPRESS
 997         select CPU_V7
 998
 999 config ARCH_MULTI_V6_V7
1000         bool
1001
1002 config ARCH_MULTI_CPU_AUTO
1003         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
1004         select ARCH_MULTI_V5
1005
1006 endmenu
1007
1008 #
1009 # This is sorted alphabetically by mach-* pathname.  However, plat-*
1010 # Kconfigs may be included either alphabetically (according to the
1011 # plat- suffix) or along side the corresponding mach-* source.
1012 #
1013 source "arch/arm/mach-mvebu/Kconfig"
1014
1015 source "arch/arm/mach-at91/Kconfig"
1016
1017 source "arch/arm/mach-bcm/Kconfig"
1018
1019 source "arch/arm/mach-clps711x/Kconfig"
1020
1021 source "arch/arm/mach-cns3xxx/Kconfig"
1022
1023 source "arch/arm/mach-davinci/Kconfig"
1024
1025 source "arch/arm/mach-dove/Kconfig"
1026
1027 source "arch/arm/mach-ep93xx/Kconfig"
1028
1029 source "arch/arm/mach-footbridge/Kconfig"
1030
1031 source "arch/arm/mach-gemini/Kconfig"
1032
1033 source "arch/arm/mach-h720x/Kconfig"
1034
1035 source "arch/arm/mach-highbank/Kconfig"
1036
1037 source "arch/arm/mach-integrator/Kconfig"
1038
1039 source "arch/arm/mach-iop32x/Kconfig"
1040
1041 source "arch/arm/mach-iop33x/Kconfig"
1042
1043 source "arch/arm/mach-iop13xx/Kconfig"
1044
1045 source "arch/arm/mach-ixp4xx/Kconfig"
1046
1047 source "arch/arm/mach-kirkwood/Kconfig"
1048
1049 source "arch/arm/mach-ks8695/Kconfig"
1050
1051 source "arch/arm/mach-msm/Kconfig"
1052
1053 source "arch/arm/mach-mv78xx0/Kconfig"
1054
1055 source "arch/arm/mach-imx/Kconfig"
1056
1057 source "arch/arm/mach-mxs/Kconfig"
1058
1059 source "arch/arm/mach-netx/Kconfig"
1060
1061 source "arch/arm/mach-nomadik/Kconfig"
1062
1063 source "arch/arm/plat-omap/Kconfig"
1064
1065 source "arch/arm/mach-omap1/Kconfig"
1066
1067 source "arch/arm/mach-omap2/Kconfig"
1068
1069 source "arch/arm/mach-orion5x/Kconfig"
1070
1071 source "arch/arm/mach-picoxcell/Kconfig"
1072
1073 source "arch/arm/mach-pxa/Kconfig"
1074 source "arch/arm/plat-pxa/Kconfig"
1075
1076 source "arch/arm/mach-mmp/Kconfig"
1077
1078 source "arch/arm/mach-realview/Kconfig"
1079
1080 source "arch/arm/mach-sa1100/Kconfig"
1081
1082 source "arch/arm/plat-samsung/Kconfig"
1083
1084 source "arch/arm/mach-socfpga/Kconfig"
1085
1086 source "arch/arm/plat-spear/Kconfig"
1087
1088 source "arch/arm/mach-s3c24xx/Kconfig"
1089
1090 if ARCH_S3C64XX
1091 source "arch/arm/mach-s3c64xx/Kconfig"
1092 endif
1093
1094 source "arch/arm/mach-s5p64x0/Kconfig"
1095
1096 source "arch/arm/mach-s5pc100/Kconfig"
1097
1098 source "arch/arm/mach-s5pv210/Kconfig"
1099
1100 source "arch/arm/mach-exynos/Kconfig"
1101
1102 source "arch/arm/mach-shmobile/Kconfig"
1103
1104 source "arch/arm/mach-sunxi/Kconfig"
1105
1106 source "arch/arm/mach-prima2/Kconfig"
1107
1108 source "arch/arm/mach-tegra/Kconfig"
1109
1110 source "arch/arm/mach-u300/Kconfig"
1111
1112 source "arch/arm/mach-ux500/Kconfig"
1113
1114 source "arch/arm/mach-versatile/Kconfig"
1115
1116 source "arch/arm/mach-vexpress/Kconfig"
1117 source "arch/arm/plat-versatile/Kconfig"
1118
1119 source "arch/arm/mach-vt8500/Kconfig"
1120
1121 source "arch/arm/mach-w90x900/Kconfig"
1122
1123 source "arch/arm/mach-zynq/Kconfig"
1124
1125 # Definitions to make life easier
1126 config ARCH_ACORN
1127         bool
1128
1129 config PLAT_IOP
1130         bool
1131         select GENERIC_CLOCKEVENTS
1132
1133 config PLAT_ORION
1134         bool
1135         select CLKSRC_MMIO
1136         select COMMON_CLK
1137         select GENERIC_IRQ_CHIP
1138         select IRQ_DOMAIN
1139
1140 config PLAT_ORION_LEGACY
1141         bool
1142         select PLAT_ORION
1143
1144 config PLAT_PXA
1145         bool
1146
1147 config PLAT_VERSATILE
1148         bool
1149
1150 config ARM_TIMER_SP804
1151         bool
1152         select CLKSRC_MMIO
1153         select HAVE_SCHED_CLOCK
1154
1155 source arch/arm/mm/Kconfig
1156
1157 config ARM_NR_BANKS
1158         int
1159         default 16 if ARCH_EP93XX
1160         default 8
1161
1162 config IWMMXT
1163         bool "Enable iWMMXt support"
1164         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1165         default y if PXA27x || PXA3xx || ARCH_MMP
1166         help
1167           Enable support for iWMMXt context switching at run time if
1168           running on a CPU that supports it.
1169
1170 config XSCALE_PMU
1171         bool
1172         depends on CPU_XSCALE
1173         default y
1174
1175 config MULTI_IRQ_HANDLER
1176         bool
1177         help
1178           Allow each machine to specify it's own IRQ handler at run time.
1179
1180 if !MMU
1181 source "arch/arm/Kconfig-nommu"
1182 endif
1183
1184 config ARM_ERRATA_326103
1185         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1186         depends on CPU_V6
1187         help
1188           Executing a SWP instruction to read-only memory does not set bit 11
1189           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1190           treat the access as a read, preventing a COW from occurring and
1191           causing the faulting task to livelock.
1192
1193 config ARM_ERRATA_411920
1194         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1195         depends on CPU_V6 || CPU_V6K
1196         help
1197           Invalidation of the Instruction Cache operation can
1198           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1199           It does not affect the MPCore. This option enables the ARM Ltd.
1200           recommended workaround.
1201
1202 config ARM_ERRATA_430973
1203         bool "ARM errata: Stale prediction on replaced interworking branch"
1204         depends on CPU_V7
1205         help
1206           This option enables the workaround for the 430973 Cortex-A8
1207           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1208           interworking branch is replaced with another code sequence at the
1209           same virtual address, whether due to self-modifying code or virtual
1210           to physical address re-mapping, Cortex-A8 does not recover from the
1211           stale interworking branch prediction. This results in Cortex-A8
1212           executing the new code sequence in the incorrect ARM or Thumb state.
1213           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1214           and also flushes the branch target cache at every context switch.
1215           Note that setting specific bits in the ACTLR register may not be
1216           available in non-secure mode.
1217
1218 config ARM_ERRATA_458693
1219         bool "ARM errata: Processor deadlock when a false hazard is created"
1220         depends on CPU_V7
1221         depends on !ARCH_MULTIPLATFORM
1222         help
1223           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1224           erratum. For very specific sequences of memory operations, it is
1225           possible for a hazard condition intended for a cache line to instead
1226           be incorrectly associated with a different cache line. This false
1227           hazard might then cause a processor deadlock. The workaround enables
1228           the L1 caching of the NEON accesses and disables the PLD instruction
1229           in the ACTLR register. Note that setting specific bits in the ACTLR
1230           register may not be available in non-secure mode.
1231
1232 config ARM_ERRATA_460075
1233         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1234         depends on CPU_V7
1235         depends on !ARCH_MULTIPLATFORM
1236         help
1237           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1238           erratum. Any asynchronous access to the L2 cache may encounter a
1239           situation in which recent store transactions to the L2 cache are lost
1240           and overwritten with stale memory contents from external memory. The
1241           workaround disables the write-allocate mode for the L2 cache via the
1242           ACTLR register. Note that setting specific bits in the ACTLR register
1243           may not be available in non-secure mode.
1244
1245 config ARM_ERRATA_742230
1246         bool "ARM errata: DMB operation may be faulty"
1247         depends on CPU_V7 && SMP
1248         depends on !ARCH_MULTIPLATFORM
1249         help
1250           This option enables the workaround for the 742230 Cortex-A9
1251           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1252           between two write operations may not ensure the correct visibility
1253           ordering of the two writes. This workaround sets a specific bit in
1254           the diagnostic register of the Cortex-A9 which causes the DMB
1255           instruction to behave as a DSB, ensuring the correct behaviour of
1256           the two writes.
1257
1258 config ARM_ERRATA_742231
1259         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1260         depends on CPU_V7 && SMP
1261         depends on !ARCH_MULTIPLATFORM
1262         help
1263           This option enables the workaround for the 742231 Cortex-A9
1264           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1265           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1266           accessing some data located in the same cache line, may get corrupted
1267           data due to bad handling of the address hazard when the line gets
1268           replaced from one of the CPUs at the same time as another CPU is
1269           accessing it. This workaround sets specific bits in the diagnostic
1270           register of the Cortex-A9 which reduces the linefill issuing
1271           capabilities of the processor.
1272
1273 config PL310_ERRATA_588369
1274         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1275         depends on CACHE_L2X0
1276         help
1277            The PL310 L2 cache controller implements three types of Clean &
1278            Invalidate maintenance operations: by Physical Address
1279            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1280            They are architecturally defined to behave as the execution of a
1281            clean operation followed immediately by an invalidate operation,
1282            both performing to the same memory location. This functionality
1283            is not correctly implemented in PL310 as clean lines are not
1284            invalidated as a result of these operations.
1285
1286 config ARM_ERRATA_720789
1287         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1288         depends on CPU_V7
1289         help
1290           This option enables the workaround for the 720789 Cortex-A9 (prior to
1291           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1292           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1293           As a consequence of this erratum, some TLB entries which should be
1294           invalidated are not, resulting in an incoherency in the system page
1295           tables. The workaround changes the TLB flushing routines to invalidate
1296           entries regardless of the ASID.
1297
1298 config PL310_ERRATA_727915
1299         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1300         depends on CACHE_L2X0
1301         help
1302           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1303           operation (offset 0x7FC). This operation runs in background so that
1304           PL310 can handle normal accesses while it is in progress. Under very
1305           rare circumstances, due to this erratum, write data can be lost when
1306           PL310 treats a cacheable write transaction during a Clean &
1307           Invalidate by Way operation.
1308
1309 config ARM_ERRATA_743622
1310         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1311         depends on CPU_V7
1312         depends on !ARCH_MULTIPLATFORM
1313         help
1314           This option enables the workaround for the 743622 Cortex-A9
1315           (r2p*) erratum. Under very rare conditions, a faulty
1316           optimisation in the Cortex-A9 Store Buffer may lead to data
1317           corruption. This workaround sets a specific bit in the diagnostic
1318           register of the Cortex-A9 which disables the Store Buffer
1319           optimisation, preventing the defect from occurring. This has no
1320           visible impact on the overall performance or power consumption of the
1321           processor.
1322
1323 config ARM_ERRATA_751472
1324         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1325         depends on CPU_V7
1326         depends on !ARCH_MULTIPLATFORM
1327         help
1328           This option enables the workaround for the 751472 Cortex-A9 (prior
1329           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1330           completion of a following broadcasted operation if the second
1331           operation is received by a CPU before the ICIALLUIS has completed,
1332           potentially leading to corrupted entries in the cache or TLB.
1333
1334 config PL310_ERRATA_753970
1335         bool "PL310 errata: cache sync operation may be faulty"
1336         depends on CACHE_PL310
1337         help
1338           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1339
1340           Under some condition the effect of cache sync operation on
1341           the store buffer still remains when the operation completes.
1342           This means that the store buffer is always asked to drain and
1343           this prevents it from merging any further writes. The workaround
1344           is to replace the normal offset of cache sync operation (0x730)
1345           by another offset targeting an unmapped PL310 register 0x740.
1346           This has the same effect as the cache sync operation: store buffer
1347           drain and waiting for all buffers empty.
1348
1349 config ARM_ERRATA_754322
1350         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1351         depends on CPU_V7
1352         help
1353           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1354           r3p*) erratum. A speculative memory access may cause a page table walk
1355           which starts prior to an ASID switch but completes afterwards. This
1356           can populate the micro-TLB with a stale entry which may be hit with
1357           the new ASID. This workaround places two dsb instructions in the mm
1358           switching code so that no page table walks can cross the ASID switch.
1359
1360 config ARM_ERRATA_754327
1361         bool "ARM errata: no automatic Store Buffer drain"
1362         depends on CPU_V7 && SMP
1363         help
1364           This option enables the workaround for the 754327 Cortex-A9 (prior to
1365           r2p0) erratum. The Store Buffer does not have any automatic draining
1366           mechanism and therefore a livelock may occur if an external agent
1367           continuously polls a memory location waiting to observe an update.
1368           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1369           written polling loops from denying visibility of updates to memory.
1370
1371 config ARM_ERRATA_364296
1372         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1373         depends on CPU_V6 && !SMP
1374         help
1375           This options enables the workaround for the 364296 ARM1136
1376           r0p2 erratum (possible cache data corruption with
1377           hit-under-miss enabled). It sets the undocumented bit 31 in
1378           the auxiliary control register and the FI bit in the control
1379           register, thus disabling hit-under-miss without putting the
1380           processor into full low interrupt latency mode. ARM11MPCore
1381           is not affected.
1382
1383 config ARM_ERRATA_764369
1384         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1385         depends on CPU_V7 && SMP
1386         help
1387           This option enables the workaround for erratum 764369
1388           affecting Cortex-A9 MPCore with two or more processors (all
1389           current revisions). Under certain timing circumstances, a data
1390           cache line maintenance operation by MVA targeting an Inner
1391           Shareable memory region may fail to proceed up to either the
1392           Point of Coherency or to the Point of Unification of the
1393           system. This workaround adds a DSB instruction before the
1394           relevant cache maintenance functions and sets a specific bit
1395           in the diagnostic control register of the SCU.
1396
1397 config PL310_ERRATA_769419
1398         bool "PL310 errata: no automatic Store Buffer drain"
1399         depends on CACHE_L2X0
1400         help
1401           On revisions of the PL310 prior to r3p2, the Store Buffer does
1402           not automatically drain. This can cause normal, non-cacheable
1403           writes to be retained when the memory system is idle, leading
1404           to suboptimal I/O performance for drivers using coherent DMA.
1405           This option adds a write barrier to the cpu_idle loop so that,
1406           on systems with an outer cache, the store buffer is drained
1407           explicitly.
1408
1409 config ARM_ERRATA_775420
1410        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1411        depends on CPU_V7
1412        help
1413          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1414          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1415          operation aborts with MMU exception, it might cause the processor
1416          to deadlock. This workaround puts DSB before executing ISB if
1417          an abort may occur on cache maintenance.
1418
1419 endmenu
1420
1421 source "arch/arm/common/Kconfig"
1422
1423 menu "Bus support"
1424
1425 config ARM_AMBA
1426         bool
1427
1428 config ISA
1429         bool
1430         help
1431           Find out whether you have ISA slots on your motherboard.  ISA is the
1432           name of a bus system, i.e. the way the CPU talks to the other stuff
1433           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1434           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1435           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1436
1437 # Select ISA DMA controller support
1438 config ISA_DMA
1439         bool
1440         select ISA_DMA_API
1441
1442 config ARCH_NO_VIRT_TO_BUS
1443         def_bool y
1444         depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
1445
1446 # Select ISA DMA interface
1447 config ISA_DMA_API
1448         bool
1449
1450 config PCI
1451         bool "PCI support" if MIGHT_HAVE_PCI
1452         help
1453           Find out whether you have a PCI motherboard. PCI is the name of a
1454           bus system, i.e. the way the CPU talks to the other stuff inside
1455           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1456           VESA. If you have PCI, say Y, otherwise N.
1457
1458 config PCI_DOMAINS
1459         bool
1460         depends on PCI
1461
1462 config PCI_NANOENGINE
1463         bool "BSE nanoEngine PCI support"
1464         depends on SA1100_NANOENGINE
1465         help
1466           Enable PCI on the BSE nanoEngine board.
1467
1468 config PCI_SYSCALL
1469         def_bool PCI
1470
1471 # Select the host bridge type
1472 config PCI_HOST_VIA82C505
1473         bool
1474         depends on PCI && ARCH_SHARK
1475         default y
1476
1477 config PCI_HOST_ITE8152
1478         bool
1479         depends on PCI && MACH_ARMCORE
1480         default y
1481         select DMABOUNCE
1482
1483 source "drivers/pci/Kconfig"
1484
1485 source "drivers/pcmcia/Kconfig"
1486
1487 endmenu
1488
1489 menu "Kernel Features"
1490
1491 config HAVE_SMP
1492         bool
1493         help
1494           This option should be selected by machines which have an SMP-
1495           capable CPU.
1496
1497           The only effect of this option is to make the SMP-related
1498           options available to the user for configuration.
1499
1500 config SMP
1501         bool "Symmetric Multi-Processing"
1502         depends on CPU_V6K || CPU_V7
1503         depends on GENERIC_CLOCKEVENTS
1504         depends on HAVE_SMP
1505         depends on MMU
1506         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1507         select USE_GENERIC_SMP_HELPERS
1508         help
1509           This enables support for systems with more than one CPU. If you have
1510           a system with only one CPU, like most personal computers, say N. If
1511           you have a system with more than one CPU, say Y.
1512
1513           If you say N here, the kernel will run on single and multiprocessor
1514           machines, but will use only one CPU of a multiprocessor machine. If
1515           you say Y here, the kernel will run on many, but not all, single
1516           processor machines. On a single processor machine, the kernel will
1517           run faster if you say N here.
1518
1519           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1520           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1521           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1522
1523           If you don't know what to do here, say N.
1524
1525 config SMP_ON_UP
1526         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1527         depends on SMP && !XIP_KERNEL
1528         default y
1529         help
1530           SMP kernels contain instructions which fail on non-SMP processors.
1531           Enabling this option allows the kernel to modify itself to make
1532           these instructions safe.  Disabling it allows about 1K of space
1533           savings.
1534
1535           If you don't know what to do here, say Y.
1536
1537 config ARM_CPU_TOPOLOGY
1538         bool "Support cpu topology definition"
1539         depends on SMP && CPU_V7
1540         default y
1541         help
1542           Support ARM cpu topology definition. The MPIDR register defines
1543           affinity between processors which is then used to describe the cpu
1544           topology of an ARM System.
1545
1546 config SCHED_MC
1547         bool "Multi-core scheduler support"
1548         depends on ARM_CPU_TOPOLOGY
1549         help
1550           Multi-core scheduler support improves the CPU scheduler's decision
1551           making when dealing with multi-core CPU chips at a cost of slightly
1552           increased overhead in some places. If unsure say N here.
1553
1554 config SCHED_SMT
1555         bool "SMT scheduler support"
1556         depends on ARM_CPU_TOPOLOGY
1557         help
1558           Improves the CPU scheduler's decision making when dealing with
1559           MultiThreading at a cost of slightly increased overhead in some
1560           places. If unsure say N here.
1561
1562 config HAVE_ARM_SCU
1563         bool
1564         help
1565           This option enables support for the ARM system coherency unit
1566
1567 config ARM_ARCH_TIMER
1568         bool "Architected timer support"
1569         depends on CPU_V7
1570         help
1571           This option enables support for the ARM architected timer
1572
1573 config HAVE_ARM_TWD
1574         bool
1575         depends on SMP
1576         help
1577           This options enables support for the ARM timer and watchdog unit
1578
1579 choice
1580         prompt "Memory split"
1581         default VMSPLIT_3G
1582         help
1583           Select the desired split between kernel and user memory.
1584
1585           If you are not absolutely sure what you are doing, leave this
1586           option alone!
1587
1588         config VMSPLIT_3G
1589                 bool "3G/1G user/kernel split"
1590         config VMSPLIT_2G
1591                 bool "2G/2G user/kernel split"
1592         config VMSPLIT_1G
1593                 bool "1G/3G user/kernel split"
1594 endchoice
1595
1596 config PAGE_OFFSET
1597         hex
1598         default 0x40000000 if VMSPLIT_1G
1599         default 0x80000000 if VMSPLIT_2G
1600         default 0xC0000000
1601
1602 config NR_CPUS
1603         int "Maximum number of CPUs (2-32)"
1604         range 2 32
1605         depends on SMP
1606         default "4"
1607
1608 config HOTPLUG_CPU
1609         bool "Support for hot-pluggable CPUs"
1610         depends on SMP && HOTPLUG
1611         help
1612           Say Y here to experiment with turning CPUs off and on.  CPUs
1613           can be controlled through /sys/devices/system/cpu.
1614
1615 config ARM_PSCI
1616         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1617         depends on CPU_V7
1618         help
1619           Say Y here if you want Linux to communicate with system firmware
1620           implementing the PSCI specification for CPU-centric power
1621           management operations described in ARM document number ARM DEN
1622           0022A ("Power State Coordination Interface System Software on
1623           ARM processors").
1624
1625 config LOCAL_TIMERS
1626         bool "Use local timer interrupts"
1627         depends on SMP
1628         default y
1629         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1630         help
1631           Enable support for local timers on SMP platforms, rather then the
1632           legacy IPI broadcast method.  Local timers allows the system
1633           accounting to be spread across the timer interval, preventing a
1634           "thundering herd" at every timer tick.
1635
1636 config ARCH_NR_GPIO
1637         int
1638         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1639         default 355 if ARCH_U8500
1640         default 264 if MACH_H4700
1641         default 512 if SOC_OMAP5
1642         default 288 if ARCH_VT8500 || ARCH_SUNXI
1643         default 0
1644         help
1645           Maximum number of GPIOs in the system.
1646
1647           If unsure, leave the default value.
1648
1649 source kernel/Kconfig.preempt
1650
1651 config HZ
1652         int
1653         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1654                 ARCH_S5PV210 || ARCH_EXYNOS4
1655         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1656         default AT91_TIMER_HZ if ARCH_AT91
1657         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1658         default 100
1659
1660 config SCHED_HRTICK
1661         def_bool HIGH_RES_TIMERS
1662
1663 config THUMB2_KERNEL
1664         bool "Compile the kernel in Thumb-2 mode"
1665         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1666         select AEABI
1667         select ARM_ASM_UNIFIED
1668         select ARM_UNWIND
1669         help
1670           By enabling this option, the kernel will be compiled in
1671           Thumb-2 mode. A compiler/assembler that understand the unified
1672           ARM-Thumb syntax is needed.
1673
1674           If unsure, say N.
1675
1676 config THUMB2_AVOID_R_ARM_THM_JUMP11
1677         bool "Work around buggy Thumb-2 short branch relocations in gas"
1678         depends on THUMB2_KERNEL && MODULES
1679         default y
1680         help
1681           Various binutils versions can resolve Thumb-2 branches to
1682           locally-defined, preemptible global symbols as short-range "b.n"
1683           branch instructions.
1684
1685           This is a problem, because there's no guarantee the final
1686           destination of the symbol, or any candidate locations for a
1687           trampoline, are within range of the branch.  For this reason, the
1688           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1689           relocation in modules at all, and it makes little sense to add
1690           support.
1691
1692           The symptom is that the kernel fails with an "unsupported
1693           relocation" error when loading some modules.
1694
1695           Until fixed tools are available, passing
1696           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1697           code which hits this problem, at the cost of a bit of extra runtime
1698           stack usage in some cases.
1699
1700           The problem is described in more detail at:
1701               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1702
1703           Only Thumb-2 kernels are affected.
1704
1705           Unless you are sure your tools don't have this problem, say Y.
1706
1707 config ARM_ASM_UNIFIED
1708         bool
1709
1710 config AEABI
1711         bool "Use the ARM EABI to compile the kernel"
1712         help
1713           This option allows for the kernel to be compiled using the latest
1714           ARM ABI (aka EABI).  This is only useful if you are using a user
1715           space environment that is also compiled with EABI.
1716
1717           Since there are major incompatibilities between the legacy ABI and
1718           EABI, especially with regard to structure member alignment, this
1719           option also changes the kernel syscall calling convention to
1720           disambiguate both ABIs and allow for backward compatibility support
1721           (selected with CONFIG_OABI_COMPAT).
1722
1723           To use this you need GCC version 4.0.0 or later.
1724
1725 config OABI_COMPAT
1726         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1727         depends on AEABI && !THUMB2_KERNEL
1728         default y
1729         help
1730           This option preserves the old syscall interface along with the
1731           new (ARM EABI) one. It also provides a compatibility layer to
1732           intercept syscalls that have structure arguments which layout
1733           in memory differs between the legacy ABI and the new ARM EABI
1734           (only for non "thumb" binaries). This option adds a tiny
1735           overhead to all syscalls and produces a slightly larger kernel.
1736           If you know you'll be using only pure EABI user space then you
1737           can say N here. If this option is not selected and you attempt
1738           to execute a legacy ABI binary then the result will be
1739           UNPREDICTABLE (in fact it can be predicted that it won't work
1740           at all). If in doubt say Y.
1741
1742 config ARCH_HAS_HOLES_MEMORYMODEL
1743         bool
1744
1745 config ARCH_SPARSEMEM_ENABLE
1746         bool
1747
1748 config ARCH_SPARSEMEM_DEFAULT
1749         def_bool ARCH_SPARSEMEM_ENABLE
1750
1751 config ARCH_SELECT_MEMORY_MODEL
1752         def_bool ARCH_SPARSEMEM_ENABLE
1753
1754 config HAVE_ARCH_PFN_VALID
1755         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1756
1757 config HIGHMEM
1758         bool "High Memory Support"
1759         depends on MMU
1760         help
1761           The address space of ARM processors is only 4 Gigabytes large
1762           and it has to accommodate user address space, kernel address
1763           space as well as some memory mapped IO. That means that, if you
1764           have a large amount of physical memory and/or IO, not all of the
1765           memory can be "permanently mapped" by the kernel. The physical
1766           memory that is not permanently mapped is called "high memory".
1767
1768           Depending on the selected kernel/user memory split, minimum
1769           vmalloc space and actual amount of RAM, you may not need this
1770           option which should result in a slightly faster kernel.
1771
1772           If unsure, say n.
1773
1774 config HIGHPTE
1775         bool "Allocate 2nd-level pagetables from highmem"
1776         depends on HIGHMEM
1777
1778 config HW_PERF_EVENTS
1779         bool "Enable hardware performance counter support for perf events"
1780         depends on PERF_EVENTS
1781         default y
1782         help
1783           Enable hardware performance counter support for perf events. If
1784           disabled, perf events will use software events only.
1785
1786 source "mm/Kconfig"
1787
1788 config FORCE_MAX_ZONEORDER
1789         int "Maximum zone order" if ARCH_SHMOBILE
1790         range 11 64 if ARCH_SHMOBILE
1791         default "12" if SOC_AM33XX
1792         default "9" if SA1111
1793         default "11"
1794         help
1795           The kernel memory allocator divides physically contiguous memory
1796           blocks into "zones", where each zone is a power of two number of
1797           pages.  This option selects the largest power of two that the kernel
1798           keeps in the memory allocator.  If you need to allocate very large
1799           blocks of physically contiguous memory, then you may need to
1800           increase this value.
1801
1802           This config option is actually maximum order plus one. For example,
1803           a value of 11 means that the largest free memory block is 2^10 pages.
1804
1805 config ALIGNMENT_TRAP
1806         bool
1807         depends on CPU_CP15_MMU
1808         default y if !ARCH_EBSA110
1809         select HAVE_PROC_CPU if PROC_FS
1810         help
1811           ARM processors cannot fetch/store information which is not
1812           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1813           address divisible by 4. On 32-bit ARM processors, these non-aligned
1814           fetch/store instructions will be emulated in software if you say
1815           here, which has a severe performance impact. This is necessary for
1816           correct operation of some network protocols. With an IP-only
1817           configuration it is safe to say N, otherwise say Y.
1818
1819 config UACCESS_WITH_MEMCPY
1820         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1821         depends on MMU
1822         default y if CPU_FEROCEON
1823         help
1824           Implement faster copy_to_user and clear_user methods for CPU
1825           cores where a 8-word STM instruction give significantly higher
1826           memory write throughput than a sequence of individual 32bit stores.
1827
1828           A possible side effect is a slight increase in scheduling latency
1829           between threads sharing the same address space if they invoke
1830           such copy operations with large buffers.
1831
1832           However, if the CPU data cache is using a write-allocate mode,
1833           this option is unlikely to provide any performance gain.
1834
1835 config SECCOMP
1836         bool
1837         prompt "Enable seccomp to safely compute untrusted bytecode"
1838         ---help---
1839           This kernel feature is useful for number crunching applications
1840           that may need to compute untrusted bytecode during their
1841           execution. By using pipes or other transports made available to
1842           the process as file descriptors supporting the read/write
1843           syscalls, it's possible to isolate those applications in
1844           their own address space using seccomp. Once seccomp is
1845           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1846           and the task is only allowed to execute a few safe syscalls
1847           defined by each seccomp mode.
1848
1849 config CC_STACKPROTECTOR
1850         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1851         help
1852           This option turns on the -fstack-protector GCC feature. This
1853           feature puts, at the beginning of functions, a canary value on
1854           the stack just before the return address, and validates
1855           the value just before actually returning.  Stack based buffer
1856           overflows (that need to overwrite this return address) now also
1857           overwrite the canary, which gets detected and the attack is then
1858           neutralized via a kernel panic.
1859           This feature requires gcc version 4.2 or above.
1860
1861 config XEN_DOM0
1862         def_bool y
1863         depends on XEN
1864
1865 config XEN
1866         bool "Xen guest support on ARM (EXPERIMENTAL)"
1867         depends on ARM && OF
1868         depends on CPU_V7 && !CPU_V6
1869         help
1870           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1871
1872 endmenu
1873
1874 menu "Boot options"
1875
1876 config USE_OF
1877         bool "Flattened Device Tree support"
1878         select IRQ_DOMAIN
1879         select OF
1880         select OF_EARLY_FLATTREE
1881         help
1882           Include support for flattened device tree machine descriptions.
1883
1884 config ATAGS
1885         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1886         default y
1887         help
1888           This is the traditional way of passing data to the kernel at boot
1889           time. If you are solely relying on the flattened device tree (or
1890           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1891           to remove ATAGS support from your kernel binary.  If unsure,
1892           leave this to y.
1893
1894 config DEPRECATED_PARAM_STRUCT
1895         bool "Provide old way to pass kernel parameters"
1896         depends on ATAGS
1897         help
1898           This was deprecated in 2001 and announced to live on for 5 years.
1899           Some old boot loaders still use this way.
1900
1901 # Compressed boot loader in ROM.  Yes, we really want to ask about
1902 # TEXT and BSS so we preserve their values in the config files.
1903 config ZBOOT_ROM_TEXT
1904         hex "Compressed ROM boot loader base address"
1905         default "0"
1906         help
1907           The physical address at which the ROM-able zImage is to be
1908           placed in the target.  Platforms which normally make use of
1909           ROM-able zImage formats normally set this to a suitable
1910           value in their defconfig file.
1911
1912           If ZBOOT_ROM is not enabled, this has no effect.
1913
1914 config ZBOOT_ROM_BSS
1915         hex "Compressed ROM boot loader BSS address"
1916         default "0"
1917         help
1918           The base address of an area of read/write memory in the target
1919           for the ROM-able zImage which must be available while the
1920           decompressor is running. It must be large enough to hold the
1921           entire decompressed kernel plus an additional 128 KiB.
1922           Platforms which normally make use of ROM-able zImage formats
1923           normally set this to a suitable value in their defconfig file.
1924
1925           If ZBOOT_ROM is not enabled, this has no effect.
1926
1927 config ZBOOT_ROM
1928         bool "Compressed boot loader in ROM/flash"
1929         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1930         help
1931           Say Y here if you intend to execute your compressed kernel image
1932           (zImage) directly from ROM or flash.  If unsure, say N.
1933
1934 choice
1935         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1936         depends on ZBOOT_ROM && ARCH_SH7372
1937         default ZBOOT_ROM_NONE
1938         help
1939           Include experimental SD/MMC loading code in the ROM-able zImage.
1940           With this enabled it is possible to write the ROM-able zImage
1941           kernel image to an MMC or SD card and boot the kernel straight
1942           from the reset vector. At reset the processor Mask ROM will load
1943           the first part of the ROM-able zImage which in turn loads the
1944           rest the kernel image to RAM.
1945
1946 config ZBOOT_ROM_NONE
1947         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1948         help
1949           Do not load image from SD or MMC
1950
1951 config ZBOOT_ROM_MMCIF
1952         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1953         help
1954           Load image from MMCIF hardware block.
1955
1956 config ZBOOT_ROM_SH_MOBILE_SDHI
1957         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1958         help
1959           Load image from SDHI hardware block
1960
1961 endchoice
1962
1963 config ARM_APPENDED_DTB
1964         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1965         depends on OF && !ZBOOT_ROM
1966         help
1967           With this option, the boot code will look for a device tree binary
1968           (DTB) appended to zImage
1969           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1970
1971           This is meant as a backward compatibility convenience for those
1972           systems with a bootloader that can't be upgraded to accommodate
1973           the documented boot protocol using a device tree.
1974
1975           Beware that there is very little in terms of protection against
1976           this option being confused by leftover garbage in memory that might
1977           look like a DTB header after a reboot if no actual DTB is appended
1978           to zImage.  Do not leave this option active in a production kernel
1979           if you don't intend to always append a DTB.  Proper passing of the
1980           location into r2 of a bootloader provided DTB is always preferable
1981           to this option.
1982
1983 config ARM_ATAG_DTB_COMPAT
1984         bool "Supplement the appended DTB with traditional ATAG information"
1985         depends on ARM_APPENDED_DTB
1986         help
1987           Some old bootloaders can't be updated to a DTB capable one, yet
1988           they provide ATAGs with memory configuration, the ramdisk address,
1989           the kernel cmdline string, etc.  Such information is dynamically
1990           provided by the bootloader and can't always be stored in a static
1991           DTB.  To allow a device tree enabled kernel to be used with such
1992           bootloaders, this option allows zImage to extract the information
1993           from the ATAG list and store it at run time into the appended DTB.
1994
1995 choice
1996         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1997         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1998
1999 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
2000         bool "Use bootloader kernel arguments if available"
2001         help
2002           Uses the command-line options passed by the boot loader instead of
2003           the device tree bootargs property. If the boot loader doesn't provide
2004           any, the device tree bootargs property will be used.
2005
2006 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
2007         bool "Extend with bootloader kernel arguments"
2008         help
2009           The command-line arguments provided by the boot loader will be
2010           appended to the the device tree bootargs property.
2011
2012 endchoice
2013
2014 config CMDLINE
2015         string "Default kernel command string"
2016         default ""
2017         help
2018           On some architectures (EBSA110 and CATS), there is currently no way
2019           for the boot loader to pass arguments to the kernel. For these
2020           architectures, you should supply some command-line options at build
2021           time by entering them here. As a minimum, you should specify the
2022           memory size and the root device (e.g., mem=64M root=/dev/nfs).
2023
2024 choice
2025         prompt "Kernel command line type" if CMDLINE != ""
2026         default CMDLINE_FROM_BOOTLOADER
2027         depends on ATAGS
2028
2029 config CMDLINE_FROM_BOOTLOADER
2030         bool "Use bootloader kernel arguments if available"
2031         help
2032           Uses the command-line options passed by the boot loader. If
2033           the boot loader doesn't provide any, the default kernel command
2034           string provided in CMDLINE will be used.
2035
2036 config CMDLINE_EXTEND
2037         bool "Extend bootloader kernel arguments"
2038         help
2039           The command-line arguments provided by the boot loader will be
2040           appended to the default kernel command string.
2041
2042 config CMDLINE_FORCE
2043         bool "Always use the default kernel command string"
2044         help
2045           Always use the default kernel command string, even if the boot
2046           loader passes other arguments to the kernel.
2047           This is useful if you cannot or don't want to change the
2048           command-line options your boot loader passes to the kernel.
2049 endchoice
2050
2051 config XIP_KERNEL
2052         bool "Kernel Execute-In-Place from ROM"
2053         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
2054         help
2055           Execute-In-Place allows the kernel to run from non-volatile storage
2056           directly addressable by the CPU, such as NOR flash. This saves RAM
2057           space since the text section of the kernel is not loaded from flash
2058           to RAM.  Read-write sections, such as the data section and stack,
2059           are still copied to RAM.  The XIP kernel is not compressed since
2060           it has to run directly from flash, so it will take more space to
2061           store it.  The flash address used to link the kernel object files,
2062           and for storing it, is configuration dependent. Therefore, if you
2063           say Y here, you must know the proper physical address where to
2064           store the kernel image depending on your own flash memory usage.
2065
2066           Also note that the make target becomes "make xipImage" rather than
2067           "make zImage" or "make Image".  The final kernel binary to put in
2068           ROM memory will be arch/arm/boot/xipImage.
2069
2070           If unsure, say N.
2071
2072 config XIP_PHYS_ADDR
2073         hex "XIP Kernel Physical Location"
2074         depends on XIP_KERNEL
2075         default "0x00080000"
2076         help
2077           This is the physical address in your flash memory the kernel will
2078           be linked for and stored to.  This address is dependent on your
2079           own flash usage.
2080
2081 config KEXEC
2082         bool "Kexec system call (EXPERIMENTAL)"
2083         depends on (!SMP || HOTPLUG_CPU)
2084         help
2085           kexec is a system call that implements the ability to shutdown your
2086           current kernel, and to start another kernel.  It is like a reboot
2087           but it is independent of the system firmware.   And like a reboot
2088           you can start any kernel with it, not just Linux.
2089
2090           It is an ongoing process to be certain the hardware in a machine
2091           is properly shutdown, so do not be surprised if this code does not
2092           initially work for you.  It may help to enable device hotplugging
2093           support.
2094
2095 config ATAGS_PROC
2096         bool "Export atags in procfs"
2097         depends on ATAGS && KEXEC
2098         default y
2099         help
2100           Should the atags used to boot the kernel be exported in an "atags"
2101           file in procfs. Useful with kexec.
2102
2103 config CRASH_DUMP
2104         bool "Build kdump crash kernel (EXPERIMENTAL)"
2105         help
2106           Generate crash dump after being started by kexec. This should
2107           be normally only set in special crash dump kernels which are
2108           loaded in the main kernel with kexec-tools into a specially
2109           reserved region and then later executed after a crash by
2110           kdump/kexec. The crash dump kernel must be compiled to a
2111           memory address not used by the main kernel
2112
2113           For more details see Documentation/kdump/kdump.txt
2114
2115 config AUTO_ZRELADDR
2116         bool "Auto calculation of the decompressed kernel image address"
2117         depends on !ZBOOT_ROM && !ARCH_U300
2118         help
2119           ZRELADDR is the physical address where the decompressed kernel
2120           image will be placed. If AUTO_ZRELADDR is selected, the address
2121           will be determined at run-time by masking the current IP with
2122           0xf8000000. This assumes the zImage being placed in the first 128MB
2123           from start of memory.
2124
2125 endmenu
2126
2127 menu "CPU Power Management"
2128
2129 if ARCH_HAS_CPUFREQ
2130
2131 source "drivers/cpufreq/Kconfig"
2132
2133 config CPU_FREQ_IMX
2134         tristate "CPUfreq driver for i.MX CPUs"
2135         depends on ARCH_MXC && CPU_FREQ
2136         select CPU_FREQ_TABLE
2137         help
2138           This enables the CPUfreq driver for i.MX CPUs.
2139
2140 config CPU_FREQ_SA1100
2141         bool
2142
2143 config CPU_FREQ_SA1110
2144         bool
2145
2146 config CPU_FREQ_INTEGRATOR
2147         tristate "CPUfreq driver for ARM Integrator CPUs"
2148         depends on ARCH_INTEGRATOR && CPU_FREQ
2149         default y
2150         help
2151           This enables the CPUfreq driver for ARM Integrator CPUs.
2152
2153           For details, take a look at <file:Documentation/cpu-freq>.
2154
2155           If in doubt, say Y.
2156
2157 config CPU_FREQ_PXA
2158         bool
2159         depends on CPU_FREQ && ARCH_PXA && PXA25x
2160         default y
2161         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2162         select CPU_FREQ_TABLE
2163
2164 config CPU_FREQ_S3C
2165         bool
2166         help
2167           Internal configuration node for common cpufreq on Samsung SoC
2168
2169 config CPU_FREQ_S3C24XX
2170         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2171         depends on ARCH_S3C24XX && CPU_FREQ
2172         select CPU_FREQ_S3C
2173         help
2174           This enables the CPUfreq driver for the Samsung S3C24XX family
2175           of CPUs.
2176
2177           For details, take a look at <file:Documentation/cpu-freq>.
2178
2179           If in doubt, say N.
2180
2181 config CPU_FREQ_S3C24XX_PLL
2182         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2183         depends on CPU_FREQ_S3C24XX
2184         help
2185           Compile in support for changing the PLL frequency from the
2186           S3C24XX series CPUfreq driver. The PLL takes time to settle
2187           after a frequency change, so by default it is not enabled.
2188
2189           This also means that the PLL tables for the selected CPU(s) will
2190           be built which may increase the size of the kernel image.
2191
2192 config CPU_FREQ_S3C24XX_DEBUG
2193         bool "Debug CPUfreq Samsung driver core"
2194         depends on CPU_FREQ_S3C24XX
2195         help
2196           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2197
2198 config CPU_FREQ_S3C24XX_IODEBUG
2199         bool "Debug CPUfreq Samsung driver IO timing"
2200         depends on CPU_FREQ_S3C24XX
2201         help
2202           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2203
2204 config CPU_FREQ_S3C24XX_DEBUGFS
2205         bool "Export debugfs for CPUFreq"
2206         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2207         help
2208           Export status information via debugfs.
2209
2210 endif
2211
2212 source "drivers/cpuidle/Kconfig"
2213
2214 endmenu
2215
2216 menu "Floating point emulation"
2217
2218 comment "At least one emulation must be selected"
2219
2220 config FPE_NWFPE
2221         bool "NWFPE math emulation"
2222         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2223         ---help---
2224           Say Y to include the NWFPE floating point emulator in the kernel.
2225           This is necessary to run most binaries. Linux does not currently
2226           support floating point hardware so you need to say Y here even if
2227           your machine has an FPA or floating point co-processor podule.
2228
2229           You may say N here if you are going to load the Acorn FPEmulator
2230           early in the bootup.
2231
2232 config FPE_NWFPE_XP
2233         bool "Support extended precision"
2234         depends on FPE_NWFPE
2235         help
2236           Say Y to include 80-bit support in the kernel floating-point
2237           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2238           Note that gcc does not generate 80-bit operations by default,
2239           so in most cases this option only enlarges the size of the
2240           floating point emulator without any good reason.
2241
2242           You almost surely want to say N here.
2243
2244 config FPE_FASTFPE
2245         bool "FastFPE math emulation (EXPERIMENTAL)"
2246         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2247         ---help---
2248           Say Y here to include the FAST floating point emulator in the kernel.
2249           This is an experimental much faster emulator which now also has full
2250           precision for the mantissa.  It does not support any exceptions.
2251           It is very simple, and approximately 3-6 times faster than NWFPE.
2252
2253           It should be sufficient for most programs.  It may be not suitable
2254           for scientific calculations, but you have to check this for yourself.
2255           If you do not feel you need a faster FP emulation you should better
2256           choose NWFPE.
2257
2258 config VFP
2259         bool "VFP-format floating point maths"
2260         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2261         help
2262           Say Y to include VFP support code in the kernel. This is needed
2263           if your hardware includes a VFP unit.
2264
2265           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2266           release notes and additional status information.
2267
2268           Say N if your target does not have VFP hardware.
2269
2270 config VFPv3
2271         bool
2272         depends on VFP
2273         default y if CPU_V7
2274
2275 config NEON
2276         bool "Advanced SIMD (NEON) Extension support"
2277         depends on VFPv3 && CPU_V7
2278         help
2279           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2280           Extension.
2281
2282 endmenu
2283
2284 menu "Userspace binary formats"
2285
2286 source "fs/Kconfig.binfmt"
2287
2288 config ARTHUR
2289         tristate "RISC OS personality"
2290         depends on !AEABI
2291         help
2292           Say Y here to include the kernel code necessary if you want to run
2293           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2294           experimental; if this sounds frightening, say N and sleep in peace.
2295           You can also say M here to compile this support as a module (which
2296           will be called arthur).
2297
2298 endmenu
2299
2300 menu "Power management options"
2301
2302 source "kernel/power/Kconfig"
2303
2304 config ARCH_SUSPEND_POSSIBLE
2305         depends on !ARCH_S5PC100
2306         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2307                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2308         def_bool y
2309
2310 config ARM_CPU_SUSPEND
2311         def_bool PM_SLEEP
2312
2313 endmenu
2314
2315 source "net/Kconfig"
2316
2317 source "drivers/Kconfig"
2318
2319 source "fs/Kconfig"
2320
2321 source "arch/arm/Kconfig.debug"
2322
2323 source "security/Kconfig"
2324
2325 source "crypto/Kconfig"
2326
2327 source "lib/Kconfig"
2328
2329 source "arch/arm/kvm/Kconfig"