arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAVE_CUSTOM_GPIO_H
   7         select ARCH_WANT_IPC_PARSE_VERSION
   8         select BUILDTIME_EXTABLE_SORT if MMU
   9         select CPU_PM if (SUSPEND || CPU_IDLE)
  10         select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
  11         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  12         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  13         select GENERIC_IRQ_PROBE
  14         select GENERIC_IRQ_SHOW
  15         select GENERIC_PCI_IOMAP
  16         select GENERIC_SMP_IDLE_THREAD
  17         select GENERIC_STRNCPY_FROM_USER
  18         select GENERIC_STRNLEN_USER
  19         select HARDIRQS_SW_RESEND
  20         select HAVE_AOUT
  21         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  22         select HAVE_ARCH_KGDB
  23         select HAVE_ARCH_SECCOMP_FILTER
  24         select HAVE_ARCH_TRACEHOOK
  25         select HAVE_BPF_JIT
  26         select HAVE_C_RECORDMCOUNT
  27         select HAVE_DEBUG_KMEMLEAK
  28         select HAVE_DMA_API_DEBUG
  29         select HAVE_DMA_ATTRS
  30         select HAVE_DMA_CONTIGUOUS if MMU
  31         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  32         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  33         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  34         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  35         select HAVE_GENERIC_DMA_COHERENT
  36         select HAVE_GENERIC_HARDIRQS
  37         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  38         select HAVE_IDE if PCI || ISA || PCMCIA
  39         select HAVE_KERNEL_GZIP
  40         select HAVE_KERNEL_LZMA
  41         select HAVE_KERNEL_LZO
  42         select HAVE_KERNEL_XZ
  43         select HAVE_KPROBES if !XIP_KERNEL
  44         select HAVE_KRETPROBES if (HAVE_KPROBES)
  45         select HAVE_MEMBLOCK
  46         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  47         select HAVE_PERF_EVENTS
  48         select HAVE_REGS_AND_STACK_ACCESS_API
  49         select HAVE_SYSCALL_TRACEPOINTS
  50         select HAVE_UID16
  51         select KTIME_SCALAR
  52         select PERF_USE_VMALLOC
  53         select RTC_LIB
  54         select SYS_SUPPORTS_APM_EMULATION
  55         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  56         select MODULES_USE_ELF_REL
  57         select CLONE_BACKWARDS
  58         help
  59           The ARM series is a line of low-power-consumption RISC chip designs
  60           licensed by ARM Ltd and targeted at embedded applications and
  61           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  62           manufactured, but legacy ARM-based PC hardware remains popular in
  63           Europe.  There is an ARM Linux project with a web page at
  64           <http://www.arm.linux.org.uk/>.
  65
  66 config ARM_HAS_SG_CHAIN
  67         bool
  68
  69 config NEED_SG_DMA_LENGTH
  70         bool
  71
  72 config ARM_DMA_USE_IOMMU
  73         bool
  74         select ARM_HAS_SG_CHAIN
  75         select NEED_SG_DMA_LENGTH
  76
  77 config HAVE_PWM
  78         bool
  79
  80 config MIGHT_HAVE_PCI
  81         bool
  82
  83 config SYS_SUPPORTS_APM_EMULATION
  84         bool
  85
  86 config GENERIC_GPIO
  87         bool
  88
  89 config HAVE_TCM
  90         bool
  91         select GENERIC_ALLOCATOR
  92
  93 config HAVE_PROC_CPU
  94         bool
  95
  96 config NO_IOPORT
  97         bool
  98
  99 config EISA
 100         bool
 101         ---help---
 102           The Extended Industry Standard Architecture (EISA) bus was
 103           developed as an open alternative to the IBM MicroChannel bus.
 104
 105           The EISA bus provided some of the features of the IBM MicroChannel
 106           bus while maintaining backward compatibility with cards made for
 107           the older ISA bus.  The EISA bus saw limited use between 1988 and
 108           1995 when it was made obsolete by the PCI bus.
 109
 110           Say Y here if you are building a kernel for an EISA-based machine.
 111
 112           Otherwise, say N.
 113
 114 config SBUS
 115         bool
 116
 117 config STACKTRACE_SUPPORT
 118         bool
 119         default y
 120
 121 config HAVE_LATENCYTOP_SUPPORT
 122         bool
 123         depends on !SMP
 124         default y
 125
 126 config LOCKDEP_SUPPORT
 127         bool
 128         default y
 129
 130 config TRACE_IRQFLAGS_SUPPORT
 131         bool
 132         default y
 133
 134 config RWSEM_GENERIC_SPINLOCK
 135         bool
 136         default y
 137
 138 config RWSEM_XCHGADD_ALGORITHM
 139         bool
 140
 141 config ARCH_HAS_ILOG2_U32
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U64
 145         bool
 146
 147 config ARCH_HAS_CPUFREQ
 148         bool
 149         help
 150           Internal node to signify that the ARCH has CPUFREQ support
 151           and that the relevant menu configurations are displayed for
 152           it.
 153
 154 config GENERIC_HWEIGHT
 155         bool
 156         default y
 157
 158 config GENERIC_CALIBRATE_DELAY
 159         bool
 160         default y
 161
 162 config ARCH_MAY_HAVE_PC_FDC
 163         bool
 164
 165 config ZONE_DMA
 166         bool
 167
 168 config NEED_DMA_MAP_STATE
 169        def_bool y
 170
 171 config ARCH_HAS_DMA_SET_COHERENT_MASK
 172         bool
 173
 174 config GENERIC_ISA_DMA
 175         bool
 176
 177 config FIQ
 178         bool
 179
 180 config NEED_RET_TO_USER
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 196         default y
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary.
 206
 207           Only disable this option if you know that you do not require
 208           this feature (eg, building a kernel for a single machine) and
 209           you need to shrink the kernel to the minimal size.
 210
 211 config NEED_MACH_GPIO_H
 212         bool
 213         help
 214           Select this when mach/gpio.h is required to provide special
 215           definitions for this platform. The need for mach/gpio.h should
 216           be avoided when possible.
 217
 218 config NEED_MACH_IO_H
 219         bool
 220         help
 221           Select this when mach/io.h is required to provide special
 222           definitions for this platform.  The need for mach/io.h should
 223           be avoided when possible.
 224
 225 config NEED_MACH_MEMORY_H
 226         bool
 227         help
 228           Select this when mach/memory.h is required to provide special
 229           definitions for this platform.  The need for mach/memory.h should
 230           be avoided when possible.
 231
 232 config PHYS_OFFSET
 233         hex "Physical address of main memory" if MMU
 234         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 235         default DRAM_BASE if !MMU
 236         help
 237           Please provide the physical address corresponding to the
 238           location of main memory in your system.
 239
 240 config GENERIC_BUG
 241         def_bool y
 242         depends on BUG
 243
 244 source "init/Kconfig"
 245
 246 source "kernel/Kconfig.freezer"
 247
 248 menu "System Type"
 249
 250 config MMU
 251         bool "MMU-based Paged Memory Management Support"
 252         default y
 253         help
 254           Select if you want MMU-based virtualised addressing space
 255           support by paged memory management. If unsure, say 'Y'.
 256
 257 #
 258 # The "ARM system type" choice list is ordered alphabetically by option
 259 # text.  Please add new entries in the option alphabetic order.
 260 #
 261 choice
 262         prompt "ARM system type"
 263         default ARCH_VERSATILE if !MMU
 264         default ARCH_MULTIPLATFORM if MMU
 265
 266 config ARCH_MULTIPLATFORM
 267         bool "Allow multiple platforms to be selected"
 268         depends on MMU
 269         select ARM_PATCH_PHYS_VIRT
 270         select AUTO_ZRELADDR
 271         select COMMON_CLK
 272         select MULTI_IRQ_HANDLER
 273         select SPARSE_IRQ
 274         select USE_OF
 275
 276 config ARCH_INTEGRATOR
 277         bool "ARM Ltd. Integrator family"
 278         select ARCH_HAS_CPUFREQ
 279         select ARM_AMBA
 280         select COMMON_CLK
 281         select COMMON_CLK_VERSATILE
 282         select GENERIC_CLOCKEVENTS
 283         select HAVE_TCM
 284         select ICST
 285         select MULTI_IRQ_HANDLER
 286         select NEED_MACH_MEMORY_H
 287         select PLAT_VERSATILE
 288         select SPARSE_IRQ
 289         select VERSATILE_FPGA_IRQ
 290         help
 291           Support for ARM's Integrator platform.
 292
 293 config ARCH_REALVIEW
 294         bool "ARM Ltd. RealView family"
 295         select ARCH_WANT_OPTIONAL_GPIOLIB
 296         select ARM_AMBA
 297         select ARM_TIMER_SP804
 298         select COMMON_CLK
 299         select COMMON_CLK_VERSATILE
 300         select GENERIC_CLOCKEVENTS
 301         select GPIO_PL061 if GPIOLIB
 302         select ICST
 303         select NEED_MACH_MEMORY_H
 304         select PLAT_VERSATILE
 305         select PLAT_VERSATILE_CLCD
 306         help
 307           This enables support for ARM Ltd RealView boards.
 308
 309 config ARCH_VERSATILE
 310         bool "ARM Ltd. Versatile family"
 311         select ARCH_WANT_OPTIONAL_GPIOLIB
 312         select ARM_AMBA
 313         select ARM_TIMER_SP804
 314         select ARM_VIC
 315         select CLKDEV_LOOKUP
 316         select GENERIC_CLOCKEVENTS
 317         select HAVE_MACH_CLKDEV
 318         select ICST
 319         select PLAT_VERSATILE
 320         select PLAT_VERSATILE_CLCD
 321         select PLAT_VERSATILE_CLOCK
 322         select VERSATILE_FPGA_IRQ
 323         help
 324           This enables support for ARM Ltd Versatile board.
 325
 326 config ARCH_AT91
 327         bool "Atmel AT91"
 328         select ARCH_REQUIRE_GPIOLIB
 329         select CLKDEV_LOOKUP
 330         select HAVE_CLK
 331         select IRQ_DOMAIN
 332         select NEED_MACH_GPIO_H
 333         select NEED_MACH_IO_H if PCCARD
 334         select PINCTRL
 335         select PINCTRL_AT91 if USE_OF
 336         help
 337           This enables support for systems based on Atmel
 338           AT91RM9200 and AT91SAM9* processors.
 339
 340 config ARCH_BCM2835
 341         bool "Broadcom BCM2835 family"
 342         select ARCH_REQUIRE_GPIOLIB
 343         select ARM_AMBA
 344         select ARM_ERRATA_411920
 345         select ARM_TIMER_SP804
 346         select CLKDEV_LOOKUP
 347         select CLKSRC_OF
 348         select COMMON_CLK
 349         select CPU_V6
 350         select GENERIC_CLOCKEVENTS
 351         select MULTI_IRQ_HANDLER
 352         select PINCTRL
 353         select PINCTRL_BCM2835
 354         select SPARSE_IRQ
 355         select USE_OF
 356         help
 357           This enables support for the Broadcom BCM2835 SoC. This SoC is
 358           use in the Raspberry Pi, and Roku 2 devices.
 359
 360 config ARCH_CNS3XXX
 361         bool "Cavium Networks CNS3XXX family"
 362         select ARM_GIC
 363         select CPU_V6K
 364         select GENERIC_CLOCKEVENTS
 365         select MIGHT_HAVE_CACHE_L2X0
 366         select MIGHT_HAVE_PCI
 367         select PCI_DOMAINS if PCI
 368         help
 369           Support for Cavium Networks CNS3XXX platform.
 370
 371 config ARCH_CLPS711X
 372         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 373         select ARCH_REQUIRE_GPIOLIB
 374         select AUTO_ZRELADDR
 375         select CLKDEV_LOOKUP
 376         select COMMON_CLK
 377         select CPU_ARM720T
 378         select GENERIC_CLOCKEVENTS
 379         select MULTI_IRQ_HANDLER
 380         select NEED_MACH_MEMORY_H
 381         select SPARSE_IRQ
 382         help
 383           Support for Cirrus Logic 711x/721x/731x based boards.
 384
 385 config ARCH_GEMINI
 386         bool "Cortina Systems Gemini"
 387         select ARCH_REQUIRE_GPIOLIB
 388         select ARCH_USES_GETTIMEOFFSET
 389         select CPU_FA526
 390         help
 391           Support for the Cortina Systems Gemini family SoCs
 392
 393 config ARCH_SIRF
 394         bool "CSR SiRF"
 395         select ARCH_REQUIRE_GPIOLIB
 396         select COMMON_CLK
 397         select GENERIC_CLOCKEVENTS
 398         select GENERIC_IRQ_CHIP
 399         select MIGHT_HAVE_CACHE_L2X0
 400         select NO_IOPORT
 401         select PINCTRL
 402         select PINCTRL_SIRF
 403         select USE_OF
 404         help
 405           Support for CSR SiRFprimaII/Marco/Polo platforms
 406
 407 config ARCH_EBSA110
 408         bool "EBSA-110"
 409         select ARCH_USES_GETTIMEOFFSET
 410         select CPU_SA110
 411         select ISA
 412         select NEED_MACH_IO_H
 413         select NEED_MACH_MEMORY_H
 414         select NO_IOPORT
 415         help
 416           This is an evaluation board for the StrongARM processor available
 417           from Digital. It has limited hardware on-board, including an
 418           Ethernet interface, two PCMCIA sockets, two serial ports and a
 419           parallel port.
 420
 421 config ARCH_EP93XX
 422         bool "EP93xx-based"
 423         select ARCH_HAS_HOLES_MEMORYMODEL
 424         select ARCH_REQUIRE_GPIOLIB
 425         select ARCH_USES_GETTIMEOFFSET
 426         select ARM_AMBA
 427         select ARM_VIC
 428         select CLKDEV_LOOKUP
 429         select CPU_ARM920T
 430         select NEED_MACH_MEMORY_H
 431         help
 432           This enables support for the Cirrus EP93xx series of CPUs.
 433
 434 config ARCH_FOOTBRIDGE
 435         bool "FootBridge"
 436         select CPU_SA110
 437         select FOOTBRIDGE
 438         select GENERIC_CLOCKEVENTS
 439         select HAVE_IDE
 440         select NEED_MACH_IO_H if !MMU
 441         select NEED_MACH_MEMORY_H
 442         help
 443           Support for systems based on the DC21285 companion chip
 444           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 445
 446 config ARCH_MXS
 447         bool "Freescale MXS-based"
 448         select ARCH_REQUIRE_GPIOLIB
 449         select CLKDEV_LOOKUP
 450         select CLKSRC_MMIO
 451         select COMMON_CLK
 452         select GENERIC_CLOCKEVENTS
 453         select HAVE_CLK_PREPARE
 454         select MULTI_IRQ_HANDLER
 455         select PINCTRL
 456         select SPARSE_IRQ
 457         select USE_OF
 458         help
 459           Support for Freescale MXS-based family of processors
 460
 461 config ARCH_NETX
 462         bool "Hilscher NetX based"
 463         select ARM_VIC
 464         select CLKSRC_MMIO
 465         select CPU_ARM926T
 466         select GENERIC_CLOCKEVENTS
 467         help
 468           This enables support for systems based on the Hilscher NetX Soc
 469
 470 config ARCH_H720X
 471         bool "Hynix HMS720x-based"
 472         select ARCH_USES_GETTIMEOFFSET
 473         select CPU_ARM720T
 474         select ISA_DMA_API
 475         help
 476           This enables support for systems based on the Hynix HMS720x
 477
 478 config ARCH_IOP13XX
 479         bool "IOP13xx-based"
 480         depends on MMU
 481         select ARCH_SUPPORTS_MSI
 482         select CPU_XSC3
 483         select NEED_MACH_MEMORY_H
 484         select NEED_RET_TO_USER
 485         select PCI
 486         select PLAT_IOP
 487         select VMSPLIT_1G
 488         help
 489           Support for Intel's IOP13XX (XScale) family of processors.
 490
 491 config ARCH_IOP32X
 492         bool "IOP32x-based"
 493         depends on MMU
 494         select ARCH_REQUIRE_GPIOLIB
 495         select CPU_XSCALE
 496         select NEED_MACH_GPIO_H
 497         select NEED_RET_TO_USER
 498         select PCI
 499         select PLAT_IOP
 500         help
 501           Support for Intel's 80219 and IOP32X (XScale) family of
 502           processors.
 503
 504 config ARCH_IOP33X
 505         bool "IOP33x-based"
 506         depends on MMU
 507         select ARCH_REQUIRE_GPIOLIB
 508         select CPU_XSCALE
 509         select NEED_MACH_GPIO_H
 510         select NEED_RET_TO_USER
 511         select PCI
 512         select PLAT_IOP
 513         help
 514           Support for Intel's IOP33X (XScale) family of processors.
 515
 516 config ARCH_IXP4XX
 517         bool "IXP4xx-based"
 518         depends on MMU
 519         select ARCH_HAS_DMA_SET_COHERENT_MASK
 520         select ARCH_REQUIRE_GPIOLIB
 521         select CLKSRC_MMIO
 522         select CPU_XSCALE
 523         select DMABOUNCE if PCI
 524         select GENERIC_CLOCKEVENTS
 525         select MIGHT_HAVE_PCI
 526         select NEED_MACH_IO_H
 527         help
 528           Support for Intel's IXP4XX (XScale) family of processors.
 529
 530 config ARCH_DOVE
 531         bool "Marvell Dove"
 532         select ARCH_REQUIRE_GPIOLIB
 533         select COMMON_CLK_DOVE
 534         select CPU_V7
 535         select GENERIC_CLOCKEVENTS
 536         select MIGHT_HAVE_PCI
 537         select PINCTRL
 538         select PINCTRL_DOVE
 539         select PLAT_ORION_LEGACY
 540         select USB_ARCH_HAS_EHCI
 541         help
 542           Support for the Marvell Dove SoC 88AP510
 543
 544 config ARCH_KIRKWOOD
 545         bool "Marvell Kirkwood"
 546         select ARCH_REQUIRE_GPIOLIB
 547         select CPU_FEROCEON
 548         select GENERIC_CLOCKEVENTS
 549         select PCI
 550         select PCI_QUIRKS
 551         select PINCTRL
 552         select PINCTRL_KIRKWOOD
 553         select PLAT_ORION_LEGACY
 554         help
 555           Support for the following Marvell Kirkwood series SoCs:
 556           88F6180, 88F6192 and 88F6281.
 557
 558 config ARCH_MV78XX0
 559         bool "Marvell MV78xx0"
 560         select ARCH_REQUIRE_GPIOLIB
 561         select CPU_FEROCEON
 562         select GENERIC_CLOCKEVENTS
 563         select PCI
 564         select PLAT_ORION_LEGACY
 565         help
 566           Support for the following Marvell MV78xx0 series SoCs:
 567           MV781x0, MV782x0.
 568
 569 config ARCH_ORION5X
 570         bool "Marvell Orion"
 571         depends on MMU
 572         select ARCH_REQUIRE_GPIOLIB
 573         select CPU_FEROCEON
 574         select GENERIC_CLOCKEVENTS
 575         select PCI
 576         select PLAT_ORION_LEGACY
 577         help
 578           Support for the following Marvell Orion 5x series SoCs:
 579           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 580           Orion-2 (5281), Orion-1-90 (6183).
 581
 582 config ARCH_MMP
 583         bool "Marvell PXA168/910/MMP2"
 584         depends on MMU
 585         select ARCH_REQUIRE_GPIOLIB
 586         select CLKDEV_LOOKUP
 587         select GENERIC_ALLOCATOR
 588         select GENERIC_CLOCKEVENTS
 589         select GPIO_PXA
 590         select IRQ_DOMAIN
 591         select NEED_MACH_GPIO_H
 592         select PINCTRL
 593         select PLAT_PXA
 594         select SPARSE_IRQ
 595         help
 596           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 597
 598 config ARCH_KS8695
 599         bool "Micrel/Kendin KS8695"
 600         select ARCH_REQUIRE_GPIOLIB
 601         select CLKSRC_MMIO
 602         select CPU_ARM922T
 603         select GENERIC_CLOCKEVENTS
 604         select NEED_MACH_MEMORY_H
 605         help
 606           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 607           System-on-Chip devices.
 608
 609 config ARCH_W90X900
 610         bool "Nuvoton W90X900 CPU"
 611         select ARCH_REQUIRE_GPIOLIB
 612         select CLKDEV_LOOKUP
 613         select CLKSRC_MMIO
 614         select CPU_ARM926T
 615         select GENERIC_CLOCKEVENTS
 616         help
 617           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 618           At present, the w90x900 has been renamed nuc900, regarding
 619           the ARM series product line, you can login the following
 620           link address to know more.
 621
 622           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 623                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 624
 625 config ARCH_LPC32XX
 626         bool "NXP LPC32XX"
 627         select ARCH_REQUIRE_GPIOLIB
 628         select ARM_AMBA
 629         select CLKDEV_LOOKUP
 630         select CLKSRC_MMIO
 631         select CPU_ARM926T
 632         select GENERIC_CLOCKEVENTS
 633         select HAVE_IDE
 634         select HAVE_PWM
 635         select USB_ARCH_HAS_OHCI
 636         select USE_OF
 637         help
 638           Support for the NXP LPC32XX family of processors
 639
 640 config ARCH_TEGRA
 641         bool "NVIDIA Tegra"
 642         select ARCH_HAS_CPUFREQ
 643         select CLKDEV_LOOKUP
 644         select CLKSRC_MMIO
 645         select CLKSRC_OF
 646         select COMMON_CLK
 647         select GENERIC_CLOCKEVENTS
 648         select HAVE_CLK
 649         select HAVE_SMP
 650         select MIGHT_HAVE_CACHE_L2X0
 651         select SPARSE_IRQ
 652         select USE_OF
 653         help
 654           This enables support for NVIDIA Tegra based systems (Tegra APX,
 655           Tegra 6xx and Tegra 2 series).
 656
 657 config ARCH_PXA
 658         bool "PXA2xx/PXA3xx-based"
 659         depends on MMU
 660         select ARCH_HAS_CPUFREQ
 661         select ARCH_MTD_XIP
 662         select ARCH_REQUIRE_GPIOLIB
 663         select ARM_CPU_SUSPEND if PM
 664         select AUTO_ZRELADDR
 665         select CLKDEV_LOOKUP
 666         select CLKSRC_MMIO
 667         select GENERIC_CLOCKEVENTS
 668         select GPIO_PXA
 669         select HAVE_IDE
 670         select MULTI_IRQ_HANDLER
 671         select NEED_MACH_GPIO_H
 672         select PLAT_PXA
 673         select SPARSE_IRQ
 674         help
 675           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 676
 677 config ARCH_MSM
 678         bool "Qualcomm MSM"
 679         select ARCH_REQUIRE_GPIOLIB
 680         select CLKDEV_LOOKUP
 681         select GENERIC_CLOCKEVENTS
 682         select HAVE_CLK
 683         help
 684           Support for Qualcomm MSM/QSD based systems.  This runs on the
 685           apps processor of the MSM/QSD and depends on a shared memory
 686           interface to the modem processor which runs the baseband
 687           stack and controls some vital subsystems
 688           (clock and power control, etc).
 689
 690 config ARCH_SHMOBILE
 691         bool "Renesas SH-Mobile / R-Mobile"
 692         select CLKDEV_LOOKUP
 693         select GENERIC_CLOCKEVENTS
 694         select HAVE_CLK
 695         select HAVE_MACH_CLKDEV
 696         select HAVE_SMP
 697         select MIGHT_HAVE_CACHE_L2X0
 698         select MULTI_IRQ_HANDLER
 699         select NEED_MACH_MEMORY_H
 700         select NO_IOPORT
 701         select PM_GENERIC_DOMAINS if PM
 702         select SPARSE_IRQ
 703         help
 704           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 705
 706 config ARCH_RPC
 707         bool "RiscPC"
 708         select ARCH_ACORN
 709         select ARCH_MAY_HAVE_PC_FDC
 710         select ARCH_SPARSEMEM_ENABLE
 711         select ARCH_USES_GETTIMEOFFSET
 712         select FIQ
 713         select HAVE_IDE
 714         select HAVE_PATA_PLATFORM
 715         select ISA_DMA_API
 716         select NEED_MACH_IO_H
 717         select NEED_MACH_MEMORY_H
 718         select NO_IOPORT
 719         help
 720           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 721           CD-ROM interface, serial and parallel port, and the floppy drive.
 722
 723 config ARCH_SA1100
 724         bool "SA1100-based"
 725         select ARCH_HAS_CPUFREQ
 726         select ARCH_MTD_XIP
 727         select ARCH_REQUIRE_GPIOLIB
 728         select ARCH_SPARSEMEM_ENABLE
 729         select CLKDEV_LOOKUP
 730         select CLKSRC_MMIO
 731         select CPU_FREQ
 732         select CPU_SA1100
 733         select GENERIC_CLOCKEVENTS
 734         select HAVE_IDE
 735         select ISA
 736         select NEED_MACH_GPIO_H
 737         select NEED_MACH_MEMORY_H
 738         select SPARSE_IRQ
 739         help
 740           Support for StrongARM 11x0 based boards.
 741
 742 config ARCH_S3C24XX
 743         bool "Samsung S3C24XX SoCs"
 744         select ARCH_HAS_CPUFREQ
 745         select ARCH_USES_GETTIMEOFFSET
 746         select CLKDEV_LOOKUP
 747         select HAVE_CLK
 748         select HAVE_S3C2410_I2C if I2C
 749         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 750         select HAVE_S3C_RTC if RTC_CLASS
 751         select NEED_MACH_GPIO_H
 752         select NEED_MACH_IO_H
 753         help
 754           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 755           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 756           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 757           Samsung SMDK2410 development board (and derivatives).
 758
 759 config ARCH_S3C64XX
 760         bool "Samsung S3C64XX"
 761         select ARCH_HAS_CPUFREQ
 762         select ARCH_REQUIRE_GPIOLIB
 763         select ARCH_USES_GETTIMEOFFSET
 764         select ARM_VIC
 765         select CLKDEV_LOOKUP
 766         select CPU_V6
 767         select HAVE_CLK
 768         select HAVE_S3C2410_I2C if I2C
 769         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 770         select HAVE_TCM
 771         select NEED_MACH_GPIO_H
 772         select NO_IOPORT
 773         select PLAT_SAMSUNG
 774         select S3C_DEV_NAND
 775         select S3C_GPIO_TRACK
 776         select SAMSUNG_CLKSRC
 777         select SAMSUNG_GPIOLIB_4BIT
 778         select SAMSUNG_IRQ_VIC_TIMER
 779         select USB_ARCH_HAS_OHCI
 780         help
 781           Samsung S3C64XX series based systems
 782
 783 config ARCH_S5P64X0
 784         bool "Samsung S5P6440 S5P6450"
 785         select CLKDEV_LOOKUP
 786         select CLKSRC_MMIO
 787         select CPU_V6
 788         select GENERIC_CLOCKEVENTS
 789         select HAVE_CLK
 790         select HAVE_S3C2410_I2C if I2C
 791         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 792         select HAVE_S3C_RTC if RTC_CLASS
 793         select NEED_MACH_GPIO_H
 794         help
 795           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 796           SMDK6450.
 797
 798 config ARCH_S5PC100
 799         bool "Samsung S5PC100"
 800         select ARCH_USES_GETTIMEOFFSET
 801         select CLKDEV_LOOKUP
 802         select CPU_V7
 803         select HAVE_CLK
 804         select HAVE_S3C2410_I2C if I2C
 805         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 806         select HAVE_S3C_RTC if RTC_CLASS
 807         select NEED_MACH_GPIO_H
 808         help
 809           Samsung S5PC100 series based systems
 810
 811 config ARCH_S5PV210
 812         bool "Samsung S5PV210/S5PC110"
 813         select ARCH_HAS_CPUFREQ
 814         select ARCH_HAS_HOLES_MEMORYMODEL
 815         select ARCH_SPARSEMEM_ENABLE
 816         select CLKDEV_LOOKUP
 817         select CLKSRC_MMIO
 818         select CPU_V7
 819         select GENERIC_CLOCKEVENTS
 820         select HAVE_CLK
 821         select HAVE_S3C2410_I2C if I2C
 822         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 823         select HAVE_S3C_RTC if RTC_CLASS
 824         select NEED_MACH_GPIO_H
 825         select NEED_MACH_MEMORY_H
 826         help
 827           Samsung S5PV210/S5PC110 series based systems
 828
 829 config ARCH_EXYNOS
 830         bool "Samsung EXYNOS"
 831         select ARCH_HAS_CPUFREQ
 832         select ARCH_HAS_HOLES_MEMORYMODEL
 833         select ARCH_SPARSEMEM_ENABLE
 834         select CLKDEV_LOOKUP
 835         select CPU_V7
 836         select GENERIC_CLOCKEVENTS
 837         select HAVE_CLK
 838         select HAVE_S3C2410_I2C if I2C
 839         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 840         select HAVE_S3C_RTC if RTC_CLASS
 841         select NEED_MACH_GPIO_H
 842         select NEED_MACH_MEMORY_H
 843         help
 844           Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 845
 846 config ARCH_SHARK
 847         bool "Shark"
 848         select ARCH_USES_GETTIMEOFFSET
 849         select CPU_SA110
 850         select ISA
 851         select ISA_DMA
 852         select NEED_MACH_MEMORY_H
 853         select PCI
 854         select ZONE_DMA
 855         help
 856           Support for the StrongARM based Digital DNARD machine, also known
 857           as "Shark" (<http://www.shark-linux.de/shark.html>).
 858
 859 config ARCH_U300
 860         bool "ST-Ericsson U300 Series"
 861         depends on MMU
 862         select ARCH_REQUIRE_GPIOLIB
 863         select ARM_AMBA
 864         select ARM_PATCH_PHYS_VIRT
 865         select ARM_VIC
 866         select CLKDEV_LOOKUP
 867         select CLKSRC_MMIO
 868         select COMMON_CLK
 869         select CPU_ARM926T
 870         select GENERIC_CLOCKEVENTS
 871         select HAVE_TCM
 872         select SPARSE_IRQ
 873         help
 874           Support for ST-Ericsson U300 series mobile platforms.
 875
 876 config ARCH_U8500
 877         bool "ST-Ericsson U8500 Series"
 878         depends on MMU
 879         select ARCH_HAS_CPUFREQ
 880         select ARCH_REQUIRE_GPIOLIB
 881         select ARM_AMBA
 882         select CLKDEV_LOOKUP
 883         select CPU_V7
 884         select GENERIC_CLOCKEVENTS
 885         select HAVE_SMP
 886         select MIGHT_HAVE_CACHE_L2X0
 887         select SPARSE_IRQ
 888         help
 889           Support for ST-Ericsson's Ux500 architecture
 890
 891 config ARCH_NOMADIK
 892         bool "STMicroelectronics Nomadik"
 893         select ARCH_REQUIRE_GPIOLIB
 894         select ARM_AMBA
 895         select ARM_VIC
 896         select COMMON_CLK
 897         select CPU_ARM926T
 898         select GENERIC_CLOCKEVENTS
 899         select MIGHT_HAVE_CACHE_L2X0
 900         select PINCTRL
 901         select PINCTRL_STN8815
 902         select SPARSE_IRQ
 903         help
 904           Support for the Nomadik platform by ST-Ericsson
 905
 906 config PLAT_SPEAR
 907         bool "ST SPEAr"
 908         select ARCH_HAS_CPUFREQ
 909         select ARCH_REQUIRE_GPIOLIB
 910         select ARM_AMBA
 911         select CLKDEV_LOOKUP
 912         select CLKSRC_MMIO
 913         select COMMON_CLK
 914         select GENERIC_CLOCKEVENTS
 915         select HAVE_CLK
 916         help
 917           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 918
 919 config ARCH_DAVINCI
 920         bool "TI DaVinci"
 921         select ARCH_HAS_HOLES_MEMORYMODEL
 922         select ARCH_REQUIRE_GPIOLIB
 923         select CLKDEV_LOOKUP
 924         select GENERIC_ALLOCATOR
 925         select GENERIC_CLOCKEVENTS
 926         select GENERIC_IRQ_CHIP
 927         select HAVE_IDE
 928         select NEED_MACH_GPIO_H
 929         select USE_OF
 930         select ZONE_DMA
 931         help
 932           Support for TI's DaVinci platform.
 933
 934 config ARCH_OMAP
 935         bool "TI OMAP"
 936         depends on MMU
 937         select ARCH_HAS_CPUFREQ
 938         select ARCH_HAS_HOLES_MEMORYMODEL
 939         select ARCH_REQUIRE_GPIOLIB
 940         select CLKSRC_MMIO
 941         select GENERIC_CLOCKEVENTS
 942         select HAVE_CLK
 943         help
 944           Support for TI's OMAP platform (OMAP1/2/3/4).
 945
 946 config ARCH_VT8500_SINGLE
 947         bool "VIA/WonderMedia 85xx"
 948         select ARCH_HAS_CPUFREQ
 949         select ARCH_REQUIRE_GPIOLIB
 950         select CLKDEV_LOOKUP
 951         select COMMON_CLK
 952         select CPU_ARM926T
 953         select GENERIC_CLOCKEVENTS
 954         select HAVE_CLK
 955         select MULTI_IRQ_HANDLER
 956         select SPARSE_IRQ
 957         select USE_OF
 958         help
 959           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 960
 961 endchoice
 962
 963 menu "Multiple platform selection"
 964         depends on ARCH_MULTIPLATFORM
 965
 966 comment "CPU Core family selection"
 967
 968 config ARCH_MULTI_V4
 969         bool "ARMv4 based platforms (FA526, StrongARM)"
 970         depends on !ARCH_MULTI_V6_V7
 971         select ARCH_MULTI_V4_V5
 972
 973 config ARCH_MULTI_V4T
 974         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 975         depends on !ARCH_MULTI_V6_V7
 976         select ARCH_MULTI_V4_V5
 977
 978 config ARCH_MULTI_V5
 979         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 980         depends on !ARCH_MULTI_V6_V7
 981         select ARCH_MULTI_V4_V5
 982
 983 config ARCH_MULTI_V4_V5
 984         bool
 985
 986 config ARCH_MULTI_V6
 987         bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
 988         select ARCH_MULTI_V6_V7
 989         select CPU_V6
 990
 991 config ARCH_MULTI_V7
 992         bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
 993         default y
 994         select ARCH_MULTI_V6_V7
 995         select ARCH_VEXPRESS
 996         select CPU_V7
 997
 998 config ARCH_MULTI_V6_V7
 999         bool
1000
1001 config ARCH_MULTI_CPU_AUTO
1002         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
1003         select ARCH_MULTI_V5
1004
1005 endmenu
1006
1007 #
1008 # This is sorted alphabetically by mach-* pathname.  However, plat-*
1009 # Kconfigs may be included either alphabetically (according to the
1010 # plat- suffix) or along side the corresponding mach-* source.
1011 #
1012 source "arch/arm/mach-mvebu/Kconfig"
1013
1014 source "arch/arm/mach-at91/Kconfig"
1015
1016 source "arch/arm/mach-bcm/Kconfig"
1017
1018 source "arch/arm/mach-clps711x/Kconfig"
1019
1020 source "arch/arm/mach-cns3xxx/Kconfig"
1021
1022 source "arch/arm/mach-davinci/Kconfig"
1023
1024 source "arch/arm/mach-dove/Kconfig"
1025
1026 source "arch/arm/mach-ep93xx/Kconfig"
1027
1028 source "arch/arm/mach-footbridge/Kconfig"
1029
1030 source "arch/arm/mach-gemini/Kconfig"
1031
1032 source "arch/arm/mach-h720x/Kconfig"
1033
1034 source "arch/arm/mach-highbank/Kconfig"
1035
1036 source "arch/arm/mach-integrator/Kconfig"
1037
1038 source "arch/arm/mach-iop32x/Kconfig"
1039
1040 source "arch/arm/mach-iop33x/Kconfig"
1041
1042 source "arch/arm/mach-iop13xx/Kconfig"
1043
1044 source "arch/arm/mach-ixp4xx/Kconfig"
1045
1046 source "arch/arm/mach-kirkwood/Kconfig"
1047
1048 source "arch/arm/mach-ks8695/Kconfig"
1049
1050 source "arch/arm/mach-msm/Kconfig"
1051
1052 source "arch/arm/mach-mv78xx0/Kconfig"
1053
1054 source "arch/arm/mach-imx/Kconfig"
1055
1056 source "arch/arm/mach-mxs/Kconfig"
1057
1058 source "arch/arm/mach-netx/Kconfig"
1059
1060 source "arch/arm/mach-nomadik/Kconfig"
1061
1062 source "arch/arm/plat-omap/Kconfig"
1063
1064 source "arch/arm/mach-omap1/Kconfig"
1065
1066 source "arch/arm/mach-omap2/Kconfig"
1067
1068 source "arch/arm/mach-orion5x/Kconfig"
1069
1070 source "arch/arm/mach-picoxcell/Kconfig"
1071
1072 source "arch/arm/mach-pxa/Kconfig"
1073 source "arch/arm/plat-pxa/Kconfig"
1074
1075 source "arch/arm/mach-mmp/Kconfig"
1076
1077 source "arch/arm/mach-realview/Kconfig"
1078
1079 source "arch/arm/mach-sa1100/Kconfig"
1080
1081 source "arch/arm/plat-samsung/Kconfig"
1082
1083 source "arch/arm/mach-socfpga/Kconfig"
1084
1085 source "arch/arm/plat-spear/Kconfig"
1086
1087 source "arch/arm/mach-s3c24xx/Kconfig"
1088
1089 if ARCH_S3C64XX
1090 source "arch/arm/mach-s3c64xx/Kconfig"
1091 endif
1092
1093 source "arch/arm/mach-s5p64x0/Kconfig"
1094
1095 source "arch/arm/mach-s5pc100/Kconfig"
1096
1097 source "arch/arm/mach-s5pv210/Kconfig"
1098
1099 source "arch/arm/mach-exynos/Kconfig"
1100
1101 source "arch/arm/mach-shmobile/Kconfig"
1102
1103 source "arch/arm/mach-sunxi/Kconfig"
1104
1105 source "arch/arm/mach-prima2/Kconfig"
1106
1107 source "arch/arm/mach-tegra/Kconfig"
1108
1109 source "arch/arm/mach-u300/Kconfig"
1110
1111 source "arch/arm/mach-ux500/Kconfig"
1112
1113 source "arch/arm/mach-versatile/Kconfig"
1114
1115 source "arch/arm/mach-vexpress/Kconfig"
1116 source "arch/arm/plat-versatile/Kconfig"
1117
1118 source "arch/arm/mach-vt8500/Kconfig"
1119
1120 source "arch/arm/mach-w90x900/Kconfig"
1121
1122 source "arch/arm/mach-zynq/Kconfig"
1123
1124 # Definitions to make life easier
1125 config ARCH_ACORN
1126         bool
1127
1128 config PLAT_IOP
1129         bool
1130         select GENERIC_CLOCKEVENTS
1131
1132 config PLAT_ORION
1133         bool
1134         select CLKSRC_MMIO
1135         select COMMON_CLK
1136         select GENERIC_IRQ_CHIP
1137         select IRQ_DOMAIN
1138
1139 config PLAT_ORION_LEGACY
1140         bool
1141         select PLAT_ORION
1142
1143 config PLAT_PXA
1144         bool
1145
1146 config PLAT_VERSATILE
1147         bool
1148
1149 config ARM_TIMER_SP804
1150         bool
1151         select CLKSRC_MMIO
1152         select HAVE_SCHED_CLOCK
1153
1154 source arch/arm/mm/Kconfig
1155
1156 config ARM_NR_BANKS
1157         int
1158         default 16 if ARCH_EP93XX
1159         default 8
1160
1161 config IWMMXT
1162         bool "Enable iWMMXt support"
1163         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1164         default y if PXA27x || PXA3xx || ARCH_MMP
1165         help
1166           Enable support for iWMMXt context switching at run time if
1167           running on a CPU that supports it.
1168
1169 config XSCALE_PMU
1170         bool
1171         depends on CPU_XSCALE
1172         default y
1173
1174 config MULTI_IRQ_HANDLER
1175         bool
1176         help
1177           Allow each machine to specify it's own IRQ handler at run time.
1178
1179 if !MMU
1180 source "arch/arm/Kconfig-nommu"
1181 endif
1182
1183 config ARM_ERRATA_326103
1184         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1185         depends on CPU_V6
1186         help
1187           Executing a SWP instruction to read-only memory does not set bit 11
1188           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1189           treat the access as a read, preventing a COW from occurring and
1190           causing the faulting task to livelock.
1191
1192 config ARM_ERRATA_411920
1193         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1194         depends on CPU_V6 || CPU_V6K
1195         help
1196           Invalidation of the Instruction Cache operation can
1197           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1198           It does not affect the MPCore. This option enables the ARM Ltd.
1199           recommended workaround.
1200
1201 config ARM_ERRATA_430973
1202         bool "ARM errata: Stale prediction on replaced interworking branch"
1203         depends on CPU_V7
1204         help
1205           This option enables the workaround for the 430973 Cortex-A8
1206           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1207           interworking branch is replaced with another code sequence at the
1208           same virtual address, whether due to self-modifying code or virtual
1209           to physical address re-mapping, Cortex-A8 does not recover from the
1210           stale interworking branch prediction. This results in Cortex-A8
1211           executing the new code sequence in the incorrect ARM or Thumb state.
1212           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1213           and also flushes the branch target cache at every context switch.
1214           Note that setting specific bits in the ACTLR register may not be
1215           available in non-secure mode.
1216
1217 config ARM_ERRATA_458693
1218         bool "ARM errata: Processor deadlock when a false hazard is created"
1219         depends on CPU_V7
1220         depends on !ARCH_MULTIPLATFORM
1221         help
1222           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1223           erratum. For very specific sequences of memory operations, it is
1224           possible for a hazard condition intended for a cache line to instead
1225           be incorrectly associated with a different cache line. This false
1226           hazard might then cause a processor deadlock. The workaround enables
1227           the L1 caching of the NEON accesses and disables the PLD instruction
1228           in the ACTLR register. Note that setting specific bits in the ACTLR
1229           register may not be available in non-secure mode.
1230
1231 config ARM_ERRATA_460075
1232         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1233         depends on CPU_V7
1234         depends on !ARCH_MULTIPLATFORM
1235         help
1236           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1237           erratum. Any asynchronous access to the L2 cache may encounter a
1238           situation in which recent store transactions to the L2 cache are lost
1239           and overwritten with stale memory contents from external memory. The
1240           workaround disables the write-allocate mode for the L2 cache via the
1241           ACTLR register. Note that setting specific bits in the ACTLR register
1242           may not be available in non-secure mode.
1243
1244 config ARM_ERRATA_742230
1245         bool "ARM errata: DMB operation may be faulty"
1246         depends on CPU_V7 && SMP
1247         depends on !ARCH_MULTIPLATFORM
1248         help
1249           This option enables the workaround for the 742230 Cortex-A9
1250           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1251           between two write operations may not ensure the correct visibility
1252           ordering of the two writes. This workaround sets a specific bit in
1253           the diagnostic register of the Cortex-A9 which causes the DMB
1254           instruction to behave as a DSB, ensuring the correct behaviour of
1255           the two writes.
1256
1257 config ARM_ERRATA_742231
1258         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1259         depends on CPU_V7 && SMP
1260         depends on !ARCH_MULTIPLATFORM
1261         help
1262           This option enables the workaround for the 742231 Cortex-A9
1263           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1264           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1265           accessing some data located in the same cache line, may get corrupted
1266           data due to bad handling of the address hazard when the line gets
1267           replaced from one of the CPUs at the same time as another CPU is
1268           accessing it. This workaround sets specific bits in the diagnostic
1269           register of the Cortex-A9 which reduces the linefill issuing
1270           capabilities of the processor.
1271
1272 config PL310_ERRATA_588369
1273         bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1274         depends on CACHE_L2X0
1275         help
1276            The PL310 L2 cache controller implements three types of Clean &
1277            Invalidate maintenance operations: by Physical Address
1278            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1279            They are architecturally defined to behave as the execution of a
1280            clean operation followed immediately by an invalidate operation,
1281            both performing to the same memory location. This functionality
1282            is not correctly implemented in PL310 as clean lines are not
1283            invalidated as a result of these operations.
1284
1285 config ARM_ERRATA_720789
1286         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1287         depends on CPU_V7
1288         help
1289           This option enables the workaround for the 720789 Cortex-A9 (prior to
1290           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1291           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1292           As a consequence of this erratum, some TLB entries which should be
1293           invalidated are not, resulting in an incoherency in the system page
1294           tables. The workaround changes the TLB flushing routines to invalidate
1295           entries regardless of the ASID.
1296
1297 config PL310_ERRATA_727915
1298         bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1299         depends on CACHE_L2X0
1300         help
1301           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1302           operation (offset 0x7FC). This operation runs in background so that
1303           PL310 can handle normal accesses while it is in progress. Under very
1304           rare circumstances, due to this erratum, write data can be lost when
1305           PL310 treats a cacheable write transaction during a Clean &
1306           Invalidate by Way operation.
1307
1308 config ARM_ERRATA_743622
1309         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1310         depends on CPU_V7
1311         depends on !ARCH_MULTIPLATFORM
1312         help
1313           This option enables the workaround for the 743622 Cortex-A9
1314           (r2p*) erratum. Under very rare conditions, a faulty
1315           optimisation in the Cortex-A9 Store Buffer may lead to data
1316           corruption. This workaround sets a specific bit in the diagnostic
1317           register of the Cortex-A9 which disables the Store Buffer
1318           optimisation, preventing the defect from occurring. This has no
1319           visible impact on the overall performance or power consumption of the
1320           processor.
1321
1322 config ARM_ERRATA_751472
1323         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1324         depends on CPU_V7
1325         depends on !ARCH_MULTIPLATFORM
1326         help
1327           This option enables the workaround for the 751472 Cortex-A9 (prior
1328           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1329           completion of a following broadcasted operation if the second
1330           operation is received by a CPU before the ICIALLUIS has completed,
1331           potentially leading to corrupted entries in the cache or TLB.
1332
1333 config PL310_ERRATA_753970
1334         bool "PL310 errata: cache sync operation may be faulty"
1335         depends on CACHE_PL310
1336         help
1337           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1338
1339           Under some condition the effect of cache sync operation on
1340           the store buffer still remains when the operation completes.
1341           This means that the store buffer is always asked to drain and
1342           this prevents it from merging any further writes. The workaround
1343           is to replace the normal offset of cache sync operation (0x730)
1344           by another offset targeting an unmapped PL310 register 0x740.
1345           This has the same effect as the cache sync operation: store buffer
1346           drain and waiting for all buffers empty.
1347
1348 config ARM_ERRATA_754322
1349         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1350         depends on CPU_V7
1351         help
1352           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1353           r3p*) erratum. A speculative memory access may cause a page table walk
1354           which starts prior to an ASID switch but completes afterwards. This
1355           can populate the micro-TLB with a stale entry which may be hit with
1356           the new ASID. This workaround places two dsb instructions in the mm
1357           switching code so that no page table walks can cross the ASID switch.
1358
1359 config ARM_ERRATA_754327
1360         bool "ARM errata: no automatic Store Buffer drain"
1361         depends on CPU_V7 && SMP
1362         help
1363           This option enables the workaround for the 754327 Cortex-A9 (prior to
1364           r2p0) erratum. The Store Buffer does not have any automatic draining
1365           mechanism and therefore a livelock may occur if an external agent
1366           continuously polls a memory location waiting to observe an update.
1367           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1368           written polling loops from denying visibility of updates to memory.
1369
1370 config ARM_ERRATA_364296
1371         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1372         depends on CPU_V6 && !SMP
1373         help
1374           This options enables the workaround for the 364296 ARM1136
1375           r0p2 erratum (possible cache data corruption with
1376           hit-under-miss enabled). It sets the undocumented bit 31 in
1377           the auxiliary control register and the FI bit in the control
1378           register, thus disabling hit-under-miss without putting the
1379           processor into full low interrupt latency mode. ARM11MPCore
1380           is not affected.
1381
1382 config ARM_ERRATA_764369
1383         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1384         depends on CPU_V7 && SMP
1385         help
1386           This option enables the workaround for erratum 764369
1387           affecting Cortex-A9 MPCore with two or more processors (all
1388           current revisions). Under certain timing circumstances, a data
1389           cache line maintenance operation by MVA targeting an Inner
1390           Shareable memory region may fail to proceed up to either the
1391           Point of Coherency or to the Point of Unification of the
1392           system. This workaround adds a DSB instruction before the
1393           relevant cache maintenance functions and sets a specific bit
1394           in the diagnostic control register of the SCU.
1395
1396 config PL310_ERRATA_769419
1397         bool "PL310 errata: no automatic Store Buffer drain"
1398         depends on CACHE_L2X0
1399         help
1400           On revisions of the PL310 prior to r3p2, the Store Buffer does
1401           not automatically drain. This can cause normal, non-cacheable
1402           writes to be retained when the memory system is idle, leading
1403           to suboptimal I/O performance for drivers using coherent DMA.
1404           This option adds a write barrier to the cpu_idle loop so that,
1405           on systems with an outer cache, the store buffer is drained
1406           explicitly.
1407
1408 config ARM_ERRATA_775420
1409        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1410        depends on CPU_V7
1411        help
1412          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1413          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1414          operation aborts with MMU exception, it might cause the processor
1415          to deadlock. This workaround puts DSB before executing ISB if
1416          an abort may occur on cache maintenance.
1417
1418 endmenu
1419
1420 source "arch/arm/common/Kconfig"
1421
1422 menu "Bus support"
1423
1424 config ARM_AMBA
1425         bool
1426
1427 config ISA
1428         bool
1429         help
1430           Find out whether you have ISA slots on your motherboard.  ISA is the
1431           name of a bus system, i.e. the way the CPU talks to the other stuff
1432           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1433           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1434           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1435
1436 # Select ISA DMA controller support
1437 config ISA_DMA
1438         bool
1439         select ISA_DMA_API
1440
1441 config ARCH_NO_VIRT_TO_BUS
1442         def_bool y
1443         depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
1444
1445 # Select ISA DMA interface
1446 config ISA_DMA_API
1447         bool
1448
1449 config PCI
1450         bool "PCI support" if MIGHT_HAVE_PCI
1451         help
1452           Find out whether you have a PCI motherboard. PCI is the name of a
1453           bus system, i.e. the way the CPU talks to the other stuff inside
1454           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1455           VESA. If you have PCI, say Y, otherwise N.
1456
1457 config PCI_DOMAINS
1458         bool
1459         depends on PCI
1460
1461 config PCI_NANOENGINE
1462         bool "BSE nanoEngine PCI support"
1463         depends on SA1100_NANOENGINE
1464         help
1465           Enable PCI on the BSE nanoEngine board.
1466
1467 config PCI_SYSCALL
1468         def_bool PCI
1469
1470 # Select the host bridge type
1471 config PCI_HOST_VIA82C505
1472         bool
1473         depends on PCI && ARCH_SHARK
1474         default y
1475
1476 config PCI_HOST_ITE8152
1477         bool
1478         depends on PCI && MACH_ARMCORE
1479         default y
1480         select DMABOUNCE
1481
1482 source "drivers/pci/Kconfig"
1483
1484 source "drivers/pcmcia/Kconfig"
1485
1486 endmenu
1487
1488 menu "Kernel Features"
1489
1490 config HAVE_SMP
1491         bool
1492         help
1493           This option should be selected by machines which have an SMP-
1494           capable CPU.
1495
1496           The only effect of this option is to make the SMP-related
1497           options available to the user for configuration.
1498
1499 config SMP
1500         bool "Symmetric Multi-Processing"
1501         depends on CPU_V6K || CPU_V7
1502         depends on GENERIC_CLOCKEVENTS
1503         depends on HAVE_SMP
1504         depends on MMU
1505         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1506         select USE_GENERIC_SMP_HELPERS
1507         help
1508           This enables support for systems with more than one CPU. If you have
1509           a system with only one CPU, like most personal computers, say N. If
1510           you have a system with more than one CPU, say Y.
1511
1512           If you say N here, the kernel will run on single and multiprocessor
1513           machines, but will use only one CPU of a multiprocessor machine. If
1514           you say Y here, the kernel will run on many, but not all, single
1515           processor machines. On a single processor machine, the kernel will
1516           run faster if you say N here.
1517
1518           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1519           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1520           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1521
1522           If you don't know what to do here, say N.
1523
1524 config SMP_ON_UP
1525         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1526         depends on SMP && !XIP_KERNEL
1527         default y
1528         help
1529           SMP kernels contain instructions which fail on non-SMP processors.
1530           Enabling this option allows the kernel to modify itself to make
1531           these instructions safe.  Disabling it allows about 1K of space
1532           savings.
1533
1534           If you don't know what to do here, say Y.
1535
1536 config ARM_CPU_TOPOLOGY
1537         bool "Support cpu topology definition"
1538         depends on SMP && CPU_V7
1539         default y
1540         help
1541           Support ARM cpu topology definition. The MPIDR register defines
1542           affinity between processors which is then used to describe the cpu
1543           topology of an ARM System.
1544
1545 config SCHED_MC
1546         bool "Multi-core scheduler support"
1547         depends on ARM_CPU_TOPOLOGY
1548         help
1549           Multi-core scheduler support improves the CPU scheduler's decision
1550           making when dealing with multi-core CPU chips at a cost of slightly
1551           increased overhead in some places. If unsure say N here.
1552
1553 config SCHED_SMT
1554         bool "SMT scheduler support"
1555         depends on ARM_CPU_TOPOLOGY
1556         help
1557           Improves the CPU scheduler's decision making when dealing with
1558           MultiThreading at a cost of slightly increased overhead in some
1559           places. If unsure say N here.
1560
1561 config HAVE_ARM_SCU
1562         bool
1563         help
1564           This option enables support for the ARM system coherency unit
1565
1566 config ARM_ARCH_TIMER
1567         bool "Architected timer support"
1568         depends on CPU_V7
1569         help
1570           This option enables support for the ARM architected timer
1571
1572 config HAVE_ARM_TWD
1573         bool
1574         depends on SMP
1575         help
1576           This options enables support for the ARM timer and watchdog unit
1577
1578 choice
1579         prompt "Memory split"
1580         default VMSPLIT_3G
1581         help
1582           Select the desired split between kernel and user memory.
1583
1584           If you are not absolutely sure what you are doing, leave this
1585           option alone!
1586
1587         config VMSPLIT_3G
1588                 bool "3G/1G user/kernel split"
1589         config VMSPLIT_2G
1590                 bool "2G/2G user/kernel split"
1591         config VMSPLIT_1G
1592                 bool "1G/3G user/kernel split"
1593 endchoice
1594
1595 config PAGE_OFFSET
1596         hex
1597         default 0x40000000 if VMSPLIT_1G
1598         default 0x80000000 if VMSPLIT_2G
1599         default 0xC0000000
1600
1601 config NR_CPUS
1602         int "Maximum number of CPUs (2-32)"
1603         range 2 32
1604         depends on SMP
1605         default "4"
1606
1607 config HOTPLUG_CPU
1608         bool "Support for hot-pluggable CPUs"
1609         depends on SMP && HOTPLUG
1610         help
1611           Say Y here to experiment with turning CPUs off and on.  CPUs
1612           can be controlled through /sys/devices/system/cpu.
1613
1614 config ARM_PSCI
1615         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1616         depends on CPU_V7
1617         help
1618           Say Y here if you want Linux to communicate with system firmware
1619           implementing the PSCI specification for CPU-centric power
1620           management operations described in ARM document number ARM DEN
1621           0022A ("Power State Coordination Interface System Software on
1622           ARM processors").
1623
1624 config LOCAL_TIMERS
1625         bool "Use local timer interrupts"
1626         depends on SMP
1627         default y
1628         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1629         help
1630           Enable support for local timers on SMP platforms, rather then the
1631           legacy IPI broadcast method.  Local timers allows the system
1632           accounting to be spread across the timer interval, preventing a
1633           "thundering herd" at every timer tick.
1634
1635 config ARCH_NR_GPIO
1636         int
1637         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1638         default 355 if ARCH_U8500
1639         default 264 if MACH_H4700
1640         default 512 if SOC_OMAP5
1641         default 288 if ARCH_VT8500 || ARCH_SUNXI
1642         default 0
1643         help
1644           Maximum number of GPIOs in the system.
1645
1646           If unsure, leave the default value.
1647
1648 source kernel/Kconfig.preempt
1649
1650 config HZ
1651         int
1652         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1653                 ARCH_S5PV210 || ARCH_EXYNOS4
1654         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1655         default AT91_TIMER_HZ if ARCH_AT91
1656         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1657         default 100
1658
1659 config SCHED_HRTICK
1660         def_bool HIGH_RES_TIMERS
1661
1662 config THUMB2_KERNEL
1663         bool "Compile the kernel in Thumb-2 mode"
1664         depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1665         select AEABI
1666         select ARM_ASM_UNIFIED
1667         select ARM_UNWIND
1668         help
1669           By enabling this option, the kernel will be compiled in
1670           Thumb-2 mode. A compiler/assembler that understand the unified
1671           ARM-Thumb syntax is needed.
1672
1673           If unsure, say N.
1674
1675 config THUMB2_AVOID_R_ARM_THM_JUMP11
1676         bool "Work around buggy Thumb-2 short branch relocations in gas"
1677         depends on THUMB2_KERNEL && MODULES
1678         default y
1679         help
1680           Various binutils versions can resolve Thumb-2 branches to
1681           locally-defined, preemptible global symbols as short-range "b.n"
1682           branch instructions.
1683
1684           This is a problem, because there's no guarantee the final
1685           destination of the symbol, or any candidate locations for a
1686           trampoline, are within range of the branch.  For this reason, the
1687           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1688           relocation in modules at all, and it makes little sense to add
1689           support.
1690
1691           The symptom is that the kernel fails with an "unsupported
1692           relocation" error when loading some modules.
1693
1694           Until fixed tools are available, passing
1695           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1696           code which hits this problem, at the cost of a bit of extra runtime
1697           stack usage in some cases.
1698
1699           The problem is described in more detail at:
1700               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1701
1702           Only Thumb-2 kernels are affected.
1703
1704           Unless you are sure your tools don't have this problem, say Y.
1705
1706 config ARM_ASM_UNIFIED
1707         bool
1708
1709 config AEABI
1710         bool "Use the ARM EABI to compile the kernel"
1711         help
1712           This option allows for the kernel to be compiled using the latest
1713           ARM ABI (aka EABI).  This is only useful if you are using a user
1714           space environment that is also compiled with EABI.
1715
1716           Since there are major incompatibilities between the legacy ABI and
1717           EABI, especially with regard to structure member alignment, this
1718           option also changes the kernel syscall calling convention to
1719           disambiguate both ABIs and allow for backward compatibility support
1720           (selected with CONFIG_OABI_COMPAT).
1721
1722           To use this you need GCC version 4.0.0 or later.
1723
1724 config OABI_COMPAT
1725         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1726         depends on AEABI && !THUMB2_KERNEL
1727         default y
1728         help
1729           This option preserves the old syscall interface along with the
1730           new (ARM EABI) one. It also provides a compatibility layer to
1731           intercept syscalls that have structure arguments which layout
1732           in memory differs between the legacy ABI and the new ARM EABI
1733           (only for non "thumb" binaries). This option adds a tiny
1734           overhead to all syscalls and produces a slightly larger kernel.
1735           If you know you'll be using only pure EABI user space then you
1736           can say N here. If this option is not selected and you attempt
1737           to execute a legacy ABI binary then the result will be
1738           UNPREDICTABLE (in fact it can be predicted that it won't work
1739           at all). If in doubt say Y.
1740
1741 config ARCH_HAS_HOLES_MEMORYMODEL
1742         bool
1743
1744 config ARCH_SPARSEMEM_ENABLE
1745         bool
1746
1747 config ARCH_SPARSEMEM_DEFAULT
1748         def_bool ARCH_SPARSEMEM_ENABLE
1749
1750 config ARCH_SELECT_MEMORY_MODEL
1751         def_bool ARCH_SPARSEMEM_ENABLE
1752
1753 config HAVE_ARCH_PFN_VALID
1754         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1755
1756 config HIGHMEM
1757         bool "High Memory Support"
1758         depends on MMU
1759         help
1760           The address space of ARM processors is only 4 Gigabytes large
1761           and it has to accommodate user address space, kernel address
1762           space as well as some memory mapped IO. That means that, if you
1763           have a large amount of physical memory and/or IO, not all of the
1764           memory can be "permanently mapped" by the kernel. The physical
1765           memory that is not permanently mapped is called "high memory".
1766
1767           Depending on the selected kernel/user memory split, minimum
1768           vmalloc space and actual amount of RAM, you may not need this
1769           option which should result in a slightly faster kernel.
1770
1771           If unsure, say n.
1772
1773 config HIGHPTE
1774         bool "Allocate 2nd-level pagetables from highmem"
1775         depends on HIGHMEM
1776
1777 config HW_PERF_EVENTS
1778         bool "Enable hardware performance counter support for perf events"
1779         depends on PERF_EVENTS
1780         default y
1781         help
1782           Enable hardware performance counter support for perf events. If
1783           disabled, perf events will use software events only.
1784
1785 source "mm/Kconfig"
1786
1787 config FORCE_MAX_ZONEORDER
1788         int "Maximum zone order" if ARCH_SHMOBILE
1789         range 11 64 if ARCH_SHMOBILE
1790         default "12" if SOC_AM33XX
1791         default "9" if SA1111
1792         default "11"
1793         help
1794           The kernel memory allocator divides physically contiguous memory
1795           blocks into "zones", where each zone is a power of two number of
1796           pages.  This option selects the largest power of two that the kernel
1797           keeps in the memory allocator.  If you need to allocate very large
1798           blocks of physically contiguous memory, then you may need to
1799           increase this value.
1800
1801           This config option is actually maximum order plus one. For example,
1802           a value of 11 means that the largest free memory block is 2^10 pages.
1803
1804 config ALIGNMENT_TRAP
1805         bool
1806         depends on CPU_CP15_MMU
1807         default y if !ARCH_EBSA110
1808         select HAVE_PROC_CPU if PROC_FS
1809         help
1810           ARM processors cannot fetch/store information which is not
1811           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1812           address divisible by 4. On 32-bit ARM processors, these non-aligned
1813           fetch/store instructions will be emulated in software if you say
1814           here, which has a severe performance impact. This is necessary for
1815           correct operation of some network protocols. With an IP-only
1816           configuration it is safe to say N, otherwise say Y.
1817
1818 config UACCESS_WITH_MEMCPY
1819         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1820         depends on MMU
1821         default y if CPU_FEROCEON
1822         help
1823           Implement faster copy_to_user and clear_user methods for CPU
1824           cores where a 8-word STM instruction give significantly higher
1825           memory write throughput than a sequence of individual 32bit stores.
1826
1827           A possible side effect is a slight increase in scheduling latency
1828           between threads sharing the same address space if they invoke
1829           such copy operations with large buffers.
1830
1831           However, if the CPU data cache is using a write-allocate mode,
1832           this option is unlikely to provide any performance gain.
1833
1834 config SECCOMP
1835         bool
1836         prompt "Enable seccomp to safely compute untrusted bytecode"
1837         ---help---
1838           This kernel feature is useful for number crunching applications
1839           that may need to compute untrusted bytecode during their
1840           execution. By using pipes or other transports made available to
1841           the process as file descriptors supporting the read/write
1842           syscalls, it's possible to isolate those applications in
1843           their own address space using seccomp. Once seccomp is
1844           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1845           and the task is only allowed to execute a few safe syscalls
1846           defined by each seccomp mode.
1847
1848 config CC_STACKPROTECTOR
1849         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1850         help
1851           This option turns on the -fstack-protector GCC feature. This
1852           feature puts, at the beginning of functions, a canary value on
1853           the stack just before the return address, and validates
1854           the value just before actually returning.  Stack based buffer
1855           overflows (that need to overwrite this return address) now also
1856           overwrite the canary, which gets detected and the attack is then
1857           neutralized via a kernel panic.
1858           This feature requires gcc version 4.2 or above.
1859
1860 config XEN_DOM0
1861         def_bool y
1862         depends on XEN
1863
1864 config XEN
1865         bool "Xen guest support on ARM (EXPERIMENTAL)"
1866         depends on ARM && OF
1867         depends on CPU_V7 && !CPU_V6
1868         help
1869           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1870
1871 endmenu
1872
1873 menu "Boot options"
1874
1875 config USE_OF
1876         bool "Flattened Device Tree support"
1877         select IRQ_DOMAIN
1878         select OF
1879         select OF_EARLY_FLATTREE
1880         help
1881           Include support for flattened device tree machine descriptions.
1882
1883 config ATAGS
1884         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1885         default y
1886         help
1887           This is the traditional way of passing data to the kernel at boot
1888           time. If you are solely relying on the flattened device tree (or
1889           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1890           to remove ATAGS support from your kernel binary.  If unsure,
1891           leave this to y.
1892
1893 config DEPRECATED_PARAM_STRUCT
1894         bool "Provide old way to pass kernel parameters"
1895         depends on ATAGS
1896         help
1897           This was deprecated in 2001 and announced to live on for 5 years.
1898           Some old boot loaders still use this way.
1899
1900 # Compressed boot loader in ROM.  Yes, we really want to ask about
1901 # TEXT and BSS so we preserve their values in the config files.
1902 config ZBOOT_ROM_TEXT
1903         hex "Compressed ROM boot loader base address"
1904         default "0"
1905         help
1906           The physical address at which the ROM-able zImage is to be
1907           placed in the target.  Platforms which normally make use of
1908           ROM-able zImage formats normally set this to a suitable
1909           value in their defconfig file.
1910
1911           If ZBOOT_ROM is not enabled, this has no effect.
1912
1913 config ZBOOT_ROM_BSS
1914         hex "Compressed ROM boot loader BSS address"
1915         default "0"
1916         help
1917           The base address of an area of read/write memory in the target
1918           for the ROM-able zImage which must be available while the
1919           decompressor is running. It must be large enough to hold the
1920           entire decompressed kernel plus an additional 128 KiB.
1921           Platforms which normally make use of ROM-able zImage formats
1922           normally set this to a suitable value in their defconfig file.
1923
1924           If ZBOOT_ROM is not enabled, this has no effect.
1925
1926 config ZBOOT_ROM
1927         bool "Compressed boot loader in ROM/flash"
1928         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1929         help
1930           Say Y here if you intend to execute your compressed kernel image
1931           (zImage) directly from ROM or flash.  If unsure, say N.
1932
1933 choice
1934         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1935         depends on ZBOOT_ROM && ARCH_SH7372
1936         default ZBOOT_ROM_NONE
1937         help
1938           Include experimental SD/MMC loading code in the ROM-able zImage.
1939           With this enabled it is possible to write the ROM-able zImage
1940           kernel image to an MMC or SD card and boot the kernel straight
1941           from the reset vector. At reset the processor Mask ROM will load
1942           the first part of the ROM-able zImage which in turn loads the
1943           rest the kernel image to RAM.
1944
1945 config ZBOOT_ROM_NONE
1946         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1947         help
1948           Do not load image from SD or MMC
1949
1950 config ZBOOT_ROM_MMCIF
1951         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1952         help
1953           Load image from MMCIF hardware block.
1954
1955 config ZBOOT_ROM_SH_MOBILE_SDHI
1956         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1957         help
1958           Load image from SDHI hardware block
1959
1960 endchoice
1961
1962 config ARM_APPENDED_DTB
1963         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1964         depends on OF && !ZBOOT_ROM
1965         help
1966           With this option, the boot code will look for a device tree binary
1967           (DTB) appended to zImage
1968           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1969
1970           This is meant as a backward compatibility convenience for those
1971           systems with a bootloader that can't be upgraded to accommodate
1972           the documented boot protocol using a device tree.
1973
1974           Beware that there is very little in terms of protection against
1975           this option being confused by leftover garbage in memory that might
1976           look like a DTB header after a reboot if no actual DTB is appended
1977           to zImage.  Do not leave this option active in a production kernel
1978           if you don't intend to always append a DTB.  Proper passing of the
1979           location into r2 of a bootloader provided DTB is always preferable
1980           to this option.
1981
1982 config ARM_ATAG_DTB_COMPAT
1983         bool "Supplement the appended DTB with traditional ATAG information"
1984         depends on ARM_APPENDED_DTB
1985         help
1986           Some old bootloaders can't be updated to a DTB capable one, yet
1987           they provide ATAGs with memory configuration, the ramdisk address,
1988           the kernel cmdline string, etc.  Such information is dynamically
1989           provided by the bootloader and can't always be stored in a static
1990           DTB.  To allow a device tree enabled kernel to be used with such
1991           bootloaders, this option allows zImage to extract the information
1992           from the ATAG list and store it at run time into the appended DTB.
1993
1994 choice
1995         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1996         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1997
1998 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1999         bool "Use bootloader kernel arguments if available"
2000         help
2001           Uses the command-line options passed by the boot loader instead of
2002           the device tree bootargs property. If the boot loader doesn't provide
2003           any, the device tree bootargs property will be used.
2004
2005 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
2006         bool "Extend with bootloader kernel arguments"
2007         help
2008           The command-line arguments provided by the boot loader will be
2009           appended to the the device tree bootargs property.
2010
2011 endchoice
2012
2013 config CMDLINE
2014         string "Default kernel command string"
2015         default ""
2016         help
2017           On some architectures (EBSA110 and CATS), there is currently no way
2018           for the boot loader to pass arguments to the kernel. For these
2019           architectures, you should supply some command-line options at build
2020           time by entering them here. As a minimum, you should specify the
2021           memory size and the root device (e.g., mem=64M root=/dev/nfs).
2022
2023 choice
2024         prompt "Kernel command line type" if CMDLINE != ""
2025         default CMDLINE_FROM_BOOTLOADER
2026         depends on ATAGS
2027
2028 config CMDLINE_FROM_BOOTLOADER
2029         bool "Use bootloader kernel arguments if available"
2030         help
2031           Uses the command-line options passed by the boot loader. If
2032           the boot loader doesn't provide any, the default kernel command
2033           string provided in CMDLINE will be used.
2034
2035 config CMDLINE_EXTEND
2036         bool "Extend bootloader kernel arguments"
2037         help
2038           The command-line arguments provided by the boot loader will be
2039           appended to the default kernel command string.
2040
2041 config CMDLINE_FORCE
2042         bool "Always use the default kernel command string"
2043         help
2044           Always use the default kernel command string, even if the boot
2045           loader passes other arguments to the kernel.
2046           This is useful if you cannot or don't want to change the
2047           command-line options your boot loader passes to the kernel.
2048 endchoice
2049
2050 config XIP_KERNEL
2051         bool "Kernel Execute-In-Place from ROM"
2052         depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
2053         help
2054           Execute-In-Place allows the kernel to run from non-volatile storage
2055           directly addressable by the CPU, such as NOR flash. This saves RAM
2056           space since the text section of the kernel is not loaded from flash
2057           to RAM.  Read-write sections, such as the data section and stack,
2058           are still copied to RAM.  The XIP kernel is not compressed since
2059           it has to run directly from flash, so it will take more space to
2060           store it.  The flash address used to link the kernel object files,
2061           and for storing it, is configuration dependent. Therefore, if you
2062           say Y here, you must know the proper physical address where to
2063           store the kernel image depending on your own flash memory usage.
2064
2065           Also note that the make target becomes "make xipImage" rather than
2066           "make zImage" or "make Image".  The final kernel binary to put in
2067           ROM memory will be arch/arm/boot/xipImage.
2068
2069           If unsure, say N.
2070
2071 config XIP_PHYS_ADDR
2072         hex "XIP Kernel Physical Location"
2073         depends on XIP_KERNEL
2074         default "0x00080000"
2075         help
2076           This is the physical address in your flash memory the kernel will
2077           be linked for and stored to.  This address is dependent on your
2078           own flash usage.
2079
2080 config KEXEC
2081         bool "Kexec system call (EXPERIMENTAL)"
2082         depends on (!SMP || HOTPLUG_CPU)
2083         help
2084           kexec is a system call that implements the ability to shutdown your
2085           current kernel, and to start another kernel.  It is like a reboot
2086           but it is independent of the system firmware.   And like a reboot
2087           you can start any kernel with it, not just Linux.
2088
2089           It is an ongoing process to be certain the hardware in a machine
2090           is properly shutdown, so do not be surprised if this code does not
2091           initially work for you.  It may help to enable device hotplugging
2092           support.
2093
2094 config ATAGS_PROC
2095         bool "Export atags in procfs"
2096         depends on ATAGS && KEXEC
2097         default y
2098         help
2099           Should the atags used to boot the kernel be exported in an "atags"
2100           file in procfs. Useful with kexec.
2101
2102 config CRASH_DUMP
2103         bool "Build kdump crash kernel (EXPERIMENTAL)"
2104         help
2105           Generate crash dump after being started by kexec. This should
2106           be normally only set in special crash dump kernels which are
2107           loaded in the main kernel with kexec-tools into a specially
2108           reserved region and then later executed after a crash by
2109           kdump/kexec. The crash dump kernel must be compiled to a
2110           memory address not used by the main kernel
2111
2112           For more details see Documentation/kdump/kdump.txt
2113
2114 config AUTO_ZRELADDR
2115         bool "Auto calculation of the decompressed kernel image address"
2116         depends on !ZBOOT_ROM && !ARCH_U300
2117         help
2118           ZRELADDR is the physical address where the decompressed kernel
2119           image will be placed. If AUTO_ZRELADDR is selected, the address
2120           will be determined at run-time by masking the current IP with
2121           0xf8000000. This assumes the zImage being placed in the first 128MB
2122           from start of memory.
2123
2124 endmenu
2125
2126 menu "CPU Power Management"
2127
2128 if ARCH_HAS_CPUFREQ
2129
2130 source "drivers/cpufreq/Kconfig"
2131
2132 config CPU_FREQ_IMX
2133         tristate "CPUfreq driver for i.MX CPUs"
2134         depends on ARCH_MXC && CPU_FREQ
2135         select CPU_FREQ_TABLE
2136         help
2137           This enables the CPUfreq driver for i.MX CPUs.
2138
2139 config CPU_FREQ_SA1100
2140         bool
2141
2142 config CPU_FREQ_SA1110
2143         bool
2144
2145 config CPU_FREQ_INTEGRATOR
2146         tristate "CPUfreq driver for ARM Integrator CPUs"
2147         depends on ARCH_INTEGRATOR && CPU_FREQ
2148         default y
2149         help
2150           This enables the CPUfreq driver for ARM Integrator CPUs.
2151
2152           For details, take a look at <file:Documentation/cpu-freq>.
2153
2154           If in doubt, say Y.
2155
2156 config CPU_FREQ_PXA
2157         bool
2158         depends on CPU_FREQ && ARCH_PXA && PXA25x
2159         default y
2160         select CPU_FREQ_DEFAULT_GOV_USERSPACE
2161         select CPU_FREQ_TABLE
2162
2163 config CPU_FREQ_S3C
2164         bool
2165         help
2166           Internal configuration node for common cpufreq on Samsung SoC
2167
2168 config CPU_FREQ_S3C24XX
2169         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2170         depends on ARCH_S3C24XX && CPU_FREQ
2171         select CPU_FREQ_S3C
2172         help
2173           This enables the CPUfreq driver for the Samsung S3C24XX family
2174           of CPUs.
2175
2176           For details, take a look at <file:Documentation/cpu-freq>.
2177
2178           If in doubt, say N.
2179
2180 config CPU_FREQ_S3C24XX_PLL
2181         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2182         depends on CPU_FREQ_S3C24XX
2183         help
2184           Compile in support for changing the PLL frequency from the
2185           S3C24XX series CPUfreq driver. The PLL takes time to settle
2186           after a frequency change, so by default it is not enabled.
2187
2188           This also means that the PLL tables for the selected CPU(s) will
2189           be built which may increase the size of the kernel image.
2190
2191 config CPU_FREQ_S3C24XX_DEBUG
2192         bool "Debug CPUfreq Samsung driver core"
2193         depends on CPU_FREQ_S3C24XX
2194         help
2195           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2196
2197 config CPU_FREQ_S3C24XX_IODEBUG
2198         bool "Debug CPUfreq Samsung driver IO timing"
2199         depends on CPU_FREQ_S3C24XX
2200         help
2201           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2202
2203 config CPU_FREQ_S3C24XX_DEBUGFS
2204         bool "Export debugfs for CPUFreq"
2205         depends on CPU_FREQ_S3C24XX && DEBUG_FS
2206         help
2207           Export status information via debugfs.
2208
2209 endif
2210
2211 source "drivers/cpuidle/Kconfig"
2212
2213 endmenu
2214
2215 menu "Floating point emulation"
2216
2217 comment "At least one emulation must be selected"
2218
2219 config FPE_NWFPE
2220         bool "NWFPE math emulation"
2221         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2222         ---help---
2223           Say Y to include the NWFPE floating point emulator in the kernel.
2224           This is necessary to run most binaries. Linux does not currently
2225           support floating point hardware so you need to say Y here even if
2226           your machine has an FPA or floating point co-processor podule.
2227
2228           You may say N here if you are going to load the Acorn FPEmulator
2229           early in the bootup.
2230
2231 config FPE_NWFPE_XP
2232         bool "Support extended precision"
2233         depends on FPE_NWFPE
2234         help
2235           Say Y to include 80-bit support in the kernel floating-point
2236           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2237           Note that gcc does not generate 80-bit operations by default,
2238           so in most cases this option only enlarges the size of the
2239           floating point emulator without any good reason.
2240
2241           You almost surely want to say N here.
2242
2243 config FPE_FASTFPE
2244         bool "FastFPE math emulation (EXPERIMENTAL)"
2245         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2246         ---help---
2247           Say Y here to include the FAST floating point emulator in the kernel.
2248           This is an experimental much faster emulator which now also has full
2249           precision for the mantissa.  It does not support any exceptions.
2250           It is very simple, and approximately 3-6 times faster than NWFPE.
2251
2252           It should be sufficient for most programs.  It may be not suitable
2253           for scientific calculations, but you have to check this for yourself.
2254           If you do not feel you need a faster FP emulation you should better
2255           choose NWFPE.
2256
2257 config VFP
2258         bool "VFP-format floating point maths"
2259         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2260         help
2261           Say Y to include VFP support code in the kernel. This is needed
2262           if your hardware includes a VFP unit.
2263
2264           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2265           release notes and additional status information.
2266
2267           Say N if your target does not have VFP hardware.
2268
2269 config VFPv3
2270         bool
2271         depends on VFP
2272         default y if CPU_V7
2273
2274 config NEON
2275         bool "Advanced SIMD (NEON) Extension support"
2276         depends on VFPv3 && CPU_V7
2277         help
2278           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2279           Extension.
2280
2281 endmenu
2282
2283 menu "Userspace binary formats"
2284
2285 source "fs/Kconfig.binfmt"
2286
2287 config ARTHUR
2288         tristate "RISC OS personality"
2289         depends on !AEABI
2290         help
2291           Say Y here to include the kernel code necessary if you want to run
2292           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2293           experimental; if this sounds frightening, say N and sleep in peace.
2294           You can also say M here to compile this support as a module (which
2295           will be called arthur).
2296
2297 endmenu
2298
2299 menu "Power management options"
2300
2301 source "kernel/power/Kconfig"
2302
2303 config ARCH_SUSPEND_POSSIBLE
2304         depends on !ARCH_S5PC100
2305         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2306                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2307         def_bool y
2308
2309 config ARM_CPU_SUSPEND
2310         def_bool PM_SLEEP
2311
2312 endmenu
2313
2314 source "net/Kconfig"
2315
2316 source "drivers/Kconfig"
2317
2318 source "fs/Kconfig"
2319
2320 source "arch/arm/Kconfig.debug"
2321
2322 source "security/Kconfig"
2323
2324 source "crypto/Kconfig"
2325
2326 source "lib/Kconfig"
2327
2328 source "arch/arm/kvm/Kconfig"