arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select ARCH_BINFMT_ELF_RANDOMIZE_PIE
   5         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
   6         select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
   7         select ARCH_HAVE_CUSTOM_GPIO_H
   8         select ARCH_MIGHT_HAVE_PC_PARPORT
   9         select ARCH_USE_BUILTIN_BSWAP
  10         select ARCH_USE_CMPXCHG_LOCKREF
  11         select ARCH_WANT_IPC_PARSE_VERSION
  12         select BUILDTIME_EXTABLE_SORT if MMU
  13         select CLONE_BACKWARDS
  14         select CPU_PM if (SUSPEND || CPU_IDLE)
  15         select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
  16         select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
  17         select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  18         select GENERIC_IDLE_POLL_SETUP
  19         select GENERIC_IRQ_PROBE
  20         select GENERIC_IRQ_SHOW
  21         select GENERIC_PCI_IOMAP
  22         select GENERIC_SCHED_CLOCK
  23         select GENERIC_SMP_IDLE_THREAD
  24         select GENERIC_STRNCPY_FROM_USER
  25         select GENERIC_STRNLEN_USER
  26         select HARDIRQS_SW_RESEND
  27         select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
  28         select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  29         select HAVE_ARCH_KGDB
  30         select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
  31         select HAVE_ARCH_TRACEHOOK
  32         select HAVE_BPF_JIT
  33         select HAVE_CC_STACKPROTECTOR
  34         select HAVE_CONTEXT_TRACKING
  35         select HAVE_C_RECORDMCOUNT
  36         select HAVE_DEBUG_KMEMLEAK
  37         select HAVE_DMA_API_DEBUG
  38         select HAVE_DMA_ATTRS
  39         select HAVE_DMA_CONTIGUOUS if MMU
  40         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  41         select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
  42         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  43         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  44         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  45         select HAVE_GENERIC_DMA_COHERENT
  46         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  47         select HAVE_IDE if PCI || ISA || PCMCIA
  48         select HAVE_IRQ_TIME_ACCOUNTING
  49         select HAVE_KERNEL_GZIP
  50         select HAVE_KERNEL_LZ4
  51         select HAVE_KERNEL_LZMA
  52         select HAVE_KERNEL_LZO
  53         select HAVE_KERNEL_XZ
  54         select HAVE_KPROBES if !XIP_KERNEL
  55         select HAVE_KRETPROBES if (HAVE_KPROBES)
  56         select HAVE_MEMBLOCK
  57         select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
  58         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  59         select HAVE_PERF_EVENTS
  60         select HAVE_PERF_REGS
  61         select HAVE_PERF_USER_STACK_DUMP
  62         select HAVE_REGS_AND_STACK_ACCESS_API
  63         select HAVE_SYSCALL_TRACEPOINTS
  64         select HAVE_UID16
  65         select HAVE_VIRT_CPU_ACCOUNTING_GEN
  66         select IRQ_FORCED_THREADING
  67         select KTIME_SCALAR
  68         select MODULES_USE_ELF_REL
  69         select NO_BOOTMEM
  70         select OLD_SIGACTION
  71         select OLD_SIGSUSPEND3
  72         select PERF_USE_VMALLOC
  73         select RTC_LIB
  74         select SYS_SUPPORTS_APM_EMULATION
  75         # Above selects are sorted alphabetically; please add new ones
  76         # according to that.  Thanks.
  77         help
  78           The ARM series is a line of low-power-consumption RISC chip designs
  79           licensed by ARM Ltd and targeted at embedded applications and
  80           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  81           manufactured, but legacy ARM-based PC hardware remains popular in
  82           Europe.  There is an ARM Linux project with a web page at
  83           <http://www.arm.linux.org.uk/>.
  84
  85 config ARM_HAS_SG_CHAIN
  86         bool
  87
  88 config NEED_SG_DMA_LENGTH
  89         bool
  90
  91 config ARM_DMA_USE_IOMMU
  92         bool
  93         select ARM_HAS_SG_CHAIN
  94         select NEED_SG_DMA_LENGTH
  95
  96 if ARM_DMA_USE_IOMMU
  97
  98 config ARM_DMA_IOMMU_ALIGNMENT
  99         int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
 100         range 4 9
 101         default 8
 102         help
 103           DMA mapping framework by default aligns all buffers to the smallest
 104           PAGE_SIZE order which is greater than or equal to the requested buffer
 105           size. This works well for buffers up to a few hundreds kilobytes, but
 106           for larger buffers it just a waste of address space. Drivers which has
 107           relatively small addressing window (like 64Mib) might run out of
 108           virtual space with just a few allocations.
 109
 110           With this parameter you can specify the maximum PAGE_SIZE order for
 111           DMA IOMMU buffers. Larger buffers will be aligned only to this
 112           specified order. The order is expressed as a power of two multiplied
 113           by the PAGE_SIZE.
 114
 115 endif
 116
 117 config MIGHT_HAVE_PCI
 118         bool
 119
 120 config SYS_SUPPORTS_APM_EMULATION
 121         bool
 122
 123 config HAVE_TCM
 124         bool
 125         select GENERIC_ALLOCATOR
 126
 127 config HAVE_PROC_CPU
 128         bool
 129
 130 config NO_IOPORT_MAP
 131         bool
 132
 133 config EISA
 134         bool
 135         ---help---
 136           The Extended Industry Standard Architecture (EISA) bus was
 137           developed as an open alternative to the IBM MicroChannel bus.
 138
 139           The EISA bus provided some of the features of the IBM MicroChannel
 140           bus while maintaining backward compatibility with cards made for
 141           the older ISA bus.  The EISA bus saw limited use between 1988 and
 142           1995 when it was made obsolete by the PCI bus.
 143
 144           Say Y here if you are building a kernel for an EISA-based machine.
 145
 146           Otherwise, say N.
 147
 148 config SBUS
 149         bool
 150
 151 config STACKTRACE_SUPPORT
 152         bool
 153         default y
 154
 155 config HAVE_LATENCYTOP_SUPPORT
 156         bool
 157         depends on !SMP
 158         default y
 159
 160 config LOCKDEP_SUPPORT
 161         bool
 162         default y
 163
 164 config TRACE_IRQFLAGS_SUPPORT
 165         bool
 166         default y
 167
 168 config RWSEM_XCHGADD_ALGORITHM
 169         bool
 170         default y
 171
 172 config ARCH_HAS_ILOG2_U32
 173         bool
 174
 175 config ARCH_HAS_ILOG2_U64
 176         bool
 177
 178 config ARCH_HAS_BANDGAP
 179         bool
 180
 181 config GENERIC_HWEIGHT
 182         bool
 183         default y
 184
 185 config GENERIC_CALIBRATE_DELAY
 186         bool
 187         default y
 188
 189 config ARCH_MAY_HAVE_PC_FDC
 190         bool
 191
 192 config ZONE_DMA
 193         bool
 194
 195 config NEED_DMA_MAP_STATE
 196        def_bool y
 197
 198 config ARCH_SUPPORTS_UPROBES
 199         def_bool y
 200
 201 config ARCH_HAS_DMA_SET_COHERENT_MASK
 202         bool
 203
 204 config GENERIC_ISA_DMA
 205         bool
 206
 207 config FIQ
 208         bool
 209
 210 config NEED_RET_TO_USER
 211         bool
 212
 213 config ARCH_MTD_XIP
 214         bool
 215
 216 config VECTORS_BASE
 217         hex
 218         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 219         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 220         default 0x00000000
 221         help
 222           The base address of exception vectors.  This must be two pages
 223           in size.
 224
 225 config ARM_PATCH_PHYS_VIRT
 226         bool "Patch physical to virtual translations at runtime" if EMBEDDED
 227         default y
 228         depends on !XIP_KERNEL && MMU
 229         depends on !ARCH_REALVIEW || !SPARSEMEM
 230         help
 231           Patch phys-to-virt and virt-to-phys translation functions at
 232           boot and module load time according to the position of the
 233           kernel in system memory.
 234
 235           This can only be used with non-XIP MMU kernels where the base
 236           of physical memory is at a 16MB boundary.
 237
 238           Only disable this option if you know that you do not require
 239           this feature (eg, building a kernel for a single machine) and
 240           you need to shrink the kernel to the minimal size.
 241
 242 config NEED_MACH_IO_H
 243         bool
 244         help
 245           Select this when mach/io.h is required to provide special
 246           definitions for this platform.  The need for mach/io.h should
 247           be avoided when possible.
 248
 249 config NEED_MACH_MEMORY_H
 250         bool
 251         help
 252           Select this when mach/memory.h is required to provide special
 253           definitions for this platform.  The need for mach/memory.h should
 254           be avoided when possible.
 255
 256 config PHYS_OFFSET
 257         hex "Physical address of main memory" if MMU
 258         depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
 259         default DRAM_BASE if !MMU
 260         help
 261           Please provide the physical address corresponding to the
 262           location of main memory in your system.
 263
 264 config GENERIC_BUG
 265         def_bool y
 266         depends on BUG
 267
 268 source "init/Kconfig"
 269
 270 source "kernel/Kconfig.freezer"
 271
 272 menu "System Type"
 273
 274 config MMU
 275         bool "MMU-based Paged Memory Management Support"
 276         default y
 277         help
 278           Select if you want MMU-based virtualised addressing space
 279           support by paged memory management. If unsure, say 'Y'.
 280
 281 #
 282 # The "ARM system type" choice list is ordered alphabetically by option
 283 # text.  Please add new entries in the option alphabetic order.
 284 #
 285 choice
 286         prompt "ARM system type"
 287         default ARCH_VERSATILE if !MMU
 288         default ARCH_MULTIPLATFORM if MMU
 289
 290 config ARCH_MULTIPLATFORM
 291         bool "Allow multiple platforms to be selected"
 292         depends on MMU
 293         select ARCH_WANT_OPTIONAL_GPIOLIB
 294         select ARM_HAS_SG_CHAIN
 295         select ARM_PATCH_PHYS_VIRT
 296         select AUTO_ZRELADDR
 297         select CLKSRC_OF
 298         select COMMON_CLK
 299         select GENERIC_CLOCKEVENTS
 300         select MIGHT_HAVE_PCI
 301         select MULTI_IRQ_HANDLER
 302         select SPARSE_IRQ
 303         select USE_OF
 304
 305 config ARCH_INTEGRATOR
 306         bool "ARM Ltd. Integrator family"
 307         select ARM_AMBA
 308         select ARM_PATCH_PHYS_VIRT
 309         select AUTO_ZRELADDR
 310         select COMMON_CLK
 311         select COMMON_CLK_VERSATILE
 312         select GENERIC_CLOCKEVENTS
 313         select HAVE_TCM
 314         select ICST
 315         select MULTI_IRQ_HANDLER
 316         select PLAT_VERSATILE
 317         select SPARSE_IRQ
 318         select USE_OF
 319         select VERSATILE_FPGA_IRQ
 320         help
 321           Support for ARM's Integrator platform.
 322
 323 config ARCH_REALVIEW
 324         bool "ARM Ltd. RealView family"
 325         select ARCH_WANT_OPTIONAL_GPIOLIB
 326         select ARM_AMBA
 327         select ARM_TIMER_SP804
 328         select COMMON_CLK
 329         select COMMON_CLK_VERSATILE
 330         select GENERIC_CLOCKEVENTS
 331         select GPIO_PL061 if GPIOLIB
 332         select ICST
 333         select NEED_MACH_MEMORY_H
 334         select PLAT_VERSATILE
 335         help
 336           This enables support for ARM Ltd RealView boards.
 337
 338 config ARCH_VERSATILE
 339         bool "ARM Ltd. Versatile family"
 340         select ARCH_WANT_OPTIONAL_GPIOLIB
 341         select ARM_AMBA
 342         select ARM_TIMER_SP804
 343         select ARM_VIC
 344         select CLKDEV_LOOKUP
 345         select GENERIC_CLOCKEVENTS
 346         select HAVE_MACH_CLKDEV
 347         select ICST
 348         select PLAT_VERSATILE
 349         select PLAT_VERSATILE_CLOCK
 350         select VERSATILE_FPGA_IRQ
 351         help
 352           This enables support for ARM Ltd Versatile board.
 353
 354 config ARCH_AT91
 355         bool "Atmel AT91"
 356         select ARCH_REQUIRE_GPIOLIB
 357         select CLKDEV_LOOKUP
 358         select IRQ_DOMAIN
 359         select NEED_MACH_IO_H if PCCARD
 360         select PINCTRL
 361         select PINCTRL_AT91 if USE_OF
 362         help
 363           This enables support for systems based on Atmel
 364           AT91RM9200 and AT91SAM9* processors.
 365
 366 config ARCH_CLPS711X
 367         bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
 368         select ARCH_REQUIRE_GPIOLIB
 369         select AUTO_ZRELADDR
 370         select CLKSRC_MMIO
 371         select COMMON_CLK
 372         select CPU_ARM720T
 373         select GENERIC_CLOCKEVENTS
 374         select MFD_SYSCON
 375         help
 376           Support for Cirrus Logic 711x/721x/731x based boards.
 377
 378 config ARCH_GEMINI
 379         bool "Cortina Systems Gemini"
 380         select ARCH_REQUIRE_GPIOLIB
 381         select CLKSRC_MMIO
 382         select CPU_FA526
 383         select GENERIC_CLOCKEVENTS
 384         help
 385           Support for the Cortina Systems Gemini family SoCs
 386
 387 config ARCH_EBSA110
 388         bool "EBSA-110"
 389         select ARCH_USES_GETTIMEOFFSET
 390         select CPU_SA110
 391         select ISA
 392         select NEED_MACH_IO_H
 393         select NEED_MACH_MEMORY_H
 394         select NO_IOPORT_MAP
 395         help
 396           This is an evaluation board for the StrongARM processor available
 397           from Digital. It has limited hardware on-board, including an
 398           Ethernet interface, two PCMCIA sockets, two serial ports and a
 399           parallel port.
 400
 401 config ARCH_EFM32
 402         bool "Energy Micro efm32"
 403         depends on !MMU
 404         select ARCH_REQUIRE_GPIOLIB
 405         select ARM_NVIC
 406         select AUTO_ZRELADDR
 407         select CLKSRC_OF
 408         select COMMON_CLK
 409         select CPU_V7M
 410         select GENERIC_CLOCKEVENTS
 411         select NO_DMA
 412         select NO_IOPORT_MAP
 413         select SPARSE_IRQ
 414         select USE_OF
 415         help
 416           Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
 417           processors.
 418
 419 config ARCH_EP93XX
 420         bool "EP93xx-based"
 421         select ARCH_HAS_HOLES_MEMORYMODEL
 422         select ARCH_REQUIRE_GPIOLIB
 423         select ARCH_USES_GETTIMEOFFSET
 424         select ARM_AMBA
 425         select ARM_VIC
 426         select CLKDEV_LOOKUP
 427         select CPU_ARM920T
 428         select NEED_MACH_MEMORY_H
 429         help
 430           This enables support for the Cirrus EP93xx series of CPUs.
 431
 432 config ARCH_FOOTBRIDGE
 433         bool "FootBridge"
 434         select CPU_SA110
 435         select FOOTBRIDGE
 436         select GENERIC_CLOCKEVENTS
 437         select HAVE_IDE
 438         select NEED_MACH_IO_H if !MMU
 439         select NEED_MACH_MEMORY_H
 440         help
 441           Support for systems based on the DC21285 companion chip
 442           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 443
 444 config ARCH_NETX
 445         bool "Hilscher NetX based"
 446         select ARM_VIC
 447         select CLKSRC_MMIO
 448         select CPU_ARM926T
 449         select GENERIC_CLOCKEVENTS
 450         help
 451           This enables support for systems based on the Hilscher NetX Soc
 452
 453 config ARCH_IOP13XX
 454         bool "IOP13xx-based"
 455         depends on MMU
 456         select CPU_XSC3
 457         select NEED_MACH_MEMORY_H
 458         select NEED_RET_TO_USER
 459         select PCI
 460         select PLAT_IOP
 461         select VMSPLIT_1G
 462         select SPARSE_IRQ
 463         help
 464           Support for Intel's IOP13XX (XScale) family of processors.
 465
 466 config ARCH_IOP32X
 467         bool "IOP32x-based"
 468         depends on MMU
 469         select ARCH_REQUIRE_GPIOLIB
 470         select CPU_XSCALE
 471         select GPIO_IOP
 472         select NEED_RET_TO_USER
 473         select PCI
 474         select PLAT_IOP
 475         help
 476           Support for Intel's 80219 and IOP32X (XScale) family of
 477           processors.
 478
 479 config ARCH_IOP33X
 480         bool "IOP33x-based"
 481         depends on MMU
 482         select ARCH_REQUIRE_GPIOLIB
 483         select CPU_XSCALE
 484         select GPIO_IOP
 485         select NEED_RET_TO_USER
 486         select PCI
 487         select PLAT_IOP
 488         help
 489           Support for Intel's IOP33X (XScale) family of processors.
 490
 491 config ARCH_IXP4XX
 492         bool "IXP4xx-based"
 493         depends on MMU
 494         select ARCH_HAS_DMA_SET_COHERENT_MASK
 495         select ARCH_REQUIRE_GPIOLIB
 496         select ARCH_SUPPORTS_BIG_ENDIAN
 497         select CLKSRC_MMIO
 498         select CPU_XSCALE
 499         select DMABOUNCE if PCI
 500         select GENERIC_CLOCKEVENTS
 501         select MIGHT_HAVE_PCI
 502         select NEED_MACH_IO_H
 503         select USB_EHCI_BIG_ENDIAN_DESC
 504         select USB_EHCI_BIG_ENDIAN_MMIO
 505         help
 506           Support for Intel's IXP4XX (XScale) family of processors.
 507
 508 config ARCH_DOVE
 509         bool "Marvell Dove"
 510         select ARCH_REQUIRE_GPIOLIB
 511         select CPU_PJ4
 512         select GENERIC_CLOCKEVENTS
 513         select MIGHT_HAVE_PCI
 514         select MVEBU_MBUS
 515         select PINCTRL
 516         select PINCTRL_DOVE
 517         select PLAT_ORION_LEGACY
 518         help
 519           Support for the Marvell Dove SoC 88AP510
 520
 521 config ARCH_KIRKWOOD
 522         bool "Marvell Kirkwood"
 523         select ARCH_REQUIRE_GPIOLIB
 524         select CPU_FEROCEON
 525         select GENERIC_CLOCKEVENTS
 526         select MVEBU_MBUS
 527         select PCI
 528         select PCI_QUIRKS
 529         select PINCTRL
 530         select PINCTRL_KIRKWOOD
 531         select PLAT_ORION_LEGACY
 532         help
 533           Support for the following Marvell Kirkwood series SoCs:
 534           88F6180, 88F6192 and 88F6281.
 535
 536 config ARCH_MV78XX0
 537         bool "Marvell MV78xx0"
 538         select ARCH_REQUIRE_GPIOLIB
 539         select CPU_FEROCEON
 540         select GENERIC_CLOCKEVENTS
 541         select MVEBU_MBUS
 542         select PCI
 543         select PLAT_ORION_LEGACY
 544         help
 545           Support for the following Marvell MV78xx0 series SoCs:
 546           MV781x0, MV782x0.
 547
 548 config ARCH_ORION5X
 549         bool "Marvell Orion"
 550         depends on MMU
 551         select ARCH_REQUIRE_GPIOLIB
 552         select CPU_FEROCEON
 553         select GENERIC_CLOCKEVENTS
 554         select MVEBU_MBUS
 555         select PCI
 556         select PLAT_ORION_LEGACY
 557         help
 558           Support for the following Marvell Orion 5x series SoCs:
 559           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 560           Orion-2 (5281), Orion-1-90 (6183).
 561
 562 config ARCH_MMP
 563         bool "Marvell PXA168/910/MMP2"
 564         depends on MMU
 565         select ARCH_REQUIRE_GPIOLIB
 566         select CLKDEV_LOOKUP
 567         select GENERIC_ALLOCATOR
 568         select GENERIC_CLOCKEVENTS
 569         select GPIO_PXA
 570         select IRQ_DOMAIN
 571         select MULTI_IRQ_HANDLER
 572         select PINCTRL
 573         select PLAT_PXA
 574         select SPARSE_IRQ
 575         help
 576           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 577
 578 config ARCH_KS8695
 579         bool "Micrel/Kendin KS8695"
 580         select ARCH_REQUIRE_GPIOLIB
 581         select CLKSRC_MMIO
 582         select CPU_ARM922T
 583         select GENERIC_CLOCKEVENTS
 584         select NEED_MACH_MEMORY_H
 585         help
 586           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 587           System-on-Chip devices.
 588
 589 config ARCH_W90X900
 590         bool "Nuvoton W90X900 CPU"
 591         select ARCH_REQUIRE_GPIOLIB
 592         select CLKDEV_LOOKUP
 593         select CLKSRC_MMIO
 594         select CPU_ARM926T
 595         select GENERIC_CLOCKEVENTS
 596         help
 597           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 598           At present, the w90x900 has been renamed nuc900, regarding
 599           the ARM series product line, you can login the following
 600           link address to know more.
 601
 602           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 603                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 604
 605 config ARCH_LPC32XX
 606         bool "NXP LPC32XX"
 607         select ARCH_REQUIRE_GPIOLIB
 608         select ARM_AMBA
 609         select CLKDEV_LOOKUP
 610         select CLKSRC_MMIO
 611         select CPU_ARM926T
 612         select GENERIC_CLOCKEVENTS
 613         select HAVE_IDE
 614         select USE_OF
 615         help
 616           Support for the NXP LPC32XX family of processors
 617
 618 config ARCH_PXA
 619         bool "PXA2xx/PXA3xx-based"
 620         depends on MMU
 621         select ARCH_MTD_XIP
 622         select ARCH_REQUIRE_GPIOLIB
 623         select ARM_CPU_SUSPEND if PM
 624         select AUTO_ZRELADDR
 625         select CLKDEV_LOOKUP
 626         select CLKSRC_MMIO
 627         select GENERIC_CLOCKEVENTS
 628         select GPIO_PXA
 629         select HAVE_IDE
 630         select MULTI_IRQ_HANDLER
 631         select PLAT_PXA
 632         select SPARSE_IRQ
 633         help
 634           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 635
 636 config ARCH_MSM
 637         bool "Qualcomm MSM (non-multiplatform)"
 638         select ARCH_REQUIRE_GPIOLIB
 639         select COMMON_CLK
 640         select GENERIC_CLOCKEVENTS
 641         help
 642           Support for Qualcomm MSM/QSD based systems.  This runs on the
 643           apps processor of the MSM/QSD and depends on a shared memory
 644           interface to the modem processor which runs the baseband
 645           stack and controls some vital subsystems
 646           (clock and power control, etc).
 647
 648 config ARCH_SHMOBILE_LEGACY
 649         bool "Renesas ARM SoCs (non-multiplatform)"
 650         select ARCH_SHMOBILE
 651         select ARM_PATCH_PHYS_VIRT
 652         select CLKDEV_LOOKUP
 653         select GENERIC_CLOCKEVENTS
 654         select HAVE_ARM_SCU if SMP
 655         select HAVE_ARM_TWD if SMP
 656         select HAVE_MACH_CLKDEV
 657         select HAVE_SMP
 658         select MIGHT_HAVE_CACHE_L2X0
 659         select MULTI_IRQ_HANDLER
 660         select NO_IOPORT_MAP
 661         select PINCTRL
 662         select PM_GENERIC_DOMAINS if PM
 663         select SPARSE_IRQ
 664         help
 665           Support for Renesas ARM SoC platforms using a non-multiplatform
 666           kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
 667           and RZ families.
 668
 669 config ARCH_RPC
 670         bool "RiscPC"
 671         select ARCH_ACORN
 672         select ARCH_MAY_HAVE_PC_FDC
 673         select ARCH_SPARSEMEM_ENABLE
 674         select ARCH_USES_GETTIMEOFFSET
 675         select CPU_SA110
 676         select FIQ
 677         select HAVE_IDE
 678         select HAVE_PATA_PLATFORM
 679         select ISA_DMA_API
 680         select NEED_MACH_IO_H
 681         select NEED_MACH_MEMORY_H
 682         select NO_IOPORT_MAP
 683         select VIRT_TO_BUS
 684         help
 685           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 686           CD-ROM interface, serial and parallel port, and the floppy drive.
 687
 688 config ARCH_SA1100
 689         bool "SA1100-based"
 690         select ARCH_MTD_XIP
 691         select ARCH_REQUIRE_GPIOLIB
 692         select ARCH_SPARSEMEM_ENABLE
 693         select CLKDEV_LOOKUP
 694         select CLKSRC_MMIO
 695         select CPU_FREQ
 696         select CPU_SA1100
 697         select GENERIC_CLOCKEVENTS
 698         select HAVE_IDE
 699         select ISA
 700         select NEED_MACH_MEMORY_H
 701         select SPARSE_IRQ
 702         help
 703           Support for StrongARM 11x0 based boards.
 704
 705 config ARCH_S3C24XX
 706         bool "Samsung S3C24XX SoCs"
 707         select ARCH_REQUIRE_GPIOLIB
 708         select ATAGS
 709         select CLKDEV_LOOKUP
 710         select CLKSRC_SAMSUNG_PWM
 711         select GENERIC_CLOCKEVENTS
 712         select GPIO_SAMSUNG
 713         select HAVE_S3C2410_I2C if I2C
 714         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 715         select HAVE_S3C_RTC if RTC_CLASS
 716         select MULTI_IRQ_HANDLER
 717         select NEED_MACH_IO_H
 718         select SAMSUNG_ATAGS
 719         help
 720           Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
 721           and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
 722           (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
 723           Samsung SMDK2410 development board (and derivatives).
 724
 725 config ARCH_S3C64XX
 726         bool "Samsung S3C64XX"
 727         select ARCH_REQUIRE_GPIOLIB
 728         select ARM_AMBA
 729         select ARM_VIC
 730         select ATAGS
 731         select CLKDEV_LOOKUP
 732         select CLKSRC_SAMSUNG_PWM
 733         select COMMON_CLK_SAMSUNG
 734         select CPU_V6K
 735         select GENERIC_CLOCKEVENTS
 736         select GPIO_SAMSUNG
 737         select HAVE_S3C2410_I2C if I2C
 738         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 739         select HAVE_TCM
 740         select NO_IOPORT_MAP
 741         select PLAT_SAMSUNG
 742         select PM_GENERIC_DOMAINS if PM
 743         select S3C_DEV_NAND
 744         select S3C_GPIO_TRACK
 745         select SAMSUNG_ATAGS
 746         select SAMSUNG_WAKEMASK
 747         select SAMSUNG_WDT_RESET
 748         help
 749           Samsung S3C64XX series based systems
 750
 751 config ARCH_S5PV210
 752         bool "Samsung S5PV210/S5PC110"
 753         select ARCH_HAS_HOLES_MEMORYMODEL
 754         select ARCH_SPARSEMEM_ENABLE
 755         select ATAGS
 756         select CLKDEV_LOOKUP
 757         select CLKSRC_SAMSUNG_PWM
 758         select CPU_V7
 759         select GENERIC_CLOCKEVENTS
 760         select GPIO_SAMSUNG
 761         select HAVE_S3C2410_I2C if I2C
 762         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 763         select HAVE_S3C_RTC if RTC_CLASS
 764         select NEED_MACH_MEMORY_H
 765         select SAMSUNG_ATAGS
 766         help
 767           Samsung S5PV210/S5PC110 series based systems
 768
 769 config ARCH_DAVINCI
 770         bool "TI DaVinci"
 771         select ARCH_HAS_HOLES_MEMORYMODEL
 772         select ARCH_REQUIRE_GPIOLIB
 773         select CLKDEV_LOOKUP
 774         select GENERIC_ALLOCATOR
 775         select GENERIC_CLOCKEVENTS
 776         select GENERIC_IRQ_CHIP
 777         select HAVE_IDE
 778         select TI_PRIV_EDMA
 779         select USE_OF
 780         select ZONE_DMA
 781         help
 782           Support for TI's DaVinci platform.
 783
 784 config ARCH_OMAP1
 785         bool "TI OMAP1"
 786         depends on MMU
 787         select ARCH_HAS_HOLES_MEMORYMODEL
 788         select ARCH_OMAP
 789         select ARCH_REQUIRE_GPIOLIB
 790         select CLKDEV_LOOKUP
 791         select CLKSRC_MMIO
 792         select GENERIC_CLOCKEVENTS
 793         select GENERIC_IRQ_CHIP
 794         select HAVE_IDE
 795         select IRQ_DOMAIN
 796         select NEED_MACH_IO_H if PCCARD
 797         select NEED_MACH_MEMORY_H
 798         help
 799           Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
 800
 801 endchoice
 802
 803 menu "Multiple platform selection"
 804         depends on ARCH_MULTIPLATFORM
 805
 806 comment "CPU Core family selection"
 807
 808 config ARCH_MULTI_V4
 809         bool "ARMv4 based platforms (FA526)"
 810         depends on !ARCH_MULTI_V6_V7
 811         select ARCH_MULTI_V4_V5
 812         select CPU_FA526
 813
 814 config ARCH_MULTI_V4T
 815         bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
 816         depends on !ARCH_MULTI_V6_V7
 817         select ARCH_MULTI_V4_V5
 818         select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
 819                 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
 820                 CPU_ARM925T || CPU_ARM940T)
 821
 822 config ARCH_MULTI_V5
 823         bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
 824         depends on !ARCH_MULTI_V6_V7
 825         select ARCH_MULTI_V4_V5
 826         select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
 827                 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
 828                 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
 829
 830 config ARCH_MULTI_V4_V5
 831         bool
 832
 833 config ARCH_MULTI_V6
 834         bool "ARMv6 based platforms (ARM11)"
 835         select ARCH_MULTI_V6_V7
 836         select CPU_V6K
 837
 838 config ARCH_MULTI_V7
 839         bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
 840         default y
 841         select ARCH_MULTI_V6_V7
 842         select CPU_V7
 843         select HAVE_SMP
 844
 845 config ARCH_MULTI_V6_V7
 846         bool
 847         select MIGHT_HAVE_CACHE_L2X0
 848
 849 config ARCH_MULTI_CPU_AUTO
 850         def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
 851         select ARCH_MULTI_V5
 852
 853 endmenu
 854
 855 config ARCH_VIRT
 856         bool "Dummy Virtual Machine" if ARCH_MULTI_V7
 857         select ARM_AMBA
 858         select ARM_GIC
 859         select ARM_PSCI
 860         select HAVE_ARM_ARCH_TIMER
 861
 862 #
 863 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 864 # Kconfigs may be included either alphabetically (according to the
 865 # plat- suffix) or along side the corresponding mach-* source.
 866 #
 867 source "arch/arm/mach-mvebu/Kconfig"
 868
 869 source "arch/arm/mach-at91/Kconfig"
 870
 871 source "arch/arm/mach-axxia/Kconfig"
 872
 873 source "arch/arm/mach-bcm/Kconfig"
 874
 875 source "arch/arm/mach-berlin/Kconfig"
 876
 877 source "arch/arm/mach-clps711x/Kconfig"
 878
 879 source "arch/arm/mach-cns3xxx/Kconfig"
 880
 881 source "arch/arm/mach-davinci/Kconfig"
 882
 883 source "arch/arm/mach-dove/Kconfig"
 884
 885 source "arch/arm/mach-ep93xx/Kconfig"
 886
 887 source "arch/arm/mach-footbridge/Kconfig"
 888
 889 source "arch/arm/mach-gemini/Kconfig"
 890
 891 source "arch/arm/mach-highbank/Kconfig"
 892
 893 source "arch/arm/mach-hisi/Kconfig"
 894
 895 source "arch/arm/mach-integrator/Kconfig"
 896
 897 source "arch/arm/mach-iop32x/Kconfig"
 898
 899 source "arch/arm/mach-iop33x/Kconfig"
 900
 901 source "arch/arm/mach-iop13xx/Kconfig"
 902
 903 source "arch/arm/mach-ixp4xx/Kconfig"
 904
 905 source "arch/arm/mach-keystone/Kconfig"
 906
 907 source "arch/arm/mach-kirkwood/Kconfig"
 908
 909 source "arch/arm/mach-ks8695/Kconfig"
 910
 911 source "arch/arm/mach-msm/Kconfig"
 912
 913 source "arch/arm/mach-moxart/Kconfig"
 914
 915 source "arch/arm/mach-mv78xx0/Kconfig"
 916
 917 source "arch/arm/mach-imx/Kconfig"
 918
 919 source "arch/arm/mach-mxs/Kconfig"
 920
 921 source "arch/arm/mach-netx/Kconfig"
 922
 923 source "arch/arm/mach-nomadik/Kconfig"
 924
 925 source "arch/arm/mach-nspire/Kconfig"
 926
 927 source "arch/arm/plat-omap/Kconfig"
 928
 929 source "arch/arm/mach-omap1/Kconfig"
 930
 931 source "arch/arm/mach-omap2/Kconfig"
 932
 933 source "arch/arm/mach-orion5x/Kconfig"
 934
 935 source "arch/arm/mach-picoxcell/Kconfig"
 936
 937 source "arch/arm/mach-pxa/Kconfig"
 938 source "arch/arm/plat-pxa/Kconfig"
 939
 940 source "arch/arm/mach-mmp/Kconfig"
 941
 942 source "arch/arm/mach-qcom/Kconfig"
 943
 944 source "arch/arm/mach-realview/Kconfig"
 945
 946 source "arch/arm/mach-rockchip/Kconfig"
 947
 948 source "arch/arm/mach-sa1100/Kconfig"
 949
 950 source "arch/arm/mach-socfpga/Kconfig"
 951
 952 source "arch/arm/mach-spear/Kconfig"
 953
 954 source "arch/arm/mach-sti/Kconfig"
 955
 956 source "arch/arm/mach-s3c24xx/Kconfig"
 957
 958 source "arch/arm/mach-s3c64xx/Kconfig"
 959
 960 source "arch/arm/mach-s5pv210/Kconfig"
 961
 962 source "arch/arm/mach-exynos/Kconfig"
 963 source "arch/arm/plat-samsung/Kconfig"
 964
 965 source "arch/arm/mach-shmobile/Kconfig"
 966
 967 source "arch/arm/mach-sunxi/Kconfig"
 968
 969 source "arch/arm/mach-prima2/Kconfig"
 970
 971 source "arch/arm/mach-tegra/Kconfig"
 972
 973 source "arch/arm/mach-u300/Kconfig"
 974
 975 source "arch/arm/mach-ux500/Kconfig"
 976
 977 source "arch/arm/mach-versatile/Kconfig"
 978
 979 source "arch/arm/mach-vexpress/Kconfig"
 980 source "arch/arm/plat-versatile/Kconfig"
 981
 982 source "arch/arm/mach-vt8500/Kconfig"
 983
 984 source "arch/arm/mach-w90x900/Kconfig"
 985
 986 source "arch/arm/mach-zynq/Kconfig"
 987
 988 # Definitions to make life easier
 989 config ARCH_ACORN
 990         bool
 991
 992 config PLAT_IOP
 993         bool
 994         select GENERIC_CLOCKEVENTS
 995
 996 config PLAT_ORION
 997         bool
 998         select CLKSRC_MMIO
 999         select COMMON_CLK
1000         select GENERIC_IRQ_CHIP
1001         select IRQ_DOMAIN
1002
1003 config PLAT_ORION_LEGACY
1004         bool
1005         select PLAT_ORION
1006
1007 config PLAT_PXA
1008         bool
1009
1010 config PLAT_VERSATILE
1011         bool
1012
1013 config ARM_TIMER_SP804
1014         bool
1015         select CLKSRC_MMIO
1016         select CLKSRC_OF if OF
1017
1018 source "arch/arm/firmware/Kconfig"
1019
1020 source arch/arm/mm/Kconfig
1021
1022 config IWMMXT
1023         bool "Enable iWMMXt support"
1024         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
1025         default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
1026         help
1027           Enable support for iWMMXt context switching at run time if
1028           running on a CPU that supports it.
1029
1030 config MULTI_IRQ_HANDLER
1031         bool
1032         help
1033           Allow each machine to specify it's own IRQ handler at run time.
1034
1035 if !MMU
1036 source "arch/arm/Kconfig-nommu"
1037 endif
1038
1039 config PJ4B_ERRATA_4742
1040         bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
1041         depends on CPU_PJ4B && MACH_ARMADA_370
1042         default y
1043         help
1044           When coming out of either a Wait for Interrupt (WFI) or a Wait for
1045           Event (WFE) IDLE states, a specific timing sensitivity exists between
1046           the retiring WFI/WFE instructions and the newly issued subsequent
1047           instructions.  This sensitivity can result in a CPU hang scenario.
1048           Workaround:
1049           The software must insert either a Data Synchronization Barrier (DSB)
1050           or Data Memory Barrier (DMB) command immediately after the WFI/WFE
1051           instruction
1052
1053 config ARM_ERRATA_326103
1054         bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1055         depends on CPU_V6
1056         help
1057           Executing a SWP instruction to read-only memory does not set bit 11
1058           of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1059           treat the access as a read, preventing a COW from occurring and
1060           causing the faulting task to livelock.
1061
1062 config ARM_ERRATA_411920
1063         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1064         depends on CPU_V6 || CPU_V6K
1065         help
1066           Invalidation of the Instruction Cache operation can
1067           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1068           It does not affect the MPCore. This option enables the ARM Ltd.
1069           recommended workaround.
1070
1071 config ARM_ERRATA_430973
1072         bool "ARM errata: Stale prediction on replaced interworking branch"
1073         depends on CPU_V7
1074         help
1075           This option enables the workaround for the 430973 Cortex-A8
1076           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1077           interworking branch is replaced with another code sequence at the
1078           same virtual address, whether due to self-modifying code or virtual
1079           to physical address re-mapping, Cortex-A8 does not recover from the
1080           stale interworking branch prediction. This results in Cortex-A8
1081           executing the new code sequence in the incorrect ARM or Thumb state.
1082           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1083           and also flushes the branch target cache at every context switch.
1084           Note that setting specific bits in the ACTLR register may not be
1085           available in non-secure mode.
1086
1087 config ARM_ERRATA_458693
1088         bool "ARM errata: Processor deadlock when a false hazard is created"
1089         depends on CPU_V7
1090         depends on !ARCH_MULTIPLATFORM
1091         help
1092           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1093           erratum. For very specific sequences of memory operations, it is
1094           possible for a hazard condition intended for a cache line to instead
1095           be incorrectly associated with a different cache line. This false
1096           hazard might then cause a processor deadlock. The workaround enables
1097           the L1 caching of the NEON accesses and disables the PLD instruction
1098           in the ACTLR register. Note that setting specific bits in the ACTLR
1099           register may not be available in non-secure mode.
1100
1101 config ARM_ERRATA_460075
1102         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1103         depends on CPU_V7
1104         depends on !ARCH_MULTIPLATFORM
1105         help
1106           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1107           erratum. Any asynchronous access to the L2 cache may encounter a
1108           situation in which recent store transactions to the L2 cache are lost
1109           and overwritten with stale memory contents from external memory. The
1110           workaround disables the write-allocate mode for the L2 cache via the
1111           ACTLR register. Note that setting specific bits in the ACTLR register
1112           may not be available in non-secure mode.
1113
1114 config ARM_ERRATA_742230
1115         bool "ARM errata: DMB operation may be faulty"
1116         depends on CPU_V7 && SMP
1117         depends on !ARCH_MULTIPLATFORM
1118         help
1119           This option enables the workaround for the 742230 Cortex-A9
1120           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1121           between two write operations may not ensure the correct visibility
1122           ordering of the two writes. This workaround sets a specific bit in
1123           the diagnostic register of the Cortex-A9 which causes the DMB
1124           instruction to behave as a DSB, ensuring the correct behaviour of
1125           the two writes.
1126
1127 config ARM_ERRATA_742231
1128         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1129         depends on CPU_V7 && SMP
1130         depends on !ARCH_MULTIPLATFORM
1131         help
1132           This option enables the workaround for the 742231 Cortex-A9
1133           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1134           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1135           accessing some data located in the same cache line, may get corrupted
1136           data due to bad handling of the address hazard when the line gets
1137           replaced from one of the CPUs at the same time as another CPU is
1138           accessing it. This workaround sets specific bits in the diagnostic
1139           register of the Cortex-A9 which reduces the linefill issuing
1140           capabilities of the processor.
1141
1142 config ARM_ERRATA_643719
1143         bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1144         depends on CPU_V7 && SMP
1145         help
1146           This option enables the workaround for the 643719 Cortex-A9 (prior to
1147           r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1148           register returns zero when it should return one. The workaround
1149           corrects this value, ensuring cache maintenance operations which use
1150           it behave as intended and avoiding data corruption.
1151
1152 config ARM_ERRATA_720789
1153         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1154         depends on CPU_V7
1155         help
1156           This option enables the workaround for the 720789 Cortex-A9 (prior to
1157           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1158           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1159           As a consequence of this erratum, some TLB entries which should be
1160           invalidated are not, resulting in an incoherency in the system page
1161           tables. The workaround changes the TLB flushing routines to invalidate
1162           entries regardless of the ASID.
1163
1164 config ARM_ERRATA_743622
1165         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1166         depends on CPU_V7
1167         depends on !ARCH_MULTIPLATFORM
1168         help
1169           This option enables the workaround for the 743622 Cortex-A9
1170           (r2p*) erratum. Under very rare conditions, a faulty
1171           optimisation in the Cortex-A9 Store Buffer may lead to data
1172           corruption. This workaround sets a specific bit in the diagnostic
1173           register of the Cortex-A9 which disables the Store Buffer
1174           optimisation, preventing the defect from occurring. This has no
1175           visible impact on the overall performance or power consumption of the
1176           processor.
1177
1178 config ARM_ERRATA_751472
1179         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1180         depends on CPU_V7
1181         depends on !ARCH_MULTIPLATFORM
1182         help
1183           This option enables the workaround for the 751472 Cortex-A9 (prior
1184           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1185           completion of a following broadcasted operation if the second
1186           operation is received by a CPU before the ICIALLUIS has completed,
1187           potentially leading to corrupted entries in the cache or TLB.
1188
1189 config ARM_ERRATA_754322
1190         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1191         depends on CPU_V7
1192         help
1193           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1194           r3p*) erratum. A speculative memory access may cause a page table walk
1195           which starts prior to an ASID switch but completes afterwards. This
1196           can populate the micro-TLB with a stale entry which may be hit with
1197           the new ASID. This workaround places two dsb instructions in the mm
1198           switching code so that no page table walks can cross the ASID switch.
1199
1200 config ARM_ERRATA_754327
1201         bool "ARM errata: no automatic Store Buffer drain"
1202         depends on CPU_V7 && SMP
1203         help
1204           This option enables the workaround for the 754327 Cortex-A9 (prior to
1205           r2p0) erratum. The Store Buffer does not have any automatic draining
1206           mechanism and therefore a livelock may occur if an external agent
1207           continuously polls a memory location waiting to observe an update.
1208           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1209           written polling loops from denying visibility of updates to memory.
1210
1211 config ARM_ERRATA_364296
1212         bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1213         depends on CPU_V6
1214         help
1215           This options enables the workaround for the 364296 ARM1136
1216           r0p2 erratum (possible cache data corruption with
1217           hit-under-miss enabled). It sets the undocumented bit 31 in
1218           the auxiliary control register and the FI bit in the control
1219           register, thus disabling hit-under-miss without putting the
1220           processor into full low interrupt latency mode. ARM11MPCore
1221           is not affected.
1222
1223 config ARM_ERRATA_764369
1224         bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1225         depends on CPU_V7 && SMP
1226         help
1227           This option enables the workaround for erratum 764369
1228           affecting Cortex-A9 MPCore with two or more processors (all
1229           current revisions). Under certain timing circumstances, a data
1230           cache line maintenance operation by MVA targeting an Inner
1231           Shareable memory region may fail to proceed up to either the
1232           Point of Coherency or to the Point of Unification of the
1233           system. This workaround adds a DSB instruction before the
1234           relevant cache maintenance functions and sets a specific bit
1235           in the diagnostic control register of the SCU.
1236
1237 config ARM_ERRATA_775420
1238        bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1239        depends on CPU_V7
1240        help
1241          This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1242          r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1243          operation aborts with MMU exception, it might cause the processor
1244          to deadlock. This workaround puts DSB before executing ISB if
1245          an abort may occur on cache maintenance.
1246
1247 config ARM_ERRATA_798181
1248         bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1249         depends on CPU_V7 && SMP
1250         help
1251           On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1252           adequately shooting down all use of the old entries. This
1253           option enables the Linux kernel workaround for this erratum
1254           which sends an IPI to the CPUs that are running the same ASID
1255           as the one being invalidated.
1256
1257 config ARM_ERRATA_773022
1258         bool "ARM errata: incorrect instructions may be executed from loop buffer"
1259         depends on CPU_V7
1260         help
1261           This option enables the workaround for the 773022 Cortex-A15
1262           (up to r0p4) erratum. In certain rare sequences of code, the
1263           loop buffer may deliver incorrect instructions. This
1264           workaround disables the loop buffer to avoid the erratum.
1265
1266 endmenu
1267
1268 source "arch/arm/common/Kconfig"
1269
1270 menu "Bus support"
1271
1272 config ARM_AMBA
1273         bool
1274
1275 config ISA
1276         bool
1277         help
1278           Find out whether you have ISA slots on your motherboard.  ISA is the
1279           name of a bus system, i.e. the way the CPU talks to the other stuff
1280           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1281           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1282           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1283
1284 # Select ISA DMA controller support
1285 config ISA_DMA
1286         bool
1287         select ISA_DMA_API
1288
1289 # Select ISA DMA interface
1290 config ISA_DMA_API
1291         bool
1292
1293 config PCI
1294         bool "PCI support" if MIGHT_HAVE_PCI
1295         help
1296           Find out whether you have a PCI motherboard. PCI is the name of a
1297           bus system, i.e. the way the CPU talks to the other stuff inside
1298           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1299           VESA. If you have PCI, say Y, otherwise N.
1300
1301 config PCI_DOMAINS
1302         bool
1303         depends on PCI
1304
1305 config PCI_NANOENGINE
1306         bool "BSE nanoEngine PCI support"
1307         depends on SA1100_NANOENGINE
1308         help
1309           Enable PCI on the BSE nanoEngine board.
1310
1311 config PCI_SYSCALL
1312         def_bool PCI
1313
1314 config PCI_HOST_ITE8152
1315         bool
1316         depends on PCI && MACH_ARMCORE
1317         default y
1318         select DMABOUNCE
1319
1320 source "drivers/pci/Kconfig"
1321 source "drivers/pci/pcie/Kconfig"
1322
1323 source "drivers/pcmcia/Kconfig"
1324
1325 endmenu
1326
1327 menu "Kernel Features"
1328
1329 config HAVE_SMP
1330         bool
1331         help
1332           This option should be selected by machines which have an SMP-
1333           capable CPU.
1334
1335           The only effect of this option is to make the SMP-related
1336           options available to the user for configuration.
1337
1338 config SMP
1339         bool "Symmetric Multi-Processing"
1340         depends on CPU_V6K || CPU_V7
1341         depends on GENERIC_CLOCKEVENTS
1342         depends on HAVE_SMP
1343         depends on MMU || ARM_MPU
1344         help
1345           This enables support for systems with more than one CPU. If you have
1346           a system with only one CPU, say N. If you have a system with more
1347           than one CPU, say Y.
1348
1349           If you say N here, the kernel will run on uni- and multiprocessor
1350           machines, but will use only one CPU of a multiprocessor machine. If
1351           you say Y here, the kernel will run on many, but not all,
1352           uniprocessor machines. On a uniprocessor machine, the kernel
1353           will run faster if you say N here.
1354
1355           See also <file:Documentation/x86/i386/IO-APIC.txt>,
1356           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1357           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1358
1359           If you don't know what to do here, say N.
1360
1361 config SMP_ON_UP
1362         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1363         depends on SMP && !XIP_KERNEL && MMU
1364         default y
1365         help
1366           SMP kernels contain instructions which fail on non-SMP processors.
1367           Enabling this option allows the kernel to modify itself to make
1368           these instructions safe.  Disabling it allows about 1K of space
1369           savings.
1370
1371           If you don't know what to do here, say Y.
1372
1373 config ARM_CPU_TOPOLOGY
1374         bool "Support cpu topology definition"
1375         depends on SMP && CPU_V7
1376         default y
1377         help
1378           Support ARM cpu topology definition. The MPIDR register defines
1379           affinity between processors which is then used to describe the cpu
1380           topology of an ARM System.
1381
1382 config SCHED_MC
1383         bool "Multi-core scheduler support"
1384         depends on ARM_CPU_TOPOLOGY
1385         help
1386           Multi-core scheduler support improves the CPU scheduler's decision
1387           making when dealing with multi-core CPU chips at a cost of slightly
1388           increased overhead in some places. If unsure say N here.
1389
1390 config SCHED_SMT
1391         bool "SMT scheduler support"
1392         depends on ARM_CPU_TOPOLOGY
1393         help
1394           Improves the CPU scheduler's decision making when dealing with
1395           MultiThreading at a cost of slightly increased overhead in some
1396           places. If unsure say N here.
1397
1398 config HAVE_ARM_SCU
1399         bool
1400         help
1401           This option enables support for the ARM system coherency unit
1402
1403 config HAVE_ARM_ARCH_TIMER
1404         bool "Architected timer support"
1405         depends on CPU_V7
1406         select ARM_ARCH_TIMER
1407         select GENERIC_CLOCKEVENTS
1408         help
1409           This option enables support for the ARM architected timer
1410
1411 config HAVE_ARM_TWD
1412         bool
1413         depends on SMP
1414         select CLKSRC_OF if OF
1415         help
1416           This options enables support for the ARM timer and watchdog unit
1417
1418 config MCPM
1419         bool "Multi-Cluster Power Management"
1420         depends on CPU_V7 && SMP
1421         help
1422           This option provides the common power management infrastructure
1423           for (multi-)cluster based systems, such as big.LITTLE based
1424           systems.
1425
1426 config BIG_LITTLE
1427         bool "big.LITTLE support (Experimental)"
1428         depends on CPU_V7 && SMP
1429         select MCPM
1430         help
1431           This option enables support selections for the big.LITTLE
1432           system architecture.
1433
1434 config BL_SWITCHER
1435         bool "big.LITTLE switcher support"
1436         depends on BIG_LITTLE && MCPM && HOTPLUG_CPU
1437         select ARM_CPU_SUSPEND
1438         select CPU_PM
1439         help
1440           The big.LITTLE "switcher" provides the core functionality to
1441           transparently handle transition between a cluster of A15's
1442           and a cluster of A7's in a big.LITTLE system.
1443
1444 config BL_SWITCHER_DUMMY_IF
1445         tristate "Simple big.LITTLE switcher user interface"
1446         depends on BL_SWITCHER && DEBUG_KERNEL
1447         help
1448           This is a simple and dummy char dev interface to control
1449           the big.LITTLE switcher core code.  It is meant for
1450           debugging purposes only.
1451
1452 choice
1453         prompt "Memory split"
1454         depends on MMU
1455         default VMSPLIT_3G
1456         help
1457           Select the desired split between kernel and user memory.
1458
1459           If you are not absolutely sure what you are doing, leave this
1460           option alone!
1461
1462         config VMSPLIT_3G
1463                 bool "3G/1G user/kernel split"
1464         config VMSPLIT_2G
1465                 bool "2G/2G user/kernel split"
1466         config VMSPLIT_1G
1467                 bool "1G/3G user/kernel split"
1468 endchoice
1469
1470 config PAGE_OFFSET
1471         hex
1472         default PHYS_OFFSET if !MMU
1473         default 0x40000000 if VMSPLIT_1G
1474         default 0x80000000 if VMSPLIT_2G
1475         default 0xC0000000
1476
1477 config NR_CPUS
1478         int "Maximum number of CPUs (2-32)"
1479         range 2 32
1480         depends on SMP
1481         default "4"
1482
1483 config HOTPLUG_CPU
1484         bool "Support for hot-pluggable CPUs"
1485         depends on SMP
1486         help
1487           Say Y here to experiment with turning CPUs off and on.  CPUs
1488           can be controlled through /sys/devices/system/cpu.
1489
1490 config ARM_PSCI
1491         bool "Support for the ARM Power State Coordination Interface (PSCI)"
1492         depends on CPU_V7
1493         help
1494           Say Y here if you want Linux to communicate with system firmware
1495           implementing the PSCI specification for CPU-centric power
1496           management operations described in ARM document number ARM DEN
1497           0022A ("Power State Coordination Interface System Software on
1498           ARM processors").
1499
1500 # The GPIO number here must be sorted by descending number. In case of
1501 # a multiplatform kernel, we just want the highest value required by the
1502 # selected platforms.
1503 config ARCH_NR_GPIO
1504         int
1505         default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1506         default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX
1507         default 416 if ARCH_SUNXI
1508         default 392 if ARCH_U8500
1509         default 352 if ARCH_VT8500
1510         default 264 if MACH_H4700
1511         default 0
1512         help
1513           Maximum number of GPIOs in the system.
1514
1515           If unsure, leave the default value.
1516
1517 source kernel/Kconfig.preempt
1518
1519 config HZ_FIXED
1520         int
1521         default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
1522                 ARCH_S5PV210 || ARCH_EXYNOS4
1523         default AT91_TIMER_HZ if ARCH_AT91
1524         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
1525         default 0
1526
1527 choice
1528         depends on HZ_FIXED = 0
1529         prompt "Timer frequency"
1530
1531 config HZ_100
1532         bool "100 Hz"
1533
1534 config HZ_200
1535         bool "200 Hz"
1536
1537 config HZ_250
1538         bool "250 Hz"
1539
1540 config HZ_300
1541         bool "300 Hz"
1542
1543 config HZ_500
1544         bool "500 Hz"
1545
1546 config HZ_1000
1547         bool "1000 Hz"
1548
1549 endchoice
1550
1551 config HZ
1552         int
1553         default HZ_FIXED if HZ_FIXED != 0
1554         default 100 if HZ_100
1555         default 200 if HZ_200
1556         default 250 if HZ_250
1557         default 300 if HZ_300
1558         default 500 if HZ_500
1559         default 1000
1560
1561 config SCHED_HRTICK
1562         def_bool HIGH_RES_TIMERS
1563
1564 config THUMB2_KERNEL
1565         bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
1566         depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
1567         default y if CPU_THUMBONLY
1568         select AEABI
1569         select ARM_ASM_UNIFIED
1570         select ARM_UNWIND
1571         help
1572           By enabling this option, the kernel will be compiled in
1573           Thumb-2 mode. A compiler/assembler that understand the unified
1574           ARM-Thumb syntax is needed.
1575
1576           If unsure, say N.
1577
1578 config THUMB2_AVOID_R_ARM_THM_JUMP11
1579         bool "Work around buggy Thumb-2 short branch relocations in gas"
1580         depends on THUMB2_KERNEL && MODULES
1581         default y
1582         help
1583           Various binutils versions can resolve Thumb-2 branches to
1584           locally-defined, preemptible global symbols as short-range "b.n"
1585           branch instructions.
1586
1587           This is a problem, because there's no guarantee the final
1588           destination of the symbol, or any candidate locations for a
1589           trampoline, are within range of the branch.  For this reason, the
1590           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1591           relocation in modules at all, and it makes little sense to add
1592           support.
1593
1594           The symptom is that the kernel fails with an "unsupported
1595           relocation" error when loading some modules.
1596
1597           Until fixed tools are available, passing
1598           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1599           code which hits this problem, at the cost of a bit of extra runtime
1600           stack usage in some cases.
1601
1602           The problem is described in more detail at:
1603               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1604
1605           Only Thumb-2 kernels are affected.
1606
1607           Unless you are sure your tools don't have this problem, say Y.
1608
1609 config ARM_ASM_UNIFIED
1610         bool
1611
1612 config AEABI
1613         bool "Use the ARM EABI to compile the kernel"
1614         help
1615           This option allows for the kernel to be compiled using the latest
1616           ARM ABI (aka EABI).  This is only useful if you are using a user
1617           space environment that is also compiled with EABI.
1618
1619           Since there are major incompatibilities between the legacy ABI and
1620           EABI, especially with regard to structure member alignment, this
1621           option also changes the kernel syscall calling convention to
1622           disambiguate both ABIs and allow for backward compatibility support
1623           (selected with CONFIG_OABI_COMPAT).
1624
1625           To use this you need GCC version 4.0.0 or later.
1626
1627 config OABI_COMPAT
1628         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1629         depends on AEABI && !THUMB2_KERNEL
1630         help
1631           This option preserves the old syscall interface along with the
1632           new (ARM EABI) one. It also provides a compatibility layer to
1633           intercept syscalls that have structure arguments which layout
1634           in memory differs between the legacy ABI and the new ARM EABI
1635           (only for non "thumb" binaries). This option adds a tiny
1636           overhead to all syscalls and produces a slightly larger kernel.
1637
1638           The seccomp filter system will not be available when this is
1639           selected, since there is no way yet to sensibly distinguish
1640           between calling conventions during filtering.
1641
1642           If you know you'll be using only pure EABI user space then you
1643           can say N here. If this option is not selected and you attempt
1644           to execute a legacy ABI binary then the result will be
1645           UNPREDICTABLE (in fact it can be predicted that it won't work
1646           at all). If in doubt say N.
1647
1648 config ARCH_HAS_HOLES_MEMORYMODEL
1649         bool
1650
1651 config ARCH_SPARSEMEM_ENABLE
1652         bool
1653
1654 config ARCH_SPARSEMEM_DEFAULT
1655         def_bool ARCH_SPARSEMEM_ENABLE
1656
1657 config ARCH_SELECT_MEMORY_MODEL
1658         def_bool ARCH_SPARSEMEM_ENABLE
1659
1660 config HAVE_ARCH_PFN_VALID
1661         def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1662
1663 config HIGHMEM
1664         bool "High Memory Support"
1665         depends on MMU
1666         help
1667           The address space of ARM processors is only 4 Gigabytes large
1668           and it has to accommodate user address space, kernel address
1669           space as well as some memory mapped IO. That means that, if you
1670           have a large amount of physical memory and/or IO, not all of the
1671           memory can be "permanently mapped" by the kernel. The physical
1672           memory that is not permanently mapped is called "high memory".
1673
1674           Depending on the selected kernel/user memory split, minimum
1675           vmalloc space and actual amount of RAM, you may not need this
1676           option which should result in a slightly faster kernel.
1677
1678           If unsure, say n.
1679
1680 config HIGHPTE
1681         bool "Allocate 2nd-level pagetables from highmem"
1682         depends on HIGHMEM
1683
1684 config HW_PERF_EVENTS
1685         bool "Enable hardware performance counter support for perf events"
1686         depends on PERF_EVENTS
1687         default y
1688         help
1689           Enable hardware performance counter support for perf events. If
1690           disabled, perf events will use software events only.
1691
1692 config SYS_SUPPORTS_HUGETLBFS
1693        def_bool y
1694        depends on ARM_LPAE
1695
1696 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1697        def_bool y
1698        depends on ARM_LPAE
1699
1700 config ARCH_WANT_GENERAL_HUGETLB
1701         def_bool y
1702
1703 source "mm/Kconfig"
1704
1705 config FORCE_MAX_ZONEORDER
1706         int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
1707         range 11 64 if ARCH_SHMOBILE_LEGACY
1708         default "12" if SOC_AM33XX
1709         default "9" if SA1111 || ARCH_EFM32
1710         default "11"
1711         help
1712           The kernel memory allocator divides physically contiguous memory
1713           blocks into "zones", where each zone is a power of two number of
1714           pages.  This option selects the largest power of two that the kernel
1715           keeps in the memory allocator.  If you need to allocate very large
1716           blocks of physically contiguous memory, then you may need to
1717           increase this value.
1718
1719           This config option is actually maximum order plus one. For example,
1720           a value of 11 means that the largest free memory block is 2^10 pages.
1721
1722 config ALIGNMENT_TRAP
1723         bool
1724         depends on CPU_CP15_MMU
1725         default y if !ARCH_EBSA110
1726         select HAVE_PROC_CPU if PROC_FS
1727         help
1728           ARM processors cannot fetch/store information which is not
1729           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1730           address divisible by 4. On 32-bit ARM processors, these non-aligned
1731           fetch/store instructions will be emulated in software if you say
1732           here, which has a severe performance impact. This is necessary for
1733           correct operation of some network protocols. With an IP-only
1734           configuration it is safe to say N, otherwise say Y.
1735
1736 config UACCESS_WITH_MEMCPY
1737         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1738         depends on MMU
1739         default y if CPU_FEROCEON
1740         help
1741           Implement faster copy_to_user and clear_user methods for CPU
1742           cores where a 8-word STM instruction give significantly higher
1743           memory write throughput than a sequence of individual 32bit stores.
1744
1745           A possible side effect is a slight increase in scheduling latency
1746           between threads sharing the same address space if they invoke
1747           such copy operations with large buffers.
1748
1749           However, if the CPU data cache is using a write-allocate mode,
1750           this option is unlikely to provide any performance gain.
1751
1752 config SECCOMP
1753         bool
1754         prompt "Enable seccomp to safely compute untrusted bytecode"
1755         ---help---
1756           This kernel feature is useful for number crunching applications
1757           that may need to compute untrusted bytecode during their
1758           execution. By using pipes or other transports made available to
1759           the process as file descriptors supporting the read/write
1760           syscalls, it's possible to isolate those applications in
1761           their own address space using seccomp. Once seccomp is
1762           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1763           and the task is only allowed to execute a few safe syscalls
1764           defined by each seccomp mode.
1765
1766 config SWIOTLB
1767         def_bool y
1768
1769 config IOMMU_HELPER
1770         def_bool SWIOTLB
1771
1772 config XEN_DOM0
1773         def_bool y
1774         depends on XEN
1775
1776 config XEN
1777         bool "Xen guest support on ARM (EXPERIMENTAL)"
1778         depends on ARM && AEABI && OF
1779         depends on CPU_V7 && !CPU_V6
1780         depends on !GENERIC_ATOMIC64
1781         depends on MMU
1782         select ARCH_DMA_ADDR_T_64BIT
1783         select ARM_PSCI
1784         select SWIOTLB_XEN
1785         help
1786           Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1787
1788 endmenu
1789
1790 menu "Boot options"
1791
1792 config USE_OF
1793         bool "Flattened Device Tree support"
1794         select IRQ_DOMAIN
1795         select OF
1796         select OF_EARLY_FLATTREE
1797         select OF_RESERVED_MEM
1798         help
1799           Include support for flattened device tree machine descriptions.
1800
1801 config ATAGS
1802         bool "Support for the traditional ATAGS boot data passing" if USE_OF
1803         default y
1804         help
1805           This is the traditional way of passing data to the kernel at boot
1806           time. If you are solely relying on the flattened device tree (or
1807           the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1808           to remove ATAGS support from your kernel binary.  If unsure,
1809           leave this to y.
1810
1811 config DEPRECATED_PARAM_STRUCT
1812         bool "Provide old way to pass kernel parameters"
1813         depends on ATAGS
1814         help
1815           This was deprecated in 2001 and announced to live on for 5 years.
1816           Some old boot loaders still use this way.
1817
1818 # Compressed boot loader in ROM.  Yes, we really want to ask about
1819 # TEXT and BSS so we preserve their values in the config files.
1820 config ZBOOT_ROM_TEXT
1821         hex "Compressed ROM boot loader base address"
1822         default "0"
1823         help
1824           The physical address at which the ROM-able zImage is to be
1825           placed in the target.  Platforms which normally make use of
1826           ROM-able zImage formats normally set this to a suitable
1827           value in their defconfig file.
1828
1829           If ZBOOT_ROM is not enabled, this has no effect.
1830
1831 config ZBOOT_ROM_BSS
1832         hex "Compressed ROM boot loader BSS address"
1833         default "0"
1834         help
1835           The base address of an area of read/write memory in the target
1836           for the ROM-able zImage which must be available while the
1837           decompressor is running. It must be large enough to hold the
1838           entire decompressed kernel plus an additional 128 KiB.
1839           Platforms which normally make use of ROM-able zImage formats
1840           normally set this to a suitable value in their defconfig file.
1841
1842           If ZBOOT_ROM is not enabled, this has no effect.
1843
1844 config ZBOOT_ROM
1845         bool "Compressed boot loader in ROM/flash"
1846         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1847         depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
1848         help
1849           Say Y here if you intend to execute your compressed kernel image
1850           (zImage) directly from ROM or flash.  If unsure, say N.
1851
1852 choice
1853         prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1854         depends on ZBOOT_ROM && ARCH_SH7372
1855         default ZBOOT_ROM_NONE
1856         help
1857           Include experimental SD/MMC loading code in the ROM-able zImage.
1858           With this enabled it is possible to write the ROM-able zImage
1859           kernel image to an MMC or SD card and boot the kernel straight
1860           from the reset vector. At reset the processor Mask ROM will load
1861           the first part of the ROM-able zImage which in turn loads the
1862           rest the kernel image to RAM.
1863
1864 config ZBOOT_ROM_NONE
1865         bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1866         help
1867           Do not load image from SD or MMC
1868
1869 config ZBOOT_ROM_MMCIF
1870         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1871         help
1872           Load image from MMCIF hardware block.
1873
1874 config ZBOOT_ROM_SH_MOBILE_SDHI
1875         bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1876         help
1877           Load image from SDHI hardware block
1878
1879 endchoice
1880
1881 config ARM_APPENDED_DTB
1882         bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1883         depends on OF
1884         help
1885           With this option, the boot code will look for a device tree binary
1886           (DTB) appended to zImage
1887           (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1888
1889           This is meant as a backward compatibility convenience for those
1890           systems with a bootloader that can't be upgraded to accommodate
1891           the documented boot protocol using a device tree.
1892
1893           Beware that there is very little in terms of protection against
1894           this option being confused by leftover garbage in memory that might
1895           look like a DTB header after a reboot if no actual DTB is appended
1896           to zImage.  Do not leave this option active in a production kernel
1897           if you don't intend to always append a DTB.  Proper passing of the
1898           location into r2 of a bootloader provided DTB is always preferable
1899           to this option.
1900
1901 config ARM_ATAG_DTB_COMPAT
1902         bool "Supplement the appended DTB with traditional ATAG information"
1903         depends on ARM_APPENDED_DTB
1904         help
1905           Some old bootloaders can't be updated to a DTB capable one, yet
1906           they provide ATAGs with memory configuration, the ramdisk address,
1907           the kernel cmdline string, etc.  Such information is dynamically
1908           provided by the bootloader and can't always be stored in a static
1909           DTB.  To allow a device tree enabled kernel to be used with such
1910           bootloaders, this option allows zImage to extract the information
1911           from the ATAG list and store it at run time into the appended DTB.
1912
1913 choice
1914         prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1915         default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1916
1917 config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1918         bool "Use bootloader kernel arguments if available"
1919         help
1920           Uses the command-line options passed by the boot loader instead of
1921           the device tree bootargs property. If the boot loader doesn't provide
1922           any, the device tree bootargs property will be used.
1923
1924 config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1925         bool "Extend with bootloader kernel arguments"
1926         help
1927           The command-line arguments provided by the boot loader will be
1928           appended to the the device tree bootargs property.
1929
1930 endchoice
1931
1932 config CMDLINE
1933         string "Default kernel command string"
1934         default ""
1935         help
1936           On some architectures (EBSA110 and CATS), there is currently no way
1937           for the boot loader to pass arguments to the kernel. For these
1938           architectures, you should supply some command-line options at build
1939           time by entering them here. As a minimum, you should specify the
1940           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1941
1942 choice
1943         prompt "Kernel command line type" if CMDLINE != ""
1944         default CMDLINE_FROM_BOOTLOADER
1945         depends on ATAGS
1946
1947 config CMDLINE_FROM_BOOTLOADER
1948         bool "Use bootloader kernel arguments if available"
1949         help
1950           Uses the command-line options passed by the boot loader. If
1951           the boot loader doesn't provide any, the default kernel command
1952           string provided in CMDLINE will be used.
1953
1954 config CMDLINE_EXTEND
1955         bool "Extend bootloader kernel arguments"
1956         help
1957           The command-line arguments provided by the boot loader will be
1958           appended to the default kernel command string.
1959
1960 config CMDLINE_FORCE
1961         bool "Always use the default kernel command string"
1962         help
1963           Always use the default kernel command string, even if the boot
1964           loader passes other arguments to the kernel.
1965           This is useful if you cannot or don't want to change the
1966           command-line options your boot loader passes to the kernel.
1967 endchoice
1968
1969 config XIP_KERNEL
1970         bool "Kernel Execute-In-Place from ROM"
1971         depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
1972         help
1973           Execute-In-Place allows the kernel to run from non-volatile storage
1974           directly addressable by the CPU, such as NOR flash. This saves RAM
1975           space since the text section of the kernel is not loaded from flash
1976           to RAM.  Read-write sections, such as the data section and stack,
1977           are still copied to RAM.  The XIP kernel is not compressed since
1978           it has to run directly from flash, so it will take more space to
1979           store it.  The flash address used to link the kernel object files,
1980           and for storing it, is configuration dependent. Therefore, if you
1981           say Y here, you must know the proper physical address where to
1982           store the kernel image depending on your own flash memory usage.
1983
1984           Also note that the make target becomes "make xipImage" rather than
1985           "make zImage" or "make Image".  The final kernel binary to put in
1986           ROM memory will be arch/arm/boot/xipImage.
1987
1988           If unsure, say N.
1989
1990 config XIP_PHYS_ADDR
1991         hex "XIP Kernel Physical Location"
1992         depends on XIP_KERNEL
1993         default "0x00080000"
1994         help
1995           This is the physical address in your flash memory the kernel will
1996           be linked for and stored to.  This address is dependent on your
1997           own flash usage.
1998
1999 config KEXEC
2000         bool "Kexec system call (EXPERIMENTAL)"
2001         depends on (!SMP || PM_SLEEP_SMP)
2002         help
2003           kexec is a system call that implements the ability to shutdown your
2004           current kernel, and to start another kernel.  It is like a reboot
2005           but it is independent of the system firmware.   And like a reboot
2006           you can start any kernel with it, not just Linux.
2007
2008           It is an ongoing process to be certain the hardware in a machine
2009           is properly shutdown, so do not be surprised if this code does not
2010           initially work for you.
2011
2012 config ATAGS_PROC
2013         bool "Export atags in procfs"
2014         depends on ATAGS && KEXEC
2015         default y
2016         help
2017           Should the atags used to boot the kernel be exported in an "atags"
2018           file in procfs. Useful with kexec.
2019
2020 config CRASH_DUMP
2021         bool "Build kdump crash kernel (EXPERIMENTAL)"
2022         help
2023           Generate crash dump after being started by kexec. This should
2024           be normally only set in special crash dump kernels which are
2025           loaded in the main kernel with kexec-tools into a specially
2026           reserved region and then later executed after a crash by
2027           kdump/kexec. The crash dump kernel must be compiled to a
2028           memory address not used by the main kernel
2029
2030           For more details see Documentation/kdump/kdump.txt
2031
2032 config AUTO_ZRELADDR
2033         bool "Auto calculation of the decompressed kernel image address"
2034         help
2035           ZRELADDR is the physical address where the decompressed kernel
2036           image will be placed. If AUTO_ZRELADDR is selected, the address
2037           will be determined at run-time by masking the current IP with
2038           0xf8000000. This assumes the zImage being placed in the first 128MB
2039           from start of memory.
2040
2041 endmenu
2042
2043 menu "CPU Power Management"
2044
2045 source "drivers/cpufreq/Kconfig"
2046
2047 source "drivers/cpuidle/Kconfig"
2048
2049 endmenu
2050
2051 menu "Floating point emulation"
2052
2053 comment "At least one emulation must be selected"
2054
2055 config FPE_NWFPE
2056         bool "NWFPE math emulation"
2057         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2058         ---help---
2059           Say Y to include the NWFPE floating point emulator in the kernel.
2060           This is necessary to run most binaries. Linux does not currently
2061           support floating point hardware so you need to say Y here even if
2062           your machine has an FPA or floating point co-processor podule.
2063
2064           You may say N here if you are going to load the Acorn FPEmulator
2065           early in the bootup.
2066
2067 config FPE_NWFPE_XP
2068         bool "Support extended precision"
2069         depends on FPE_NWFPE
2070         help
2071           Say Y to include 80-bit support in the kernel floating-point
2072           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2073           Note that gcc does not generate 80-bit operations by default,
2074           so in most cases this option only enlarges the size of the
2075           floating point emulator without any good reason.
2076
2077           You almost surely want to say N here.
2078
2079 config FPE_FASTFPE
2080         bool "FastFPE math emulation (EXPERIMENTAL)"
2081         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
2082         ---help---
2083           Say Y here to include the FAST floating point emulator in the kernel.
2084           This is an experimental much faster emulator which now also has full
2085           precision for the mantissa.  It does not support any exceptions.
2086           It is very simple, and approximately 3-6 times faster than NWFPE.
2087
2088           It should be sufficient for most programs.  It may be not suitable
2089           for scientific calculations, but you have to check this for yourself.
2090           If you do not feel you need a faster FP emulation you should better
2091           choose NWFPE.
2092
2093 config VFP
2094         bool "VFP-format floating point maths"
2095         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2096         help
2097           Say Y to include VFP support code in the kernel. This is needed
2098           if your hardware includes a VFP unit.
2099
2100           Please see <file:Documentation/arm/VFP/release-notes.txt> for
2101           release notes and additional status information.
2102
2103           Say N if your target does not have VFP hardware.
2104
2105 config VFPv3
2106         bool
2107         depends on VFP
2108         default y if CPU_V7
2109
2110 config NEON
2111         bool "Advanced SIMD (NEON) Extension support"
2112         depends on VFPv3 && CPU_V7
2113         help
2114           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2115           Extension.
2116
2117 config KERNEL_MODE_NEON
2118         bool "Support for NEON in kernel mode"
2119         depends on NEON && AEABI
2120         help
2121           Say Y to include support for NEON in kernel mode.
2122
2123 endmenu
2124
2125 menu "Userspace binary formats"
2126
2127 source "fs/Kconfig.binfmt"
2128
2129 config ARTHUR
2130         tristate "RISC OS personality"
2131         depends on !AEABI
2132         help
2133           Say Y here to include the kernel code necessary if you want to run
2134           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2135           experimental; if this sounds frightening, say N and sleep in peace.
2136           You can also say M here to compile this support as a module (which
2137           will be called arthur).
2138
2139 endmenu
2140
2141 menu "Power management options"
2142
2143 source "kernel/power/Kconfig"
2144
2145 config ARCH_SUSPEND_POSSIBLE
2146         depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
2147                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2148         def_bool y
2149
2150 config ARM_CPU_SUSPEND
2151         def_bool PM_SLEEP
2152
2153 config ARCH_HIBERNATION_POSSIBLE
2154         bool
2155         depends on MMU
2156         default y if ARCH_SUSPEND_POSSIBLE
2157
2158 endmenu
2159
2160 source "net/Kconfig"
2161
2162 source "drivers/Kconfig"
2163
2164 source "fs/Kconfig"
2165
2166 source "arch/arm/Kconfig.debug"
2167
2168 source "security/Kconfig"
2169
2170 source "crypto/Kconfig"
2171
2172 source "lib/Kconfig"
2173
2174 source "arch/arm/kvm/Kconfig"