arch/arm/Kconfig

   1 config ARM
   2         bool
   3         default y
   4         select HAVE_AOUT
   5         select HAVE_DMA_API_DEBUG
   6         select HAVE_IDE
   7         select HAVE_MEMBLOCK
   8         select RTC_LIB
   9         select SYS_SUPPORTS_APM_EMULATION
  10         select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11         select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12         select HAVE_ARCH_KGDB
  13         select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14         select HAVE_KRETPROBES if (HAVE_KPROBES)
  15         select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16         select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17         select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18         select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19         select HAVE_GENERIC_DMA_COHERENT
  20         select HAVE_KERNEL_GZIP
  21         select HAVE_KERNEL_LZO
  22         select HAVE_KERNEL_LZMA
  23         select HAVE_IRQ_WORK
  24         select HAVE_PERF_EVENTS
  25         select PERF_USE_VMALLOC
  26         select HAVE_REGS_AND_STACK_ACCESS_API
  27         select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28         select HAVE_C_RECORDMCOUNT
  29         select HAVE_GENERIC_HARDIRQS
  30         select HAVE_SPARSE_IRQ
  31         select GENERIC_IRQ_SHOW
  32         help
  33           The ARM series is a line of low-power-consumption RISC chip designs
  34           licensed by ARM Ltd and targeted at embedded applications and
  35           handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
  36           manufactured, but legacy ARM-based PC hardware remains popular in
  37           Europe.  There is an ARM Linux project with a web page at
  38           <http://www.arm.linux.org.uk/>.
  39
  40 config HAVE_PWM
  41         bool
  42
  43 config MIGHT_HAVE_PCI
  44         bool
  45
  46 config SYS_SUPPORTS_APM_EMULATION
  47         bool
  48
  49 config HAVE_SCHED_CLOCK
  50         bool
  51
  52 config GENERIC_GPIO
  53         bool
  54
  55 config ARCH_USES_GETTIMEOFFSET
  56         bool
  57         default n
  58
  59 config GENERIC_CLOCKEVENTS
  60         bool
  61
  62 config GENERIC_CLOCKEVENTS_BROADCAST
  63         bool
  64         depends on GENERIC_CLOCKEVENTS
  65         default y if SMP
  66
  67 config KTIME_SCALAR
  68         bool
  69         default y
  70
  71 config HAVE_TCM
  72         bool
  73         select GENERIC_ALLOCATOR
  74
  75 config HAVE_PROC_CPU
  76         bool
  77
  78 config NO_IOPORT
  79         bool
  80
  81 config EISA
  82         bool
  83         ---help---
  84           The Extended Industry Standard Architecture (EISA) bus was
  85           developed as an open alternative to the IBM MicroChannel bus.
  86
  87           The EISA bus provided some of the features of the IBM MicroChannel
  88           bus while maintaining backward compatibility with cards made for
  89           the older ISA bus.  The EISA bus saw limited use between 1988 and
  90           1995 when it was made obsolete by the PCI bus.
  91
  92           Say Y here if you are building a kernel for an EISA-based machine.
  93
  94           Otherwise, say N.
  95
  96 config SBUS
  97         bool
  98
  99 config MCA
 100         bool
 101         help
 102           MicroChannel Architecture is found in some IBM PS/2 machines and
 103           laptops.  It is a bus system similar to PCI or ISA. See
 104           <file:Documentation/mca.txt> (and especially the web page given
 105           there) before attempting to build an MCA bus kernel.
 106
 107 config STACKTRACE_SUPPORT
 108         bool
 109         default y
 110
 111 config HAVE_LATENCYTOP_SUPPORT
 112         bool
 113         depends on !SMP
 114         default y
 115
 116 config LOCKDEP_SUPPORT
 117         bool
 118         default y
 119
 120 config TRACE_IRQFLAGS_SUPPORT
 121         bool
 122         default y
 123
 124 config HARDIRQS_SW_RESEND
 125         bool
 126         default y
 127
 128 config GENERIC_IRQ_PROBE
 129         bool
 130         default y
 131
 132 config GENERIC_LOCKBREAK
 133         bool
 134         default y
 135         depends on SMP && PREEMPT
 136
 137 config RWSEM_GENERIC_SPINLOCK
 138         bool
 139         default y
 140
 141 config RWSEM_XCHGADD_ALGORITHM
 142         bool
 143
 144 config ARCH_HAS_ILOG2_U32
 145         bool
 146
 147 config ARCH_HAS_ILOG2_U64
 148         bool
 149
 150 config ARCH_HAS_CPUFREQ
 151         bool
 152         help
 153           Internal node to signify that the ARCH has CPUFREQ support
 154           and that the relevant menu configurations are displayed for
 155           it.
 156
 157 config ARCH_HAS_CPU_IDLE_WAIT
 158        def_bool y
 159
 160 config GENERIC_HWEIGHT
 161         bool
 162         default y
 163
 164 config GENERIC_CALIBRATE_DELAY
 165         bool
 166         default y
 167
 168 config ARCH_MAY_HAVE_PC_FDC
 169         bool
 170
 171 config ZONE_DMA
 172         bool
 173
 174 config NEED_DMA_MAP_STATE
 175        def_bool y
 176
 177 config GENERIC_ISA_DMA
 178         bool
 179
 180 config FIQ
 181         bool
 182
 183 config ARCH_MTD_XIP
 184         bool
 185
 186 config VECTORS_BASE
 187         hex
 188         default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 189         default DRAM_BASE if REMAP_VECTORS_TO_RAM
 190         default 0x00000000
 191         help
 192           The base address of exception vectors.
 193
 194 config ARM_PATCH_PHYS_VIRT
 195         bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
 196         depends on EXPERIMENTAL
 197         depends on !XIP_KERNEL && MMU
 198         depends on !ARCH_REALVIEW || !SPARSEMEM
 199         help
 200           Patch phys-to-virt and virt-to-phys translation functions at
 201           boot and module load time according to the position of the
 202           kernel in system memory.
 203
 204           This can only be used with non-XIP MMU kernels where the base
 205           of physical memory is at a 16MB boundary, or theoretically 64K
 206           for the MSM machine class.
 207
 208 config ARM_PATCH_PHYS_VIRT_16BIT
 209         def_bool y
 210         depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
 211         help
 212           This option extends the physical to virtual translation patching
 213           to allow physical memory down to a theoretical minimum of 64K
 214           boundaries.
 215
 216 source "init/Kconfig"
 217
 218 source "kernel/Kconfig.freezer"
 219
 220 menu "System Type"
 221
 222 config MMU
 223         bool "MMU-based Paged Memory Management Support"
 224         default y
 225         help
 226           Select if you want MMU-based virtualised addressing space
 227           support by paged memory management. If unsure, say 'Y'.
 228
 229 #
 230 # The "ARM system type" choice list is ordered alphabetically by option
 231 # text.  Please add new entries in the option alphabetic order.
 232 #
 233 choice
 234         prompt "ARM system type"
 235         default ARCH_VERSATILE
 236
 237 config ARCH_INTEGRATOR
 238         bool "ARM Ltd. Integrator family"
 239         select ARM_AMBA
 240         select ARCH_HAS_CPUFREQ
 241         select CLKDEV_LOOKUP
 242         select ICST
 243         select GENERIC_CLOCKEVENTS
 244         select PLAT_VERSATILE
 245         select PLAT_VERSATILE_FPGA_IRQ
 246         help
 247           Support for ARM's Integrator platform.
 248
 249 config ARCH_REALVIEW
 250         bool "ARM Ltd. RealView family"
 251         select ARM_AMBA
 252         select CLKDEV_LOOKUP
 253         select ICST
 254         select GENERIC_CLOCKEVENTS
 255         select ARCH_WANT_OPTIONAL_GPIOLIB
 256         select PLAT_VERSATILE
 257         select PLAT_VERSATILE_CLCD
 258         select ARM_TIMER_SP804
 259         select GPIO_PL061 if GPIOLIB
 260         help
 261           This enables support for ARM Ltd RealView boards.
 262
 263 config ARCH_VERSATILE
 264         bool "ARM Ltd. Versatile family"
 265         select ARM_AMBA
 266         select ARM_VIC
 267         select CLKDEV_LOOKUP
 268         select ICST
 269         select GENERIC_CLOCKEVENTS
 270         select ARCH_WANT_OPTIONAL_GPIOLIB
 271         select PLAT_VERSATILE
 272         select PLAT_VERSATILE_CLCD
 273         select PLAT_VERSATILE_FPGA_IRQ
 274         select ARM_TIMER_SP804
 275         help
 276           This enables support for ARM Ltd Versatile board.
 277
 278 config ARCH_VEXPRESS
 279         bool "ARM Ltd. Versatile Express family"
 280         select ARCH_WANT_OPTIONAL_GPIOLIB
 281         select ARM_AMBA
 282         select ARM_TIMER_SP804
 283         select CLKDEV_LOOKUP
 284         select GENERIC_CLOCKEVENTS
 285         select HAVE_CLK
 286         select HAVE_PATA_PLATFORM
 287         select ICST
 288         select PLAT_VERSATILE
 289         select PLAT_VERSATILE_CLCD
 290         help
 291           This enables support for the ARM Ltd Versatile Express boards.
 292
 293 config ARCH_AT91
 294         bool "Atmel AT91"
 295         select ARCH_REQUIRE_GPIOLIB
 296         select HAVE_CLK
 297         help
 298           This enables support for systems based on the Atmel AT91RM9200,
 299           AT91SAM9 and AT91CAP9 processors.
 300
 301 config ARCH_BCMRING
 302         bool "Broadcom BCMRING"
 303         depends on MMU
 304         select CPU_V6
 305         select ARM_AMBA
 306         select ARM_TIMER_SP804
 307         select CLKDEV_LOOKUP
 308         select GENERIC_CLOCKEVENTS
 309         select ARCH_WANT_OPTIONAL_GPIOLIB
 310         help
 311           Support for Broadcom's BCMRing platform.
 312
 313 config ARCH_CLPS711X
 314         bool "Cirrus Logic CLPS711x/EP721x-based"
 315         select CPU_ARM720T
 316         select ARCH_USES_GETTIMEOFFSET
 317         help
 318           Support for Cirrus Logic 711x/721x based boards.
 319
 320 config ARCH_CNS3XXX
 321         bool "Cavium Networks CNS3XXX family"
 322         select CPU_V6
 323         select GENERIC_CLOCKEVENTS
 324         select ARM_GIC
 325         select MIGHT_HAVE_PCI
 326         select PCI_DOMAINS if PCI
 327         help
 328           Support for Cavium Networks CNS3XXX platform.
 329
 330 config ARCH_GEMINI
 331         bool "Cortina Systems Gemini"
 332         select CPU_FA526
 333         select ARCH_REQUIRE_GPIOLIB
 334         select ARCH_USES_GETTIMEOFFSET
 335         help
 336           Support for the Cortina Systems Gemini family SoCs
 337
 338 config ARCH_EBSA110
 339         bool "EBSA-110"
 340         select CPU_SA110
 341         select ISA
 342         select NO_IOPORT
 343         select ARCH_USES_GETTIMEOFFSET
 344         help
 345           This is an evaluation board for the StrongARM processor available
 346           from Digital. It has limited hardware on-board, including an
 347           Ethernet interface, two PCMCIA sockets, two serial ports and a
 348           parallel port.
 349
 350 config ARCH_EP93XX
 351         bool "EP93xx-based"
 352         select CPU_ARM920T
 353         select ARM_AMBA
 354         select ARM_VIC
 355         select CLKDEV_LOOKUP
 356         select ARCH_REQUIRE_GPIOLIB
 357         select ARCH_HAS_HOLES_MEMORYMODEL
 358         select ARCH_USES_GETTIMEOFFSET
 359         help
 360           This enables support for the Cirrus EP93xx series of CPUs.
 361
 362 config ARCH_FOOTBRIDGE
 363         bool "FootBridge"
 364         select CPU_SA110
 365         select FOOTBRIDGE
 366         select GENERIC_CLOCKEVENTS
 367         help
 368           Support for systems based on the DC21285 companion chip
 369           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 370
 371 config ARCH_MXC
 372         bool "Freescale MXC/iMX-based"
 373         select GENERIC_CLOCKEVENTS
 374         select ARCH_REQUIRE_GPIOLIB
 375         select CLKDEV_LOOKUP
 376         select CLKSRC_MMIO
 377         select HAVE_SCHED_CLOCK
 378         help
 379           Support for Freescale MXC/iMX-based family of processors
 380
 381 config ARCH_MXS
 382         bool "Freescale MXS-based"
 383         select GENERIC_CLOCKEVENTS
 384         select ARCH_REQUIRE_GPIOLIB
 385         select CLKDEV_LOOKUP
 386         select CLKSRC_MMIO
 387         help
 388           Support for Freescale MXS-based family of processors
 389
 390 config ARCH_NETX
 391         bool "Hilscher NetX based"
 392         select CLKSRC_MMIO
 393         select CPU_ARM926T
 394         select ARM_VIC
 395         select GENERIC_CLOCKEVENTS
 396         help
 397           This enables support for systems based on the Hilscher NetX Soc
 398
 399 config ARCH_H720X
 400         bool "Hynix HMS720x-based"
 401         select CPU_ARM720T
 402         select ISA_DMA_API
 403         select ARCH_USES_GETTIMEOFFSET
 404         help
 405           This enables support for systems based on the Hynix HMS720x
 406
 407 config ARCH_IOP13XX
 408         bool "IOP13xx-based"
 409         depends on MMU
 410         select CPU_XSC3
 411         select PLAT_IOP
 412         select PCI
 413         select ARCH_SUPPORTS_MSI
 414         select VMSPLIT_1G
 415         help
 416           Support for Intel's IOP13XX (XScale) family of processors.
 417
 418 config ARCH_IOP32X
 419         bool "IOP32x-based"
 420         depends on MMU
 421         select CPU_XSCALE
 422         select PLAT_IOP
 423         select PCI
 424         select ARCH_REQUIRE_GPIOLIB
 425         help
 426           Support for Intel's 80219 and IOP32X (XScale) family of
 427           processors.
 428
 429 config ARCH_IOP33X
 430         bool "IOP33x-based"
 431         depends on MMU
 432         select CPU_XSCALE
 433         select PLAT_IOP
 434         select PCI
 435         select ARCH_REQUIRE_GPIOLIB
 436         help
 437           Support for Intel's IOP33X (XScale) family of processors.
 438
 439 config ARCH_IXP23XX
 440         bool "IXP23XX-based"
 441         depends on MMU
 442         select CPU_XSC3
 443         select PCI
 444         select ARCH_USES_GETTIMEOFFSET
 445         help
 446           Support for Intel's IXP23xx (XScale) family of processors.
 447
 448 config ARCH_IXP2000
 449         bool "IXP2400/2800-based"
 450         depends on MMU
 451         select CPU_XSCALE
 452         select PCI
 453         select ARCH_USES_GETTIMEOFFSET
 454         help
 455           Support for Intel's IXP2400/2800 (XScale) family of processors.
 456
 457 config ARCH_IXP4XX
 458         bool "IXP4xx-based"
 459         depends on MMU
 460         select CLKSRC_MMIO
 461         select CPU_XSCALE
 462         select GENERIC_GPIO
 463         select GENERIC_CLOCKEVENTS
 464         select HAVE_SCHED_CLOCK
 465         select MIGHT_HAVE_PCI
 466         select DMABOUNCE if PCI
 467         help
 468           Support for Intel's IXP4XX (XScale) family of processors.
 469
 470 config ARCH_DOVE
 471         bool "Marvell Dove"
 472         select CPU_V7
 473         select PCI
 474         select ARCH_REQUIRE_GPIOLIB
 475         select GENERIC_CLOCKEVENTS
 476         select PLAT_ORION
 477         help
 478           Support for the Marvell Dove SoC 88AP510
 479
 480 config ARCH_KIRKWOOD
 481         bool "Marvell Kirkwood"
 482         select CPU_FEROCEON
 483         select PCI
 484         select ARCH_REQUIRE_GPIOLIB
 485         select GENERIC_CLOCKEVENTS
 486         select PLAT_ORION
 487         help
 488           Support for the following Marvell Kirkwood series SoCs:
 489           88F6180, 88F6192 and 88F6281.
 490
 491 config ARCH_LOKI
 492         bool "Marvell Loki (88RC8480)"
 493         select CPU_FEROCEON
 494         select GENERIC_CLOCKEVENTS
 495         select PLAT_ORION
 496         help
 497           Support for the Marvell Loki (88RC8480) SoC.
 498
 499 config ARCH_LPC32XX
 500         bool "NXP LPC32XX"
 501         select CLKSRC_MMIO
 502         select CPU_ARM926T
 503         select ARCH_REQUIRE_GPIOLIB
 504         select HAVE_IDE
 505         select ARM_AMBA
 506         select USB_ARCH_HAS_OHCI
 507         select CLKDEV_LOOKUP
 508         select GENERIC_TIME
 509         select GENERIC_CLOCKEVENTS
 510         help
 511           Support for the NXP LPC32XX family of processors
 512
 513 config ARCH_MV78XX0
 514         bool "Marvell MV78xx0"
 515         select CPU_FEROCEON
 516         select PCI
 517         select ARCH_REQUIRE_GPIOLIB
 518         select GENERIC_CLOCKEVENTS
 519         select PLAT_ORION
 520         help
 521           Support for the following Marvell MV78xx0 series SoCs:
 522           MV781x0, MV782x0.
 523
 524 config ARCH_ORION5X
 525         bool "Marvell Orion"
 526         depends on MMU
 527         select CPU_FEROCEON
 528         select PCI
 529         select ARCH_REQUIRE_GPIOLIB
 530         select GENERIC_CLOCKEVENTS
 531         select PLAT_ORION
 532         help
 533           Support for the following Marvell Orion 5x series SoCs:
 534           Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
 535           Orion-2 (5281), Orion-1-90 (6183).
 536
 537 config ARCH_MMP
 538         bool "Marvell PXA168/910/MMP2"
 539         depends on MMU
 540         select ARCH_REQUIRE_GPIOLIB
 541         select CLKDEV_LOOKUP
 542         select GENERIC_CLOCKEVENTS
 543         select HAVE_SCHED_CLOCK
 544         select TICK_ONESHOT
 545         select PLAT_PXA
 546         select SPARSE_IRQ
 547         help
 548           Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 549
 550 config ARCH_KS8695
 551         bool "Micrel/Kendin KS8695"
 552         select CPU_ARM922T
 553         select ARCH_REQUIRE_GPIOLIB
 554         select ARCH_USES_GETTIMEOFFSET
 555         help
 556           Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 557           System-on-Chip devices.
 558
 559 config ARCH_W90X900
 560         bool "Nuvoton W90X900 CPU"
 561         select CPU_ARM926T
 562         select ARCH_REQUIRE_GPIOLIB
 563         select CLKDEV_LOOKUP
 564         select CLKSRC_MMIO
 565         select GENERIC_CLOCKEVENTS
 566         help
 567           Support for Nuvoton (Winbond logic dept.) ARM9 processor,
 568           At present, the w90x900 has been renamed nuc900, regarding
 569           the ARM series product line, you can login the following
 570           link address to know more.
 571
 572           <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 573                 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 574
 575 config ARCH_NUC93X
 576         bool "Nuvoton NUC93X CPU"
 577         select CPU_ARM926T
 578         select CLKDEV_LOOKUP
 579         help
 580           Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
 581           low-power and high performance MPEG-4/JPEG multimedia controller chip.
 582
 583 config ARCH_TEGRA
 584         bool "NVIDIA Tegra"
 585         select CLKDEV_LOOKUP
 586         select CLKSRC_MMIO
 587         select GENERIC_TIME
 588         select GENERIC_CLOCKEVENTS
 589         select GENERIC_GPIO
 590         select HAVE_CLK
 591         select HAVE_SCHED_CLOCK
 592         select ARCH_HAS_BARRIERS if CACHE_L2X0
 593         select ARCH_HAS_CPUFREQ
 594         help
 595           This enables support for NVIDIA Tegra based systems (Tegra APX,
 596           Tegra 6xx and Tegra 2 series).
 597
 598 config ARCH_PNX4008
 599         bool "Philips Nexperia PNX4008 Mobile"
 600         select CPU_ARM926T
 601         select CLKDEV_LOOKUP
 602         select ARCH_USES_GETTIMEOFFSET
 603         help
 604           This enables support for Philips PNX4008 mobile platform.
 605
 606 config ARCH_PXA
 607         bool "PXA2xx/PXA3xx-based"
 608         depends on MMU
 609         select ARCH_MTD_XIP
 610         select ARCH_HAS_CPUFREQ
 611         select CLKDEV_LOOKUP
 612         select CLKSRC_MMIO
 613         select ARCH_REQUIRE_GPIOLIB
 614         select GENERIC_CLOCKEVENTS
 615         select HAVE_SCHED_CLOCK
 616         select TICK_ONESHOT
 617         select PLAT_PXA
 618         select SPARSE_IRQ
 619         help
 620           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 621
 622 config ARCH_MSM
 623         bool "Qualcomm MSM"
 624         select HAVE_CLK
 625         select GENERIC_CLOCKEVENTS
 626         select ARCH_REQUIRE_GPIOLIB
 627         select CLKDEV_LOOKUP
 628         help
 629           Support for Qualcomm MSM/QSD based systems.  This runs on the
 630           apps processor of the MSM/QSD and depends on a shared memory
 631           interface to the modem processor which runs the baseband
 632           stack and controls some vital subsystems
 633           (clock and power control, etc).
 634
 635 config ARCH_SHMOBILE
 636         bool "Renesas SH-Mobile / R-Mobile"
 637         select HAVE_CLK
 638         select CLKDEV_LOOKUP
 639         select GENERIC_CLOCKEVENTS
 640         select NO_IOPORT
 641         select SPARSE_IRQ
 642         select MULTI_IRQ_HANDLER
 643         help
 644           Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 645
 646 config ARCH_RPC
 647         bool "RiscPC"
 648         select ARCH_ACORN
 649         select FIQ
 650         select TIMER_ACORN
 651         select ARCH_MAY_HAVE_PC_FDC
 652         select HAVE_PATA_PLATFORM
 653         select ISA_DMA_API
 654         select NO_IOPORT
 655         select ARCH_SPARSEMEM_ENABLE
 656         select ARCH_USES_GETTIMEOFFSET
 657         help
 658           On the Acorn Risc-PC, Linux can support the internal IDE disk and
 659           CD-ROM interface, serial and parallel port, and the floppy drive.
 660
 661 config ARCH_SA1100
 662         bool "SA1100-based"
 663         select CLKSRC_MMIO
 664         select CPU_SA1100
 665         select ISA
 666         select ARCH_SPARSEMEM_ENABLE
 667         select ARCH_MTD_XIP
 668         select ARCH_HAS_CPUFREQ
 669         select CPU_FREQ
 670         select GENERIC_CLOCKEVENTS
 671         select HAVE_CLK
 672         select HAVE_SCHED_CLOCK
 673         select TICK_ONESHOT
 674         select ARCH_REQUIRE_GPIOLIB
 675         help
 676           Support for StrongARM 11x0 based boards.
 677
 678 config ARCH_S3C2410
 679         bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
 680         select GENERIC_GPIO
 681         select ARCH_HAS_CPUFREQ
 682         select HAVE_CLK
 683         select ARCH_USES_GETTIMEOFFSET
 684         select HAVE_S3C2410_I2C if I2C
 685         help
 686           Samsung S3C2410X CPU based systems, such as the Simtec Electronics
 687           BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 688           the Samsung SMDK2410 development board (and derivatives).
 689
 690           Note, the S3C2416 and the S3C2450 are so close that they even share
 691           the same SoC ID code. This means that there is no separate machine
 692           directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
 693
 694 config ARCH_S3C64XX
 695         bool "Samsung S3C64XX"
 696         select PLAT_SAMSUNG
 697         select CPU_V6
 698         select ARM_VIC
 699         select HAVE_CLK
 700         select NO_IOPORT
 701         select ARCH_USES_GETTIMEOFFSET
 702         select ARCH_HAS_CPUFREQ
 703         select ARCH_REQUIRE_GPIOLIB
 704         select SAMSUNG_CLKSRC
 705         select SAMSUNG_IRQ_VIC_TIMER
 706         select SAMSUNG_IRQ_UART
 707         select S3C_GPIO_TRACK
 708         select S3C_GPIO_PULL_UPDOWN
 709         select S3C_GPIO_CFG_S3C24XX
 710         select S3C_GPIO_CFG_S3C64XX
 711         select S3C_DEV_NAND
 712         select USB_ARCH_HAS_OHCI
 713         select SAMSUNG_GPIOLIB_4BIT
 714         select HAVE_S3C2410_I2C if I2C
 715         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 716         help
 717           Samsung S3C64XX series based systems
 718
 719 config ARCH_S5P64X0
 720         bool "Samsung S5P6440 S5P6450"
 721         select CPU_V6
 722         select GENERIC_GPIO
 723         select HAVE_CLK
 724         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 725         select GENERIC_CLOCKEVENTS
 726         select HAVE_SCHED_CLOCK
 727         select HAVE_S3C2410_I2C if I2C
 728         select HAVE_S3C_RTC if RTC_CLASS
 729         help
 730           Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
 731           SMDK6450.
 732
 733 config ARCH_S5P6442
 734         bool "Samsung S5P6442"
 735         select CPU_V6
 736         select GENERIC_GPIO
 737         select HAVE_CLK
 738         select ARCH_USES_GETTIMEOFFSET
 739         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 740         help
 741           Samsung S5P6442 CPU based systems
 742
 743 config ARCH_S5PC100
 744         bool "Samsung S5PC100"
 745         select GENERIC_GPIO
 746         select HAVE_CLK
 747         select CPU_V7
 748         select ARM_L1_CACHE_SHIFT_6
 749         select ARCH_USES_GETTIMEOFFSET
 750         select HAVE_S3C2410_I2C if I2C
 751         select HAVE_S3C_RTC if RTC_CLASS
 752         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 753         help
 754           Samsung S5PC100 series based systems
 755
 756 config ARCH_S5PV210
 757         bool "Samsung S5PV210/S5PC110"
 758         select CPU_V7
 759         select ARCH_SPARSEMEM_ENABLE
 760         select GENERIC_GPIO
 761         select HAVE_CLK
 762         select ARM_L1_CACHE_SHIFT_6
 763         select ARCH_HAS_CPUFREQ
 764         select GENERIC_CLOCKEVENTS
 765         select HAVE_SCHED_CLOCK
 766         select HAVE_S3C2410_I2C if I2C
 767         select HAVE_S3C_RTC if RTC_CLASS
 768         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 769         help
 770           Samsung S5PV210/S5PC110 series based systems
 771
 772 config ARCH_EXYNOS4
 773         bool "Samsung EXYNOS4"
 774         select CPU_V7
 775         select ARCH_SPARSEMEM_ENABLE
 776         select GENERIC_GPIO
 777         select HAVE_CLK
 778         select ARCH_HAS_CPUFREQ
 779         select GENERIC_CLOCKEVENTS
 780         select HAVE_S3C_RTC if RTC_CLASS
 781         select HAVE_S3C2410_I2C if I2C
 782         select HAVE_S3C2410_WATCHDOG if WATCHDOG
 783         help
 784           Samsung EXYNOS4 series based systems
 785
 786 config ARCH_SHARK
 787         bool "Shark"
 788         select CPU_SA110
 789         select ISA
 790         select ISA_DMA
 791         select ZONE_DMA
 792         select PCI
 793         select ARCH_USES_GETTIMEOFFSET
 794         help
 795           Support for the StrongARM based Digital DNARD machine, also known
 796           as "Shark" (<http://www.shark-linux.de/shark.html>).
 797
 798 config ARCH_TCC_926
 799         bool "Telechips TCC ARM926-based systems"
 800         select CLKSRC_MMIO
 801         select CPU_ARM926T
 802         select HAVE_CLK
 803         select CLKDEV_LOOKUP
 804         select GENERIC_CLOCKEVENTS
 805         help
 806           Support for Telechips TCC ARM926-based systems.
 807
 808 config ARCH_U300
 809         bool "ST-Ericsson U300 Series"
 810         depends on MMU
 811         select CLKSRC_MMIO
 812         select CPU_ARM926T
 813         select HAVE_SCHED_CLOCK
 814         select HAVE_TCM
 815         select ARM_AMBA
 816         select ARM_VIC
 817         select GENERIC_CLOCKEVENTS
 818         select CLKDEV_LOOKUP
 819         select GENERIC_GPIO
 820         help
 821           Support for ST-Ericsson U300 series mobile platforms.
 822
 823 config ARCH_U8500
 824         bool "ST-Ericsson U8500 Series"
 825         select CPU_V7
 826         select ARM_AMBA
 827         select GENERIC_CLOCKEVENTS
 828         select CLKDEV_LOOKUP
 829         select ARCH_REQUIRE_GPIOLIB
 830         select ARCH_HAS_CPUFREQ
 831         help
 832           Support for ST-Ericsson's Ux500 architecture
 833
 834 config ARCH_NOMADIK
 835         bool "STMicroelectronics Nomadik"
 836         select ARM_AMBA
 837         select ARM_VIC
 838         select CPU_ARM926T
 839         select CLKDEV_LOOKUP
 840         select GENERIC_CLOCKEVENTS
 841         select ARCH_REQUIRE_GPIOLIB
 842         help
 843           Support for the Nomadik platform by ST-Ericsson
 844
 845 config ARCH_DAVINCI
 846         bool "TI DaVinci"
 847         select GENERIC_CLOCKEVENTS
 848         select ARCH_REQUIRE_GPIOLIB
 849         select ZONE_DMA
 850         select HAVE_IDE
 851         select CLKDEV_LOOKUP
 852         select GENERIC_ALLOCATOR
 853         select GENERIC_IRQ_CHIP
 854         select ARCH_HAS_HOLES_MEMORYMODEL
 855         help
 856           Support for TI's DaVinci platform.
 857
 858 config ARCH_OMAP
 859         bool "TI OMAP"
 860         select HAVE_CLK
 861         select ARCH_REQUIRE_GPIOLIB
 862         select ARCH_HAS_CPUFREQ
 863         select GENERIC_CLOCKEVENTS
 864         select HAVE_SCHED_CLOCK
 865         select ARCH_HAS_HOLES_MEMORYMODEL
 866         help
 867           Support for TI's OMAP platform (OMAP1/2/3/4).
 868
 869 config PLAT_SPEAR
 870         bool "ST SPEAr"
 871         select ARM_AMBA
 872         select ARCH_REQUIRE_GPIOLIB
 873         select CLKDEV_LOOKUP
 874         select CLKSRC_MMIO
 875         select GENERIC_CLOCKEVENTS
 876         select HAVE_CLK
 877         help
 878           Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
 879
 880 config ARCH_VT8500
 881         bool "VIA/WonderMedia 85xx"
 882         select CPU_ARM926T
 883         select GENERIC_GPIO
 884         select ARCH_HAS_CPUFREQ
 885         select GENERIC_CLOCKEVENTS
 886         select ARCH_REQUIRE_GPIOLIB
 887         select HAVE_PWM
 888         help
 889           Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 890 endchoice
 891
 892 #
 893 # This is sorted alphabetically by mach-* pathname.  However, plat-*
 894 # Kconfigs may be included either alphabetically (according to the
 895 # plat- suffix) or along side the corresponding mach-* source.
 896 #
 897 source "arch/arm/mach-at91/Kconfig"
 898
 899 source "arch/arm/mach-bcmring/Kconfig"
 900
 901 source "arch/arm/mach-clps711x/Kconfig"
 902
 903 source "arch/arm/mach-cns3xxx/Kconfig"
 904
 905 source "arch/arm/mach-davinci/Kconfig"
 906
 907 source "arch/arm/mach-dove/Kconfig"
 908
 909 source "arch/arm/mach-ep93xx/Kconfig"
 910
 911 source "arch/arm/mach-footbridge/Kconfig"
 912
 913 source "arch/arm/mach-gemini/Kconfig"
 914
 915 source "arch/arm/mach-h720x/Kconfig"
 916
 917 source "arch/arm/mach-integrator/Kconfig"
 918
 919 source "arch/arm/mach-iop32x/Kconfig"
 920
 921 source "arch/arm/mach-iop33x/Kconfig"
 922
 923 source "arch/arm/mach-iop13xx/Kconfig"
 924
 925 source "arch/arm/mach-ixp4xx/Kconfig"
 926
 927 source "arch/arm/mach-ixp2000/Kconfig"
 928
 929 source "arch/arm/mach-ixp23xx/Kconfig"
 930
 931 source "arch/arm/mach-kirkwood/Kconfig"
 932
 933 source "arch/arm/mach-ks8695/Kconfig"
 934
 935 source "arch/arm/mach-loki/Kconfig"
 936
 937 source "arch/arm/mach-lpc32xx/Kconfig"
 938
 939 source "arch/arm/mach-msm/Kconfig"
 940
 941 source "arch/arm/mach-mv78xx0/Kconfig"
 942
 943 source "arch/arm/plat-mxc/Kconfig"
 944
 945 source "arch/arm/mach-mxs/Kconfig"
 946
 947 source "arch/arm/mach-netx/Kconfig"
 948
 949 source "arch/arm/mach-nomadik/Kconfig"
 950 source "arch/arm/plat-nomadik/Kconfig"
 951
 952 source "arch/arm/mach-nuc93x/Kconfig"
 953
 954 source "arch/arm/plat-omap/Kconfig"
 955
 956 source "arch/arm/mach-omap1/Kconfig"
 957
 958 source "arch/arm/mach-omap2/Kconfig"
 959
 960 source "arch/arm/mach-orion5x/Kconfig"
 961
 962 source "arch/arm/mach-pxa/Kconfig"
 963 source "arch/arm/plat-pxa/Kconfig"
 964
 965 source "arch/arm/mach-mmp/Kconfig"
 966
 967 source "arch/arm/mach-realview/Kconfig"
 968
 969 source "arch/arm/mach-sa1100/Kconfig"
 970
 971 source "arch/arm/plat-samsung/Kconfig"
 972 source "arch/arm/plat-s3c24xx/Kconfig"
 973 source "arch/arm/plat-s5p/Kconfig"
 974
 975 source "arch/arm/plat-spear/Kconfig"
 976
 977 source "arch/arm/plat-tcc/Kconfig"
 978
 979 if ARCH_S3C2410
 980 source "arch/arm/mach-s3c2400/Kconfig"
 981 source "arch/arm/mach-s3c2410/Kconfig"
 982 source "arch/arm/mach-s3c2412/Kconfig"
 983 source "arch/arm/mach-s3c2416/Kconfig"
 984 source "arch/arm/mach-s3c2440/Kconfig"
 985 source "arch/arm/mach-s3c2443/Kconfig"
 986 endif
 987
 988 if ARCH_S3C64XX
 989 source "arch/arm/mach-s3c64xx/Kconfig"
 990 endif
 991
 992 source "arch/arm/mach-s5p64x0/Kconfig"
 993
 994 source "arch/arm/mach-s5p6442/Kconfig"
 995
 996 source "arch/arm/mach-s5pc100/Kconfig"
 997
 998 source "arch/arm/mach-s5pv210/Kconfig"
 999
1000 source "arch/arm/mach-exynos4/Kconfig"
1001
1002 source "arch/arm/mach-shmobile/Kconfig"
1003
1004 source "arch/arm/mach-tegra/Kconfig"
1005
1006 source "arch/arm/mach-u300/Kconfig"
1007
1008 source "arch/arm/mach-ux500/Kconfig"
1009
1010 source "arch/arm/mach-versatile/Kconfig"
1011
1012 source "arch/arm/mach-vexpress/Kconfig"
1013 source "arch/arm/plat-versatile/Kconfig"
1014
1015 source "arch/arm/mach-vt8500/Kconfig"
1016
1017 source "arch/arm/mach-w90x900/Kconfig"
1018
1019 # Definitions to make life easier
1020 config ARCH_ACORN
1021         bool
1022
1023 config PLAT_IOP
1024         bool
1025         select GENERIC_CLOCKEVENTS
1026         select HAVE_SCHED_CLOCK
1027
1028 config PLAT_ORION
1029         bool
1030         select CLKSRC_MMIO
1031         select GENERIC_IRQ_CHIP
1032         select HAVE_SCHED_CLOCK
1033
1034 config PLAT_PXA
1035         bool
1036
1037 config PLAT_VERSATILE
1038         bool
1039
1040 config ARM_TIMER_SP804
1041         bool
1042         select CLKSRC_MMIO
1043
1044 source arch/arm/mm/Kconfig
1045
1046 config IWMMXT
1047         bool "Enable iWMMXt support"
1048         depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1049         default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1050         help
1051           Enable support for iWMMXt context switching at run time if
1052           running on a CPU that supports it.
1053
1054 #  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1055 config XSCALE_PMU
1056         bool
1057         depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1058         default y
1059
1060 config CPU_HAS_PMU
1061         depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1062                    (!ARCH_OMAP3 || OMAP3_EMU)
1063         default y
1064         bool
1065
1066 config MULTI_IRQ_HANDLER
1067         bool
1068         help
1069           Allow each machine to specify it's own IRQ handler at run time.
1070
1071 if !MMU
1072 source "arch/arm/Kconfig-nommu"
1073 endif
1074
1075 config ARM_ERRATA_411920
1076         bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1077         depends on CPU_V6 || CPU_V6K
1078         help
1079           Invalidation of the Instruction Cache operation can
1080           fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1081           It does not affect the MPCore. This option enables the ARM Ltd.
1082           recommended workaround.
1083
1084 config ARM_ERRATA_430973
1085         bool "ARM errata: Stale prediction on replaced interworking branch"
1086         depends on CPU_V7
1087         help
1088           This option enables the workaround for the 430973 Cortex-A8
1089           (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1090           interworking branch is replaced with another code sequence at the
1091           same virtual address, whether due to self-modifying code or virtual
1092           to physical address re-mapping, Cortex-A8 does not recover from the
1093           stale interworking branch prediction. This results in Cortex-A8
1094           executing the new code sequence in the incorrect ARM or Thumb state.
1095           The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1096           and also flushes the branch target cache at every context switch.
1097           Note that setting specific bits in the ACTLR register may not be
1098           available in non-secure mode.
1099
1100 config ARM_ERRATA_458693
1101         bool "ARM errata: Processor deadlock when a false hazard is created"
1102         depends on CPU_V7
1103         help
1104           This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1105           erratum. For very specific sequences of memory operations, it is
1106           possible for a hazard condition intended for a cache line to instead
1107           be incorrectly associated with a different cache line. This false
1108           hazard might then cause a processor deadlock. The workaround enables
1109           the L1 caching of the NEON accesses and disables the PLD instruction
1110           in the ACTLR register. Note that setting specific bits in the ACTLR
1111           register may not be available in non-secure mode.
1112
1113 config ARM_ERRATA_460075
1114         bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1115         depends on CPU_V7
1116         help
1117           This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1118           erratum. Any asynchronous access to the L2 cache may encounter a
1119           situation in which recent store transactions to the L2 cache are lost
1120           and overwritten with stale memory contents from external memory. The
1121           workaround disables the write-allocate mode for the L2 cache via the
1122           ACTLR register. Note that setting specific bits in the ACTLR register
1123           may not be available in non-secure mode.
1124
1125 config ARM_ERRATA_742230
1126         bool "ARM errata: DMB operation may be faulty"
1127         depends on CPU_V7 && SMP
1128         help
1129           This option enables the workaround for the 742230 Cortex-A9
1130           (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1131           between two write operations may not ensure the correct visibility
1132           ordering of the two writes. This workaround sets a specific bit in
1133           the diagnostic register of the Cortex-A9 which causes the DMB
1134           instruction to behave as a DSB, ensuring the correct behaviour of
1135           the two writes.
1136
1137 config ARM_ERRATA_742231
1138         bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1139         depends on CPU_V7 && SMP
1140         help
1141           This option enables the workaround for the 742231 Cortex-A9
1142           (r2p0..r2p2) erratum. Under certain conditions, specific to the
1143           Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1144           accessing some data located in the same cache line, may get corrupted
1145           data due to bad handling of the address hazard when the line gets
1146           replaced from one of the CPUs at the same time as another CPU is
1147           accessing it. This workaround sets specific bits in the diagnostic
1148           register of the Cortex-A9 which reduces the linefill issuing
1149           capabilities of the processor.
1150
1151 config PL310_ERRATA_588369
1152         bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1153         depends on CACHE_L2X0
1154         help
1155            The PL310 L2 cache controller implements three types of Clean &
1156            Invalidate maintenance operations: by Physical Address
1157            (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1158            They are architecturally defined to behave as the execution of a
1159            clean operation followed immediately by an invalidate operation,
1160            both performing to the same memory location. This functionality
1161            is not correctly implemented in PL310 as clean lines are not
1162            invalidated as a result of these operations.
1163
1164 config ARM_ERRATA_720789
1165         bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1166         depends on CPU_V7 && SMP
1167         help
1168           This option enables the workaround for the 720789 Cortex-A9 (prior to
1169           r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1170           broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1171           As a consequence of this erratum, some TLB entries which should be
1172           invalidated are not, resulting in an incoherency in the system page
1173           tables. The workaround changes the TLB flushing routines to invalidate
1174           entries regardless of the ASID.
1175
1176 config PL310_ERRATA_727915
1177         bool "Background Clean & Invalidate by Way operation can cause data corruption"
1178         depends on CACHE_L2X0
1179         help
1180           PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1181           operation (offset 0x7FC). This operation runs in background so that
1182           PL310 can handle normal accesses while it is in progress. Under very
1183           rare circumstances, due to this erratum, write data can be lost when
1184           PL310 treats a cacheable write transaction during a Clean &
1185           Invalidate by Way operation.
1186
1187 config ARM_ERRATA_743622
1188         bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1189         depends on CPU_V7
1190         help
1191           This option enables the workaround for the 743622 Cortex-A9
1192           (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1193           optimisation in the Cortex-A9 Store Buffer may lead to data
1194           corruption. This workaround sets a specific bit in the diagnostic
1195           register of the Cortex-A9 which disables the Store Buffer
1196           optimisation, preventing the defect from occurring. This has no
1197           visible impact on the overall performance or power consumption of the
1198           processor.
1199
1200 config ARM_ERRATA_751472
1201         bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1202         depends on CPU_V7 && SMP
1203         help
1204           This option enables the workaround for the 751472 Cortex-A9 (prior
1205           to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1206           completion of a following broadcasted operation if the second
1207           operation is received by a CPU before the ICIALLUIS has completed,
1208           potentially leading to corrupted entries in the cache or TLB.
1209
1210 config ARM_ERRATA_753970
1211         bool "ARM errata: cache sync operation may be faulty"
1212         depends on CACHE_PL310
1213         help
1214           This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1215
1216           Under some condition the effect of cache sync operation on
1217           the store buffer still remains when the operation completes.
1218           This means that the store buffer is always asked to drain and
1219           this prevents it from merging any further writes. The workaround
1220           is to replace the normal offset of cache sync operation (0x730)
1221           by another offset targeting an unmapped PL310 register 0x740.
1222           This has the same effect as the cache sync operation: store buffer
1223           drain and waiting for all buffers empty.
1224
1225 config ARM_ERRATA_754322
1226         bool "ARM errata: possible faulty MMU translations following an ASID switch"
1227         depends on CPU_V7
1228         help
1229           This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1230           r3p*) erratum. A speculative memory access may cause a page table walk
1231           which starts prior to an ASID switch but completes afterwards. This
1232           can populate the micro-TLB with a stale entry which may be hit with
1233           the new ASID. This workaround places two dsb instructions in the mm
1234           switching code so that no page table walks can cross the ASID switch.
1235
1236 config ARM_ERRATA_754327
1237         bool "ARM errata: no automatic Store Buffer drain"
1238         depends on CPU_V7 && SMP
1239         help
1240           This option enables the workaround for the 754327 Cortex-A9 (prior to
1241           r2p0) erratum. The Store Buffer does not have any automatic draining
1242           mechanism and therefore a livelock may occur if an external agent
1243           continuously polls a memory location waiting to observe an update.
1244           This workaround defines cpu_relax() as smp_mb(), preventing correctly
1245           written polling loops from denying visibility of updates to memory.
1246
1247 endmenu
1248
1249 source "arch/arm/common/Kconfig"
1250
1251 menu "Bus support"
1252
1253 config ARM_AMBA
1254         bool
1255
1256 config ISA
1257         bool
1258         help
1259           Find out whether you have ISA slots on your motherboard.  ISA is the
1260           name of a bus system, i.e. the way the CPU talks to the other stuff
1261           inside your box.  Other bus systems are PCI, EISA, MicroChannel
1262           (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1263           newer boards don't support it.  If you have ISA, say Y, otherwise N.
1264
1265 # Select ISA DMA controller support
1266 config ISA_DMA
1267         bool
1268         select ISA_DMA_API
1269
1270 # Select ISA DMA interface
1271 config ISA_DMA_API
1272         bool
1273
1274 config PCI
1275         bool "PCI support" if MIGHT_HAVE_PCI
1276         help
1277           Find out whether you have a PCI motherboard. PCI is the name of a
1278           bus system, i.e. the way the CPU talks to the other stuff inside
1279           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1280           VESA. If you have PCI, say Y, otherwise N.
1281
1282 config PCI_DOMAINS
1283         bool
1284         depends on PCI
1285
1286 config PCI_NANOENGINE
1287         bool "BSE nanoEngine PCI support"
1288         depends on SA1100_NANOENGINE
1289         help
1290           Enable PCI on the BSE nanoEngine board.
1291
1292 config PCI_SYSCALL
1293         def_bool PCI
1294
1295 # Select the host bridge type
1296 config PCI_HOST_VIA82C505
1297         bool
1298         depends on PCI && ARCH_SHARK
1299         default y
1300
1301 config PCI_HOST_ITE8152
1302         bool
1303         depends on PCI && MACH_ARMCORE
1304         default y
1305         select DMABOUNCE
1306
1307 source "drivers/pci/Kconfig"
1308
1309 source "drivers/pcmcia/Kconfig"
1310
1311 endmenu
1312
1313 menu "Kernel Features"
1314
1315 source "kernel/time/Kconfig"
1316
1317 config SMP
1318         bool "Symmetric Multi-Processing"
1319         depends on CPU_V6K || CPU_V7
1320         depends on GENERIC_CLOCKEVENTS
1321         depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1322                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1323                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1324                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1325         select USE_GENERIC_SMP_HELPERS
1326         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1327         help
1328           This enables support for systems with more than one CPU. If you have
1329           a system with only one CPU, like most personal computers, say N. If
1330           you have a system with more than one CPU, say Y.
1331
1332           If you say N here, the kernel will run on single and multiprocessor
1333           machines, but will use only one CPU of a multiprocessor machine. If
1334           you say Y here, the kernel will run on many, but not all, single
1335           processor machines. On a single processor machine, the kernel will
1336           run faster if you say N here.
1337
1338           See also <file:Documentation/i386/IO-APIC.txt>,
1339           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1340           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1341
1342           If you don't know what to do here, say N.
1343
1344 config SMP_ON_UP
1345         bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1346         depends on EXPERIMENTAL
1347         depends on SMP && !XIP_KERNEL
1348         default y
1349         help
1350           SMP kernels contain instructions which fail on non-SMP processors.
1351           Enabling this option allows the kernel to modify itself to make
1352           these instructions safe.  Disabling it allows about 1K of space
1353           savings.
1354
1355           If you don't know what to do here, say Y.
1356
1357 config HAVE_ARM_SCU
1358         bool
1359         depends on SMP
1360         help
1361           This option enables support for the ARM system coherency unit
1362
1363 config HAVE_ARM_TWD
1364         bool
1365         depends on SMP
1366         select TICK_ONESHOT
1367         help
1368           This options enables support for the ARM timer and watchdog unit
1369
1370 choice
1371         prompt "Memory split"
1372         default VMSPLIT_3G
1373         help
1374           Select the desired split between kernel and user memory.
1375
1376           If you are not absolutely sure what you are doing, leave this
1377           option alone!
1378
1379         config VMSPLIT_3G
1380                 bool "3G/1G user/kernel split"
1381         config VMSPLIT_2G
1382                 bool "2G/2G user/kernel split"
1383         config VMSPLIT_1G
1384                 bool "1G/3G user/kernel split"
1385 endchoice
1386
1387 config PAGE_OFFSET
1388         hex
1389         default 0x40000000 if VMSPLIT_1G
1390         default 0x80000000 if VMSPLIT_2G
1391         default 0xC0000000
1392
1393 config NR_CPUS
1394         int "Maximum number of CPUs (2-32)"
1395         range 2 32
1396         depends on SMP
1397         default "4"
1398
1399 config HOTPLUG_CPU
1400         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1401         depends on SMP && HOTPLUG && EXPERIMENTAL
1402         depends on !ARCH_MSM
1403         help
1404           Say Y here to experiment with turning CPUs off and on.  CPUs
1405           can be controlled through /sys/devices/system/cpu.
1406
1407 config LOCAL_TIMERS
1408         bool "Use local timer interrupts"
1409         depends on SMP
1410         default y
1411         select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1412         help
1413           Enable support for local timers on SMP platforms, rather then the
1414           legacy IPI broadcast method.  Local timers allows the system
1415           accounting to be spread across the timer interval, preventing a
1416           "thundering herd" at every timer tick.
1417
1418 source kernel/Kconfig.preempt
1419
1420 config HZ
1421         int
1422         default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1423                 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
1424         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1425         default AT91_TIMER_HZ if ARCH_AT91
1426         default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1427         default 100
1428
1429 config THUMB2_KERNEL
1430         bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1431         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1432         select AEABI
1433         select ARM_ASM_UNIFIED
1434         help
1435           By enabling this option, the kernel will be compiled in
1436           Thumb-2 mode. A compiler/assembler that understand the unified
1437           ARM-Thumb syntax is needed.
1438
1439           If unsure, say N.
1440
1441 config THUMB2_AVOID_R_ARM_THM_JUMP11
1442         bool "Work around buggy Thumb-2 short branch relocations in gas"
1443         depends on THUMB2_KERNEL && MODULES
1444         default y
1445         help
1446           Various binutils versions can resolve Thumb-2 branches to
1447           locally-defined, preemptible global symbols as short-range "b.n"
1448           branch instructions.
1449
1450           This is a problem, because there's no guarantee the final
1451           destination of the symbol, or any candidate locations for a
1452           trampoline, are within range of the branch.  For this reason, the
1453           kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1454           relocation in modules at all, and it makes little sense to add
1455           support.
1456
1457           The symptom is that the kernel fails with an "unsupported
1458           relocation" error when loading some modules.
1459
1460           Until fixed tools are available, passing
1461           -fno-optimize-sibling-calls to gcc should prevent gcc generating
1462           code which hits this problem, at the cost of a bit of extra runtime
1463           stack usage in some cases.
1464
1465           The problem is described in more detail at:
1466               https://bugs.launchpad.net/binutils-linaro/+bug/725126
1467
1468           Only Thumb-2 kernels are affected.
1469
1470           Unless you are sure your tools don't have this problem, say Y.
1471
1472 config ARM_ASM_UNIFIED
1473         bool
1474
1475 config AEABI
1476         bool "Use the ARM EABI to compile the kernel"
1477         help
1478           This option allows for the kernel to be compiled using the latest
1479           ARM ABI (aka EABI).  This is only useful if you are using a user
1480           space environment that is also compiled with EABI.
1481
1482           Since there are major incompatibilities between the legacy ABI and
1483           EABI, especially with regard to structure member alignment, this
1484           option also changes the kernel syscall calling convention to
1485           disambiguate both ABIs and allow for backward compatibility support
1486           (selected with CONFIG_OABI_COMPAT).
1487
1488           To use this you need GCC version 4.0.0 or later.
1489
1490 config OABI_COMPAT
1491         bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1492         depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1493         default y
1494         help
1495           This option preserves the old syscall interface along with the
1496           new (ARM EABI) one. It also provides a compatibility layer to
1497           intercept syscalls that have structure arguments which layout
1498           in memory differs between the legacy ABI and the new ARM EABI
1499           (only for non "thumb" binaries). This option adds a tiny
1500           overhead to all syscalls and produces a slightly larger kernel.
1501           If you know you'll be using only pure EABI user space then you
1502           can say N here. If this option is not selected and you attempt
1503           to execute a legacy ABI binary then the result will be
1504           UNPREDICTABLE (in fact it can be predicted that it won't work
1505           at all). If in doubt say Y.
1506
1507 config ARCH_HAS_HOLES_MEMORYMODEL
1508         bool
1509
1510 config ARCH_SPARSEMEM_ENABLE
1511         bool
1512
1513 config ARCH_SPARSEMEM_DEFAULT
1514         def_bool ARCH_SPARSEMEM_ENABLE
1515
1516 config ARCH_SELECT_MEMORY_MODEL
1517         def_bool ARCH_SPARSEMEM_ENABLE
1518
1519 config HIGHMEM
1520         bool "High Memory Support"
1521         depends on MMU
1522         help
1523           The address space of ARM processors is only 4 Gigabytes large
1524           and it has to accommodate user address space, kernel address
1525           space as well as some memory mapped IO. That means that, if you
1526           have a large amount of physical memory and/or IO, not all of the
1527           memory can be "permanently mapped" by the kernel. The physical
1528           memory that is not permanently mapped is called "high memory".
1529
1530           Depending on the selected kernel/user memory split, minimum
1531           vmalloc space and actual amount of RAM, you may not need this
1532           option which should result in a slightly faster kernel.
1533
1534           If unsure, say n.
1535
1536 config HIGHPTE
1537         bool "Allocate 2nd-level pagetables from highmem"
1538         depends on HIGHMEM
1539
1540 config HW_PERF_EVENTS
1541         bool "Enable hardware performance counter support for perf events"
1542         depends on PERF_EVENTS && CPU_HAS_PMU
1543         default y
1544         help
1545           Enable hardware performance counter support for perf events. If
1546           disabled, perf events will use software events only.
1547
1548 source "mm/Kconfig"
1549
1550 config FORCE_MAX_ZONEORDER
1551         int "Maximum zone order" if ARCH_SHMOBILE
1552         range 11 64 if ARCH_SHMOBILE
1553         default "9" if SA1111
1554         default "11"
1555         help
1556           The kernel memory allocator divides physically contiguous memory
1557           blocks into "zones", where each zone is a power of two number of
1558           pages.  This option selects the largest power of two that the kernel
1559           keeps in the memory allocator.  If you need to allocate very large
1560           blocks of physically contiguous memory, then you may need to
1561           increase this value.
1562
1563           This config option is actually maximum order plus one. For example,
1564           a value of 11 means that the largest free memory block is 2^10 pages.
1565
1566 config LEDS
1567         bool "Timer and CPU usage LEDs"
1568         depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1569                    ARCH_EBSA285 || ARCH_INTEGRATOR || \
1570                    ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1571                    ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1572                    ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1573                    ARCH_AT91 || ARCH_DAVINCI || \
1574                    ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1575         help
1576           If you say Y here, the LEDs on your machine will be used
1577           to provide useful information about your current system status.
1578
1579           If you are compiling a kernel for a NetWinder or EBSA-285, you will
1580           be able to select which LEDs are active using the options below. If
1581           you are compiling a kernel for the EBSA-110 or the LART however, the
1582           red LED will simply flash regularly to indicate that the system is
1583           still functional. It is safe to say Y here if you have a CATS
1584           system, but the driver will do nothing.
1585
1586 config LEDS_TIMER
1587         bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1588                             OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1589                             || MACH_OMAP_PERSEUS2
1590         depends on LEDS
1591         depends on !GENERIC_CLOCKEVENTS
1592         default y if ARCH_EBSA110
1593         help
1594           If you say Y here, one of the system LEDs (the green one on the
1595           NetWinder, the amber one on the EBSA285, or the red one on the LART)
1596           will flash regularly to indicate that the system is still
1597           operational. This is mainly useful to kernel hackers who are
1598           debugging unstable kernels.
1599
1600           The LART uses the same LED for both Timer LED and CPU usage LED
1601           functions. You may choose to use both, but the Timer LED function
1602           will overrule the CPU usage LED.
1603
1604 config LEDS_CPU
1605         bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1606                         !ARCH_OMAP) \
1607                         || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1608                         || MACH_OMAP_PERSEUS2
1609         depends on LEDS
1610         help
1611           If you say Y here, the red LED will be used to give a good real
1612           time indication of CPU usage, by lighting whenever the idle task
1613           is not currently executing.
1614
1615           The LART uses the same LED for both Timer LED and CPU usage LED
1616           functions. You may choose to use both, but the Timer LED function
1617           will overrule the CPU usage LED.
1618
1619 config ALIGNMENT_TRAP
1620         bool
1621         depends on CPU_CP15_MMU
1622         default y if !ARCH_EBSA110
1623         select HAVE_PROC_CPU if PROC_FS
1624         help
1625           ARM processors cannot fetch/store information which is not
1626           naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1627           address divisible by 4. On 32-bit ARM processors, these non-aligned
1628           fetch/store instructions will be emulated in software if you say
1629           here, which has a severe performance impact. This is necessary for
1630           correct operation of some network protocols. With an IP-only
1631           configuration it is safe to say N, otherwise say Y.
1632
1633 config UACCESS_WITH_MEMCPY
1634         bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1635         depends on MMU && EXPERIMENTAL
1636         default y if CPU_FEROCEON
1637         help
1638           Implement faster copy_to_user and clear_user methods for CPU
1639           cores where a 8-word STM instruction give significantly higher
1640           memory write throughput than a sequence of individual 32bit stores.
1641
1642           A possible side effect is a slight increase in scheduling latency
1643           between threads sharing the same address space if they invoke
1644           such copy operations with large buffers.
1645
1646           However, if the CPU data cache is using a write-allocate mode,
1647           this option is unlikely to provide any performance gain.
1648
1649 config SECCOMP
1650         bool
1651         prompt "Enable seccomp to safely compute untrusted bytecode"
1652         ---help---
1653           This kernel feature is useful for number crunching applications
1654           that may need to compute untrusted bytecode during their
1655           execution. By using pipes or other transports made available to
1656           the process as file descriptors supporting the read/write
1657           syscalls, it's possible to isolate those applications in
1658           their own address space using seccomp. Once seccomp is
1659           enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1660           and the task is only allowed to execute a few safe syscalls
1661           defined by each seccomp mode.
1662
1663 config CC_STACKPROTECTOR
1664         bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1665         depends on EXPERIMENTAL
1666         help
1667           This option turns on the -fstack-protector GCC feature. This
1668           feature puts, at the beginning of functions, a canary value on
1669           the stack just before the return address, and validates
1670           the value just before actually returning.  Stack based buffer
1671           overflows (that need to overwrite this return address) now also
1672           overwrite the canary, which gets detected and the attack is then
1673           neutralized via a kernel panic.
1674           This feature requires gcc version 4.2 or above.
1675
1676 config DEPRECATED_PARAM_STRUCT
1677         bool "Provide old way to pass kernel parameters"
1678         help
1679           This was deprecated in 2001 and announced to live on for 5 years.
1680           Some old boot loaders still use this way.
1681
1682 endmenu
1683
1684 menu "Boot options"
1685
1686 # Compressed boot loader in ROM.  Yes, we really want to ask about
1687 # TEXT and BSS so we preserve their values in the config files.
1688 config ZBOOT_ROM_TEXT
1689         hex "Compressed ROM boot loader base address"
1690         default "0"
1691         help
1692           The physical address at which the ROM-able zImage is to be
1693           placed in the target.  Platforms which normally make use of
1694           ROM-able zImage formats normally set this to a suitable
1695           value in their defconfig file.
1696
1697           If ZBOOT_ROM is not enabled, this has no effect.
1698
1699 config ZBOOT_ROM_BSS
1700         hex "Compressed ROM boot loader BSS address"
1701         default "0"
1702         help
1703           The base address of an area of read/write memory in the target
1704           for the ROM-able zImage which must be available while the
1705           decompressor is running. It must be large enough to hold the
1706           entire decompressed kernel plus an additional 128 KiB.
1707           Platforms which normally make use of ROM-able zImage formats
1708           normally set this to a suitable value in their defconfig file.
1709
1710           If ZBOOT_ROM is not enabled, this has no effect.
1711
1712 config ZBOOT_ROM
1713         bool "Compressed boot loader in ROM/flash"
1714         depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1715         help
1716           Say Y here if you intend to execute your compressed kernel image
1717           (zImage) directly from ROM or flash.  If unsure, say N.
1718
1719 config ZBOOT_ROM_MMCIF
1720         bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1721         depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1722         help
1723           Say Y here to include experimental MMCIF loading code in the
1724           ROM-able zImage. With this enabled it is possible to write the
1725           the ROM-able zImage kernel image to an MMC card and boot the
1726           kernel straight from the reset vector. At reset the processor
1727           Mask ROM will load the first part of the the ROM-able zImage
1728           which in turn loads the rest the kernel image to RAM using the
1729           MMCIF hardware block.
1730
1731 config CMDLINE
1732         string "Default kernel command string"
1733         default ""
1734         help
1735           On some architectures (EBSA110 and CATS), there is currently no way
1736           for the boot loader to pass arguments to the kernel. For these
1737           architectures, you should supply some command-line options at build
1738           time by entering them here. As a minimum, you should specify the
1739           memory size and the root device (e.g., mem=64M root=/dev/nfs).
1740
1741 choice
1742         prompt "Kernel command line type" if CMDLINE != ""
1743         default CMDLINE_FROM_BOOTLOADER
1744
1745 config CMDLINE_FROM_BOOTLOADER
1746         bool "Use bootloader kernel arguments if available"
1747         help
1748           Uses the command-line options passed by the boot loader. If
1749           the boot loader doesn't provide any, the default kernel command
1750           string provided in CMDLINE will be used.
1751
1752 config CMDLINE_EXTEND
1753         bool "Extend bootloader kernel arguments"
1754         help
1755           The command-line arguments provided by the boot loader will be
1756           appended to the default kernel command string.
1757
1758 config CMDLINE_FORCE
1759         bool "Always use the default kernel command string"
1760         help
1761           Always use the default kernel command string, even if the boot
1762           loader passes other arguments to the kernel.
1763           This is useful if you cannot or don't want to change the
1764           command-line options your boot loader passes to the kernel.
1765 endchoice
1766
1767 config XIP_KERNEL
1768         bool "Kernel Execute-In-Place from ROM"
1769         depends on !ZBOOT_ROM
1770         help
1771           Execute-In-Place allows the kernel to run from non-volatile storage
1772           directly addressable by the CPU, such as NOR flash. This saves RAM
1773           space since the text section of the kernel is not loaded from flash
1774           to RAM.  Read-write sections, such as the data section and stack,
1775           are still copied to RAM.  The XIP kernel is not compressed since
1776           it has to run directly from flash, so it will take more space to
1777           store it.  The flash address used to link the kernel object files,
1778           and for storing it, is configuration dependent. Therefore, if you
1779           say Y here, you must know the proper physical address where to
1780           store the kernel image depending on your own flash memory usage.
1781
1782           Also note that the make target becomes "make xipImage" rather than
1783           "make zImage" or "make Image".  The final kernel binary to put in
1784           ROM memory will be arch/arm/boot/xipImage.
1785
1786           If unsure, say N.
1787
1788 config XIP_PHYS_ADDR
1789         hex "XIP Kernel Physical Location"
1790         depends on XIP_KERNEL
1791         default "0x00080000"
1792         help
1793           This is the physical address in your flash memory the kernel will
1794           be linked for and stored to.  This address is dependent on your
1795           own flash usage.
1796
1797 config KEXEC
1798         bool "Kexec system call (EXPERIMENTAL)"
1799         depends on EXPERIMENTAL
1800         help
1801           kexec is a system call that implements the ability to shutdown your
1802           current kernel, and to start another kernel.  It is like a reboot
1803           but it is independent of the system firmware.   And like a reboot
1804           you can start any kernel with it, not just Linux.
1805
1806           It is an ongoing process to be certain the hardware in a machine
1807           is properly shutdown, so do not be surprised if this code does not
1808           initially work for you.  It may help to enable device hotplugging
1809           support.
1810
1811 config ATAGS_PROC
1812         bool "Export atags in procfs"
1813         depends on KEXEC
1814         default y
1815         help
1816           Should the atags used to boot the kernel be exported in an "atags"
1817           file in procfs. Useful with kexec.
1818
1819 config CRASH_DUMP
1820         bool "Build kdump crash kernel (EXPERIMENTAL)"
1821         depends on EXPERIMENTAL
1822         help
1823           Generate crash dump after being started by kexec. This should
1824           be normally only set in special crash dump kernels which are
1825           loaded in the main kernel with kexec-tools into a specially
1826           reserved region and then later executed after a crash by
1827           kdump/kexec. The crash dump kernel must be compiled to a
1828           memory address not used by the main kernel
1829
1830           For more details see Documentation/kdump/kdump.txt
1831
1832 config AUTO_ZRELADDR
1833         bool "Auto calculation of the decompressed kernel image address"
1834         depends on !ZBOOT_ROM && !ARCH_U300
1835         help
1836           ZRELADDR is the physical address where the decompressed kernel
1837           image will be placed. If AUTO_ZRELADDR is selected, the address
1838           will be determined at run-time by masking the current IP with
1839           0xf8000000. This assumes the zImage being placed in the first 128MB
1840           from start of memory.
1841
1842 endmenu
1843
1844 menu "CPU Power Management"
1845
1846 if ARCH_HAS_CPUFREQ
1847
1848 source "drivers/cpufreq/Kconfig"
1849
1850 config CPU_FREQ_IMX
1851         tristate "CPUfreq driver for i.MX CPUs"
1852         depends on ARCH_MXC && CPU_FREQ
1853         help
1854           This enables the CPUfreq driver for i.MX CPUs.
1855
1856 config CPU_FREQ_SA1100
1857         bool
1858
1859 config CPU_FREQ_SA1110
1860         bool
1861
1862 config CPU_FREQ_INTEGRATOR
1863         tristate "CPUfreq driver for ARM Integrator CPUs"
1864         depends on ARCH_INTEGRATOR && CPU_FREQ
1865         default y
1866         help
1867           This enables the CPUfreq driver for ARM Integrator CPUs.
1868
1869           For details, take a look at <file:Documentation/cpu-freq>.
1870
1871           If in doubt, say Y.
1872
1873 config CPU_FREQ_PXA
1874         bool
1875         depends on CPU_FREQ && ARCH_PXA && PXA25x
1876         default y
1877         select CPU_FREQ_DEFAULT_GOV_USERSPACE
1878
1879 config CPU_FREQ_S3C64XX
1880         bool "CPUfreq support for Samsung S3C64XX CPUs"
1881         depends on CPU_FREQ && CPU_S3C6410
1882
1883 config CPU_FREQ_S3C
1884         bool
1885         help
1886           Internal configuration node for common cpufreq on Samsung SoC
1887
1888 config CPU_FREQ_S3C24XX
1889         bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1890         depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1891         select CPU_FREQ_S3C
1892         help
1893           This enables the CPUfreq driver for the Samsung S3C24XX family
1894           of CPUs.
1895
1896           For details, take a look at <file:Documentation/cpu-freq>.
1897
1898           If in doubt, say N.
1899
1900 config CPU_FREQ_S3C24XX_PLL
1901         bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1902         depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1903         help
1904           Compile in support for changing the PLL frequency from the
1905           S3C24XX series CPUfreq driver. The PLL takes time to settle
1906           after a frequency change, so by default it is not enabled.
1907
1908           This also means that the PLL tables for the selected CPU(s) will
1909           be built which may increase the size of the kernel image.
1910
1911 config CPU_FREQ_S3C24XX_DEBUG
1912         bool "Debug CPUfreq Samsung driver core"
1913         depends on CPU_FREQ_S3C24XX
1914         help
1915           Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1916
1917 config CPU_FREQ_S3C24XX_IODEBUG
1918         bool "Debug CPUfreq Samsung driver IO timing"
1919         depends on CPU_FREQ_S3C24XX
1920         help
1921           Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1922
1923 config CPU_FREQ_S3C24XX_DEBUGFS
1924         bool "Export debugfs for CPUFreq"
1925         depends on CPU_FREQ_S3C24XX && DEBUG_FS
1926         help
1927           Export status information via debugfs.
1928
1929 endif
1930
1931 source "drivers/cpuidle/Kconfig"
1932
1933 endmenu
1934
1935 menu "Floating point emulation"
1936
1937 comment "At least one emulation must be selected"
1938
1939 config FPE_NWFPE
1940         bool "NWFPE math emulation"
1941         depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1942         ---help---
1943           Say Y to include the NWFPE floating point emulator in the kernel.
1944           This is necessary to run most binaries. Linux does not currently
1945           support floating point hardware so you need to say Y here even if
1946           your machine has an FPA or floating point co-processor podule.
1947
1948           You may say N here if you are going to load the Acorn FPEmulator
1949           early in the bootup.
1950
1951 config FPE_NWFPE_XP
1952         bool "Support extended precision"
1953         depends on FPE_NWFPE
1954         help
1955           Say Y to include 80-bit support in the kernel floating-point
1956           emulator.  Otherwise, only 32 and 64-bit support is compiled in.
1957           Note that gcc does not generate 80-bit operations by default,
1958           so in most cases this option only enlarges the size of the
1959           floating point emulator without any good reason.
1960
1961           You almost surely want to say N here.
1962
1963 config FPE_FASTFPE
1964         bool "FastFPE math emulation (EXPERIMENTAL)"
1965         depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1966         ---help---
1967           Say Y here to include the FAST floating point emulator in the kernel.
1968           This is an experimental much faster emulator which now also has full
1969           precision for the mantissa.  It does not support any exceptions.
1970           It is very simple, and approximately 3-6 times faster than NWFPE.
1971
1972           It should be sufficient for most programs.  It may be not suitable
1973           for scientific calculations, but you have to check this for yourself.
1974           If you do not feel you need a faster FP emulation you should better
1975           choose NWFPE.
1976
1977 config VFP
1978         bool "VFP-format floating point maths"
1979         depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1980         help
1981           Say Y to include VFP support code in the kernel. This is needed
1982           if your hardware includes a VFP unit.
1983
1984           Please see <file:Documentation/arm/VFP/release-notes.txt> for
1985           release notes and additional status information.
1986
1987           Say N if your target does not have VFP hardware.
1988
1989 config VFPv3
1990         bool
1991         depends on VFP
1992         default y if CPU_V7
1993
1994 config NEON
1995         bool "Advanced SIMD (NEON) Extension support"
1996         depends on VFPv3 && CPU_V7
1997         help
1998           Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1999           Extension.
2000
2001 endmenu
2002
2003 menu "Userspace binary formats"
2004
2005 source "fs/Kconfig.binfmt"
2006
2007 config ARTHUR
2008         tristate "RISC OS personality"
2009         depends on !AEABI
2010         help
2011           Say Y here to include the kernel code necessary if you want to run
2012           Acorn RISC OS/Arthur binaries under Linux. This code is still very
2013           experimental; if this sounds frightening, say N and sleep in peace.
2014           You can also say M here to compile this support as a module (which
2015           will be called arthur).
2016
2017 endmenu
2018
2019 menu "Power management options"
2020
2021 source "kernel/power/Kconfig"
2022
2023 config ARCH_SUSPEND_POSSIBLE
2024         depends on !ARCH_S5P64X0 && !ARCH_S5P6442 && !ARCH_S5PC100
2025         depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2026                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2027         def_bool y
2028
2029 endmenu
2030
2031 source "net/Kconfig"
2032
2033 source "drivers/Kconfig"
2034
2035 source "fs/Kconfig"
2036
2037 source "arch/arm/Kconfig.debug"
2038
2039 source "security/Kconfig"
2040
2041 source "crypto/Kconfig"
2042
2043 source "lib/Kconfig"