2 * Copyright (C) 2015 Phytec Messtechnik GmbH
3 * Author: Teresa Remmet <t.remmet@phytec.de>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 model = "Phytec AM335x phyBOARD-WEGA";
12 compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
15 compatible = "simple-bus";
17 vcc3v3: fixedregulator@1 {
18 compatible = "regulator-fixed";
19 regulator-name = "vcc3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
29 dcan1_pins: pinmux_dcan1 {
30 pinctrl-single,pins = <
31 AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
32 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
38 pinctrl-names = "default";
39 pinctrl-0 = <&dcan1_pins>;
45 ethernet1_pins: pinmux_ethernet1 {
46 pinctrl-single,pins = <
47 AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* gpmc_a0.mii2_txen */
48 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a1.mii2_rxdv */
49 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* gpmc_a2.mii2_txd3 */
50 AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* gpmc_a3.mii2_txd2 */
51 AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* gpmc_a4.mii2_txd1 */
52 AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* gpmc_a5.mii2_txd0 */
53 AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a6.mii2_txclk */
54 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a7.mii2_rxclk */
55 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
56 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
57 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
58 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
59 AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
60 AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE1) /* gpmc_ben1.mii2_col */
66 phy_id = <&davinci_mdio>, <1>;
68 dual_emac_res_vlan = <2>;
73 pinctrl-names = "default";
74 pinctrl-0 = <ðernet0_pins ðernet1_pins>;
80 mmc1_pins: pinmux_mmc1 {
81 pinctrl-single,pins = <
82 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
83 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
84 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
85 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
86 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
87 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
88 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
94 vmmc-supply = <&vcc3v3>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&mmc1_pins>;
98 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
104 uart0_pins: pinmux_uart0 {
105 pinctrl-single,pins = <
106 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
107 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
111 uart1_pins: pinmux_uart1_pins {
112 pinctrl-single,pins = <
113 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
114 AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
115 AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
116 AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
122 pinctrl-names = "default";
123 pinctrl-0 = <&uart0_pins>;
128 pinctrl-names = "default";
129 pinctrl-0 = <&uart1_pins>;
147 dr_mode = "peripheral";