2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "pinctrl-single";
62 reg = <0x44e10800 0x31c>;
65 pinctrl-single,register-width = <32>;
66 pinctrl-single,function-mask = <0xffffffff>;
70 compatible = "ti,am4372-l3-noc", "simple-bus";
74 ti,hwmods = "l3_main";
75 reg = <0x44000000 0x400000
77 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
78 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
81 compatible = "ti,am4-prcm";
82 reg = <0x44df0000 0x11000>;
89 prcm_clockdomains: clockdomains {
94 compatible = "ti,am4-scrm";
95 reg = <0x44e10000 0x2000>;
102 scrm_clockdomains: clockdomains {
106 edma: edma@49000000 {
107 compatible = "ti,edma3";
108 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
109 reg = <0x49000000 0x10000>,
111 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
112 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
113 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
117 uart0: serial@44e09000 {
118 compatible = "ti,am4372-uart","ti,omap2-uart";
119 reg = <0x44e09000 0x2000>;
120 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
124 uart1: serial@48022000 {
125 compatible = "ti,am4372-uart","ti,omap2-uart";
126 reg = <0x48022000 0x2000>;
127 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
132 uart2: serial@48024000 {
133 compatible = "ti,am4372-uart","ti,omap2-uart";
134 reg = <0x48024000 0x2000>;
135 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
140 uart3: serial@481a6000 {
141 compatible = "ti,am4372-uart","ti,omap2-uart";
142 reg = <0x481a6000 0x2000>;
143 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
148 uart4: serial@481a8000 {
149 compatible = "ti,am4372-uart","ti,omap2-uart";
150 reg = <0x481a8000 0x2000>;
151 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
156 uart5: serial@481aa000 {
157 compatible = "ti,am4372-uart","ti,omap2-uart";
158 reg = <0x481aa000 0x2000>;
159 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
164 mailbox: mailbox@480C8000 {
165 compatible = "ti,omap4-mailbox";
166 reg = <0x480C8000 0x200>;
167 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
168 ti,hwmods = "mailbox";
169 ti,mbox-num-users = <4>;
170 ti,mbox-num-fifos = <8>;
173 timer1: timer@44e31000 {
174 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
175 reg = <0x44e31000 0x400>;
176 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
178 ti,hwmods = "timer1";
181 timer2: timer@48040000 {
182 compatible = "ti,am4372-timer","ti,am335x-timer";
183 reg = <0x48040000 0x400>;
184 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
185 ti,hwmods = "timer2";
188 timer3: timer@48042000 {
189 compatible = "ti,am4372-timer","ti,am335x-timer";
190 reg = <0x48042000 0x400>;
191 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
192 ti,hwmods = "timer3";
196 timer4: timer@48044000 {
197 compatible = "ti,am4372-timer","ti,am335x-timer";
198 reg = <0x48044000 0x400>;
199 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
201 ti,hwmods = "timer4";
205 timer5: timer@48046000 {
206 compatible = "ti,am4372-timer","ti,am335x-timer";
207 reg = <0x48046000 0x400>;
208 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
210 ti,hwmods = "timer5";
214 timer6: timer@48048000 {
215 compatible = "ti,am4372-timer","ti,am335x-timer";
216 reg = <0x48048000 0x400>;
217 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
219 ti,hwmods = "timer6";
223 timer7: timer@4804a000 {
224 compatible = "ti,am4372-timer","ti,am335x-timer";
225 reg = <0x4804a000 0x400>;
226 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
228 ti,hwmods = "timer7";
232 timer8: timer@481c1000 {
233 compatible = "ti,am4372-timer","ti,am335x-timer";
234 reg = <0x481c1000 0x400>;
235 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
236 ti,hwmods = "timer8";
240 timer9: timer@4833d000 {
241 compatible = "ti,am4372-timer","ti,am335x-timer";
242 reg = <0x4833d000 0x400>;
243 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
244 ti,hwmods = "timer9";
248 timer10: timer@4833f000 {
249 compatible = "ti,am4372-timer","ti,am335x-timer";
250 reg = <0x4833f000 0x400>;
251 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
252 ti,hwmods = "timer10";
256 timer11: timer@48341000 {
257 compatible = "ti,am4372-timer","ti,am335x-timer";
258 reg = <0x48341000 0x400>;
259 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
260 ti,hwmods = "timer11";
264 counter32k: counter@44e86000 {
265 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
266 reg = <0x44e86000 0x40>;
267 ti,hwmods = "counter_32k";
271 compatible = "ti,am4372-rtc","ti,da830-rtc";
272 reg = <0x44e3e000 0x1000>;
273 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
274 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
280 compatible = "ti,am4372-wdt","ti,omap3-wdt";
281 reg = <0x44e35000 0x1000>;
282 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
283 ti,hwmods = "wd_timer2";
286 gpio0: gpio@44e07000 {
287 compatible = "ti,am4372-gpio","ti,omap4-gpio";
288 reg = <0x44e07000 0x1000>;
289 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
292 interrupt-controller;
293 #interrupt-cells = <2>;
298 gpio1: gpio@4804c000 {
299 compatible = "ti,am4372-gpio","ti,omap4-gpio";
300 reg = <0x4804c000 0x1000>;
301 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
304 interrupt-controller;
305 #interrupt-cells = <2>;
310 gpio2: gpio@481ac000 {
311 compatible = "ti,am4372-gpio","ti,omap4-gpio";
312 reg = <0x481ac000 0x1000>;
313 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
316 interrupt-controller;
317 #interrupt-cells = <2>;
322 gpio3: gpio@481ae000 {
323 compatible = "ti,am4372-gpio","ti,omap4-gpio";
324 reg = <0x481ae000 0x1000>;
325 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
328 interrupt-controller;
329 #interrupt-cells = <2>;
334 gpio4: gpio@48320000 {
335 compatible = "ti,am4372-gpio","ti,omap4-gpio";
336 reg = <0x48320000 0x1000>;
337 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
340 interrupt-controller;
341 #interrupt-cells = <2>;
346 gpio5: gpio@48322000 {
347 compatible = "ti,am4372-gpio","ti,omap4-gpio";
348 reg = <0x48322000 0x1000>;
349 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
352 interrupt-controller;
353 #interrupt-cells = <2>;
358 hwspinlock: spinlock@480ca000 {
359 compatible = "ti,omap4-hwspinlock";
360 reg = <0x480ca000 0x1000>;
361 ti,hwmods = "spinlock";
366 compatible = "ti,am4372-i2c","ti,omap4-i2c";
367 reg = <0x44e0b000 0x1000>;
368 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
370 #address-cells = <1>;
376 compatible = "ti,am4372-i2c","ti,omap4-i2c";
377 reg = <0x4802a000 0x1000>;
378 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
380 #address-cells = <1>;
386 compatible = "ti,am4372-i2c","ti,omap4-i2c";
387 reg = <0x4819c000 0x1000>;
388 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
390 #address-cells = <1>;
396 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
397 reg = <0x48030000 0x400>;
398 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
400 #address-cells = <1>;
406 compatible = "ti,omap4-hsmmc";
407 reg = <0x48060000 0x1000>;
410 ti,needs-special-reset;
413 dma-names = "tx", "rx";
414 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
419 compatible = "ti,omap4-hsmmc";
420 reg = <0x481d8000 0x1000>;
422 ti,needs-special-reset;
425 dma-names = "tx", "rx";
426 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
431 compatible = "ti,omap4-hsmmc";
432 reg = <0x47810000 0x1000>;
434 ti,needs-special-reset;
435 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
440 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
441 reg = <0x481a0000 0x400>;
442 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
444 #address-cells = <1>;
450 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
451 reg = <0x481a2000 0x400>;
452 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
454 #address-cells = <1>;
460 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
461 reg = <0x481a4000 0x400>;
462 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
464 #address-cells = <1>;
470 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
471 reg = <0x48345000 0x400>;
472 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
474 #address-cells = <1>;
479 mac: ethernet@4a100000 {
480 compatible = "ti,am4372-cpsw","ti,cpsw";
481 reg = <0x4a100000 0x800
483 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
484 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
485 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
486 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
487 #address-cells = <1>;
489 ti,hwmods = "cpgmac0";
490 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
491 clock-names = "fck", "cpts";
493 cpdma_channels = <8>;
494 ale_entries = <1024>;
495 bd_ram_size = <0x2000>;
498 mac_control = <0x20>;
501 cpts_clock_mult = <0x80000000>;
502 cpts_clock_shift = <29>;
505 davinci_mdio: mdio@4a101000 {
506 compatible = "ti,am4372-mdio","ti,davinci_mdio";
507 reg = <0x4a101000 0x100>;
508 #address-cells = <1>;
510 ti,hwmods = "davinci_mdio";
511 bus_freq = <1000000>;
515 cpsw_emac0: slave@4a100200 {
516 /* Filled in by U-Boot */
517 mac-address = [ 00 00 00 00 00 00 ];
520 cpsw_emac1: slave@4a100300 {
521 /* Filled in by U-Boot */
522 mac-address = [ 00 00 00 00 00 00 ];
525 phy_sel: cpsw-phy-sel@44e10650 {
526 compatible = "ti,am43xx-cpsw-phy-sel";
527 reg= <0x44e10650 0x4>;
528 reg-names = "gmii-sel";
532 epwmss0: epwmss@48300000 {
533 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
534 reg = <0x48300000 0x10>;
535 #address-cells = <1>;
538 ti,hwmods = "epwmss0";
541 ecap0: ecap@48300100 {
542 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
544 reg = <0x48300100 0x80>;
549 ehrpwm0: ehrpwm@48300200 {
550 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
552 reg = <0x48300200 0x80>;
553 ti,hwmods = "ehrpwm0";
558 epwmss1: epwmss@48302000 {
559 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
560 reg = <0x48302000 0x10>;
561 #address-cells = <1>;
564 ti,hwmods = "epwmss1";
567 ecap1: ecap@48302100 {
568 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
570 reg = <0x48302100 0x80>;
575 ehrpwm1: ehrpwm@48302200 {
576 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
578 reg = <0x48302200 0x80>;
579 ti,hwmods = "ehrpwm1";
584 epwmss2: epwmss@48304000 {
585 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
586 reg = <0x48304000 0x10>;
587 #address-cells = <1>;
590 ti,hwmods = "epwmss2";
593 ecap2: ecap@48304100 {
594 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
596 reg = <0x48304100 0x80>;
601 ehrpwm2: ehrpwm@48304200 {
602 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
604 reg = <0x48304200 0x80>;
605 ti,hwmods = "ehrpwm2";
610 epwmss3: epwmss@48306000 {
611 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
612 reg = <0x48306000 0x10>;
613 #address-cells = <1>;
616 ti,hwmods = "epwmss3";
619 ehrpwm3: ehrpwm@48306200 {
620 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
622 reg = <0x48306200 0x80>;
623 ti,hwmods = "ehrpwm3";
628 epwmss4: epwmss@48308000 {
629 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
630 reg = <0x48308000 0x10>;
631 #address-cells = <1>;
634 ti,hwmods = "epwmss4";
637 ehrpwm4: ehrpwm@48308200 {
638 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
640 reg = <0x48308200 0x80>;
641 ti,hwmods = "ehrpwm4";
646 epwmss5: epwmss@4830a000 {
647 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
648 reg = <0x4830a000 0x10>;
649 #address-cells = <1>;
652 ti,hwmods = "epwmss5";
655 ehrpwm5: ehrpwm@4830a200 {
656 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
658 reg = <0x4830a200 0x80>;
659 ti,hwmods = "ehrpwm5";
664 sham: sham@53100000 {
665 compatible = "ti,omap5-sham";
667 reg = <0x53100000 0x300>;
670 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
674 compatible = "ti,omap4-aes";
676 reg = <0x53501000 0xa0>;
677 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
680 dma-names = "tx", "rx";
684 compatible = "ti,omap4-des";
686 reg = <0x53701000 0xa0>;
687 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
690 dma-names = "tx", "rx";
693 mcasp0: mcasp@48038000 {
694 compatible = "ti,am33xx-mcasp-audio";
695 ti,hwmods = "mcasp0";
696 reg = <0x48038000 0x2000>,
697 <0x46000000 0x400000>;
698 reg-names = "mpu", "dat";
699 interrupts = <80>, <81>;
700 interrupt-names = "tx", "rx";
704 dma-names = "tx", "rx";
707 mcasp1: mcasp@4803C000 {
708 compatible = "ti,am33xx-mcasp-audio";
709 ti,hwmods = "mcasp1";
710 reg = <0x4803C000 0x2000>,
711 <0x46400000 0x400000>;
712 reg-names = "mpu", "dat";
713 interrupts = <82>, <83>;
714 interrupt-names = "tx", "rx";
718 dma-names = "tx", "rx";
722 compatible = "ti,am3352-elm";
723 reg = <0x48080000 0x2000>;
724 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
726 clocks = <&l4ls_gclk>;
731 gpmc: gpmc@50000000 {
732 compatible = "ti,am3352-gpmc";
734 clocks = <&l3s_gclk>;
736 reg = <0x50000000 0x2000>;
737 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
739 gpmc,num-waitpins = <2>;
740 #address-cells = <2>;
745 am43xx_control_usb2phy1: control-phy@44e10620 {
746 compatible = "ti,control-phy-usb2-am437";
747 reg = <0x44e10620 0x4>;
751 am43xx_control_usb2phy2: control-phy@0x44e10628 {
752 compatible = "ti,control-phy-usb2-am437";
753 reg = <0x44e10628 0x4>;
757 ocp2scp0: ocp2scp@483a8000 {
758 compatible = "ti,omap-ocp2scp";
759 #address-cells = <1>;
762 ti,hwmods = "ocp2scp0";
764 usb2_phy1: phy@483a8000 {
765 compatible = "ti,am437x-usb2";
766 reg = <0x483a8000 0x8000>;
767 ctrl-module = <&am43xx_control_usb2phy1>;
768 clocks = <&usb_phy0_always_on_clk32k>,
769 <&usb_otg_ss0_refclk960m>;
770 clock-names = "wkupclk", "refclk";
776 ocp2scp1: ocp2scp@483e8000 {
777 compatible = "ti,omap-ocp2scp";
778 #address-cells = <1>;
781 ti,hwmods = "ocp2scp1";
783 usb2_phy2: phy@483e8000 {
784 compatible = "ti,am437x-usb2";
785 reg = <0x483e8000 0x8000>;
786 ctrl-module = <&am43xx_control_usb2phy2>;
787 clocks = <&usb_phy1_always_on_clk32k>,
788 <&usb_otg_ss1_refclk960m>;
789 clock-names = "wkupclk", "refclk";
795 dwc3_1: omap_dwc3@48380000 {
796 compatible = "ti,am437x-dwc3";
797 ti,hwmods = "usb_otg_ss0";
798 reg = <0x48380000 0x10000>;
799 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
800 #address-cells = <1>;
806 compatible = "synopsys,dwc3";
807 reg = <0x48390000 0x17000>;
808 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
810 phy-names = "usb2-phy";
811 maximum-speed = "high-speed";
817 dwc3_2: omap_dwc3@483c0000 {
818 compatible = "ti,am437x-dwc3";
819 ti,hwmods = "usb_otg_ss1";
820 reg = <0x483c0000 0x10000>;
821 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
822 #address-cells = <1>;
828 compatible = "synopsys,dwc3";
829 reg = <0x483d0000 0x17000>;
830 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
832 phy-names = "usb2-phy";
833 maximum-speed = "high-speed";
839 qspi: qspi@47900000 {
840 compatible = "ti,am4372-qspi";
841 reg = <0x47900000 0x100>;
842 #address-cells = <1>;
845 interrupts = <0 138 0x4>;
851 compatible = "ti,am43xx-hdq";
852 reg = <0x48347000 0x1000>;
853 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
854 clocks = <&func_12m_clk>;
861 compatible = "ti,omap3-dss";
862 reg = <0x4832a000 0x200>;
864 ti,hwmods = "dss_core";
865 clocks = <&disp_clk>;
867 #address-cells = <1>;
871 dispc: dispc@4832a400 {
872 compatible = "ti,omap3-dispc";
873 reg = <0x4832a400 0x400>;
874 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
875 ti,hwmods = "dss_dispc";
876 clocks = <&disp_clk>;
880 rfbi: rfbi@4832a800 {
881 compatible = "ti,omap3-rfbi";
882 reg = <0x4832a800 0x100>;
883 ti,hwmods = "dss_rfbi";
884 clocks = <&disp_clk>;
891 /include/ "am43xx-clocks.dtsi"