arch/arm/boot/dts/arm-realview-pb1176.dts

   1 /*
   2  * Copyright 2014 Linaro Ltd
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a copy
   5  * of this software and associated documentation files (the "Software"), to deal
   6  * in the Software without restriction, including without limitation the rights
   7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   8  * copies of the Software, and to permit persons to whom the Software is
   9  * furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20  * THE SOFTWARE.
  21  */
  22
  23 /dts-v1/;
  24 #include <dt-bindings/interrupt-controller/irq.h>
  25 #include "skeleton.dtsi"
  26
  27 / {
  28         model = "ARM RealView PB1176";
  29         compatible = "arm,realview-pb1176";
  30
  31         chosen { };
  32
  33         aliases {
  34                 serial0 = &pb1176_serial0;
  35                 serial1 = &pb1176_serial1;
  36                 serial2 = &pb1176_serial2;
  37                 serial3 = &pb1176_serial3;
  38         };
  39
  40         memory {
  41                 /* 128 MiB memory @ 0x0 */
  42                 reg = <0x00000000 0x08000000>;
  43         };
  44
  45         xtal24mhz: xtal24mhz@24M {
  46                 #clock-cells = <0>;
  47                 compatible = "fixed-clock";
  48                 clock-frequency = <24000000>;
  49         };
  50
  51         timclk: timclk@1M {
  52                 #clock-cells = <0>;
  53                 compatible = "fixed-factor-clock";
  54                 clock-div = <24>;
  55                 clock-mult = <1>;
  56                 clocks = <&xtal24mhz>;
  57         };
  58
  59         uartclk: uartclk@24M {
  60                 #clock-cells = <0>;
  61                 compatible = "fixed-factor-clock";
  62                 clock-div = <1>;
  63                 clock-mult = <1>;
  64                 clocks = <&xtal24mhz>;
  65         };
  66
  67         /* FIXME: this actually hangs off the PLL clocks */
  68         pclk: pclk@0 {
  69                 #clock-cells = <0>;
  70                 compatible = "fixed-clock";
  71                 clock-frequency = <0>;
  72         };
  73
  74         soc {
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77                 compatible = "arm,realview-pb1176-soc", "simple-bus";
  78                 regmap = <&syscon>;
  79                 ranges;
  80
  81                 syscon: syscon@10000000 {
  82                         compatible = "arm,realview-pb1176-syscon", "syscon";
  83                         reg = <0x10000000 0x1000>;
  84
  85                         led@08.0 {
  86                                 compatible = "register-bit-led";
  87                                 offset = <0x08>;
  88                                 mask = <0x01>;
  89                                 label = "versatile:0";
  90                                 linux,default-trigger = "heartbeat";
  91                                 default-state = "on";
  92                         };
  93                         led@08.1 {
  94                                 compatible = "register-bit-led";
  95                                 offset = <0x08>;
  96                                 mask = <0x02>;
  97                                 label = "versatile:1";
  98                                 linux,default-trigger = "mmc0";
  99                                 default-state = "off";
 100                         };
 101                         led@08.2 {
 102                                 compatible = "register-bit-led";
 103                                 offset = <0x08>;
 104                                 mask = <0x04>;
 105                                 label = "versatile:2";
 106                                 linux,default-trigger = "cpu0";
 107                                 default-state = "off";
 108                         };
 109                         led@08.3 {
 110                                 compatible = "register-bit-led";
 111                                 offset = <0x08>;
 112                                 mask = <0x08>;
 113                                 label = "versatile:3";
 114                                 default-state = "off";
 115                         };
 116                         led@08.4 {
 117                                 compatible = "register-bit-led";
 118                                 offset = <0x08>;
 119                                 mask = <0x10>;
 120                                 label = "versatile:4";
 121                                 default-state = "off";
 122                         };
 123                         led@08.5 {
 124                                 compatible = "register-bit-led";
 125                                 offset = <0x08>;
 126                                 mask = <0x20>;
 127                                 label = "versatile:5";
 128                                 default-state = "off";
 129                         };
 130                         led@08.6 {
 131                                 compatible = "register-bit-led";
 132                                 offset = <0x08>;
 133                                 mask = <0x40>;
 134                                 label = "versatile:6";
 135                                 default-state = "off";
 136                         };
 137                         led@08.7 {
 138                                 compatible = "register-bit-led";
 139                                 offset = <0x08>;
 140                                 mask = <0x80>;
 141                                 label = "versatile:7";
 142                                 default-state = "off";
 143                         };
 144                 };
 145
 146                 /* Primary DevChip GIC synthesized with the CPU */
 147                 intc_dc1176: interrupt-controller@10120000 {
 148                         compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
 149                         #interrupt-cells = <3>;
 150                         #address-cells = <1>;
 151                         interrupt-controller;
 152                         reg = <0x10121000 0x1000>,
 153                               <0x10120000 0x100>;
 154                 };
 155
 156                 L2: l2-cache {
 157                         compatible = "arm,l220-cache";
 158                         reg = <0x10110000 0x1000>;
 159                         interrupt-parent = <&intc_dc1176>;
 160                         interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
 161                         cache-unified;
 162                         cache-level = <2>;
 163                         /*
 164                          * Override default cache size, sets and
 165                          * associativity as these may be erroneously set
 166                          * up by boot loader(s).
 167                          */
 168                         arm,override-auxreg;
 169                         cache-size = <131072>; // 128kB
 170                         cache-sets = <512>;
 171                         cache-line-size = <32>;
 172                 };
 173
 174                 pmu {
 175                         compatible = "arm,arm1176-pmu";
 176                         interrupt-parent = <&intc_dc1176>;
 177                         interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
 178                 };
 179
 180                 timer01: timer@10104000 {
 181                         compatible = "arm,sp804", "arm,primecell";
 182                         reg = <0x10104000 0x1000>;
 183                         interrupt-parent = <&intc_dc1176>;
 184                         interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>, <0 9 IRQ_TYPE_LEVEL_HIGH>;
 185                         clocks = <&timclk>, <&timclk>, <&pclk>;
 186                         clock-names = "timer1", "timer2", "apb_pclk";
 187                 };
 188
 189                 timer23: timer@10105000 {
 190                         compatible = "arm,sp804", "arm,primecell";
 191                         reg = <0x10105000 0x1000>;
 192                         interrupt-parent = <&intc_dc1176>;
 193                         interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
 194                         arm,sp804-has-irq = <1>;
 195                         clocks = <&timclk>, <&timclk>, <&pclk>;
 196                         clock-names = "timer1", "timer2", "apb_pclk";
 197                 };
 198
 199                 pb1176_serial0: serial@1010c000 {
 200                         compatible = "arm,pl011", "arm,primecell";
 201                         reg = <0x1010c000 0x1000>;
 202                         interrupt-parent = <&intc_dc1176>;
 203                         interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
 204                         clocks = <&uartclk>, <&pclk>;
 205                         clock-names = "uartclk", "apb_pclk";
 206                 };
 207
 208                 pb1176_serial1: serial@1010d000 {
 209                         compatible = "arm,pl011", "arm,primecell";
 210                         reg = <0x1010d000 0x1000>;
 211                         interrupt-parent = <&intc_dc1176>;
 212                         interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
 213                         clocks = <&uartclk>, <&pclk>;
 214                         clock-names = "uartclk", "apb_pclk";
 215                 };
 216
 217                 pb1176_serial2: serial@1010e000 {
 218                         compatible = "arm,pl011", "arm,primecell";
 219                         reg = <0x1010e000 0x1000>;
 220                         interrupt-parent = <&intc_dc1176>;
 221                         interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
 222                         clocks = <&uartclk>, <&pclk>;
 223                         clock-names = "uartclk", "apb_pclk";
 224                 };
 225
 226                 pb1176_serial3: serial@1010f000 {
 227                         compatible = "arm,pl011", "arm,primecell";
 228                         reg = <0x1010f000 0x1000>;
 229                         interrupt-parent = <&intc_dc1176>;
 230                         interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
 231                         clocks = <&uartclk>, <&pclk>;
 232                         clock-names = "uartclk", "apb_pclk";
 233                 };
 234         };
 235
 236         /* These peripherals are inside the FPGA rather than the DevChip */
 237         fpga {
 238                 #address-cells = <1>;
 239                 #size-cells = <1>;
 240                 compatible = "simple-bus";
 241                 ranges;
 242
 243                 /* This GIC on the board is cascaded off the DevChip GIC */
 244                 intc_fpga1176: interrupt-controller@10040000 {
 245                         compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
 246                         #interrupt-cells = <3>;
 247                         #address-cells = <1>;
 248                         interrupt-controller;
 249                         reg = <0x10041000 0x1000>,
 250                               <0x10040000 0x100>;
 251                         interrupt-parent = <&intc_dc1176>;
 252                         interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
 253                 };
 254         };
 255 };