Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[deliverable/linux.git] / arch / arm / boot / dts / armada-370-xp.dtsi
1 /*
2 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 *
15 * This file contains the definitions that are common to the Armada
16 * 370 and Armada XP SoC.
17 */
18
19 /include/ "skeleton64.dtsi"
20
21 / {
22 model = "Marvell Armada 370 and XP SoC";
23 compatible = "marvell,armada-370-xp";
24
25 aliases {
26 eth0 = &eth0;
27 eth1 = &eth1;
28 };
29
30 cpus {
31 #address-cells = <1>;
32 #size-cells = <0>;
33 cpu@0 {
34 compatible = "marvell,sheeva-v7";
35 device_type = "cpu";
36 reg = <0>;
37 };
38 };
39
40 soc {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "simple-bus";
44 interrupt-parent = <&mpic>;
45 ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
46 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
47
48 internal-regs {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 mpic: interrupt-controller@20000 {
55 compatible = "marvell,mpic";
56 #interrupt-cells = <1>;
57 #size-cells = <1>;
58 interrupt-controller;
59 };
60
61 coherency-fabric@20200 {
62 compatible = "marvell,coherency-fabric";
63 reg = <0x20200 0xb0>, <0x21810 0x1c>;
64 };
65
66 serial@12000 {
67 compatible = "snps,dw-apb-uart";
68 reg = <0x12000 0x100>;
69 reg-shift = <2>;
70 interrupts = <41>;
71 reg-io-width = <1>;
72 status = "disabled";
73 };
74 serial@12100 {
75 compatible = "snps,dw-apb-uart";
76 reg = <0x12100 0x100>;
77 reg-shift = <2>;
78 interrupts = <42>;
79 reg-io-width = <1>;
80 status = "disabled";
81 };
82
83 timer@20300 {
84 compatible = "marvell,armada-370-xp-timer";
85 reg = <0x20300 0x30>, <0x21040 0x30>;
86 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
87 clocks = <&coreclk 2>;
88 };
89
90 sata@a0000 {
91 compatible = "marvell,orion-sata";
92 reg = <0xa0000 0x5000>;
93 interrupts = <55>;
94 clocks = <&gateclk 15>, <&gateclk 30>;
95 clock-names = "0", "1";
96 status = "disabled";
97 };
98
99 mdio {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "marvell,orion-mdio";
103 reg = <0x72004 0x4>;
104 };
105
106 eth0: ethernet@70000 {
107 compatible = "marvell,armada-370-neta";
108 reg = <0x70000 0x4000>;
109 interrupts = <8>;
110 clocks = <&gateclk 4>;
111 status = "disabled";
112 };
113
114 eth1: ethernet@74000 {
115 compatible = "marvell,armada-370-neta";
116 reg = <0x74000 0x4000>;
117 interrupts = <10>;
118 clocks = <&gateclk 3>;
119 status = "disabled";
120 };
121
122 i2c0: i2c@11000 {
123 compatible = "marvell,mv64xxx-i2c";
124 reg = <0x11000 0x20>;
125 #address-cells = <1>;
126 #size-cells = <0>;
127 interrupts = <31>;
128 timeout-ms = <1000>;
129 clocks = <&coreclk 0>;
130 status = "disabled";
131 };
132
133 i2c1: i2c@11100 {
134 compatible = "marvell,mv64xxx-i2c";
135 reg = <0x11100 0x20>;
136 #address-cells = <1>;
137 #size-cells = <0>;
138 interrupts = <32>;
139 timeout-ms = <1000>;
140 clocks = <&coreclk 0>;
141 status = "disabled";
142 };
143
144 rtc@10300 {
145 compatible = "marvell,orion-rtc";
146 reg = <0x10300 0x20>;
147 interrupts = <50>;
148 };
149
150 mvsdio@d4000 {
151 compatible = "marvell,orion-sdio";
152 reg = <0xd4000 0x200>;
153 interrupts = <54>;
154 clocks = <&gateclk 17>;
155 bus-width = <4>;
156 cap-sdio-irq;
157 cap-sd-highspeed;
158 cap-mmc-highspeed;
159 status = "disabled";
160 };
161
162 usb@50000 {
163 compatible = "marvell,orion-ehci";
164 reg = <0x50000 0x500>;
165 interrupts = <45>;
166 status = "disabled";
167 };
168
169 usb@51000 {
170 compatible = "marvell,orion-ehci";
171 reg = <0x51000 0x500>;
172 interrupts = <46>;
173 status = "disabled";
174 };
175
176 spi0: spi@10600 {
177 compatible = "marvell,orion-spi";
178 reg = <0x10600 0x28>;
179 #address-cells = <1>;
180 #size-cells = <0>;
181 cell-index = <0>;
182 interrupts = <30>;
183 clocks = <&coreclk 0>;
184 status = "disabled";
185 };
186
187 spi1: spi@10680 {
188 compatible = "marvell,orion-spi";
189 reg = <0x10680 0x28>;
190 #address-cells = <1>;
191 #size-cells = <0>;
192 cell-index = <1>;
193 interrupts = <92>;
194 clocks = <&coreclk 0>;
195 status = "disabled";
196 };
197
198 devbus-bootcs@10400 {
199 compatible = "marvell,mvebu-devbus";
200 reg = <0x10400 0x8>;
201 #address-cells = <1>;
202 #size-cells = <1>;
203 clocks = <&coreclk 0>;
204 status = "disabled";
205 };
206
207 devbus-cs0@10408 {
208 compatible = "marvell,mvebu-devbus";
209 reg = <0x10408 0x8>;
210 #address-cells = <1>;
211 #size-cells = <1>;
212 clocks = <&coreclk 0>;
213 status = "disabled";
214 };
215
216 devbus-cs1@10410 {
217 compatible = "marvell,mvebu-devbus";
218 reg = <0x10410 0x8>;
219 #address-cells = <1>;
220 #size-cells = <1>;
221 clocks = <&coreclk 0>;
222 status = "disabled";
223 };
224
225 devbus-cs2@10418 {
226 compatible = "marvell,mvebu-devbus";
227 reg = <0x10418 0x8>;
228 #address-cells = <1>;
229 #size-cells = <1>;
230 clocks = <&coreclk 0>;
231 status = "disabled";
232 };
233
234 devbus-cs3@10420 {
235 compatible = "marvell,mvebu-devbus";
236 reg = <0x10420 0x8>;
237 #address-cells = <1>;
238 #size-cells = <1>;
239 clocks = <&coreclk 0>;
240 status = "disabled";
241 };
242 };
243 };
244 };
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