Merge tag 'at91-ab-4.6-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni...
[deliverable/linux.git] / arch / arm / boot / dts / at91-sama5d2_xplained.dts
1 /*
2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
3 *
4 * Copyright (C) 2015 Atmel,
5 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45 /dts-v1/;
46 #include "sama5d2.dtsi"
47 #include "sama5d2-pinfunc.h"
48 #include <dt-bindings/mfd/atmel-flexcom.h>
49
50 / {
51 model = "Atmel SAMA5D2 Xplained";
52 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57
58 memory {
59 reg = <0x20000000 0x80000>;
60 };
61
62 clocks {
63 slow_xtal {
64 clock-frequency = <32768>;
65 };
66
67 main_xtal {
68 clock-frequency = <12000000>;
69 };
70 };
71
72 ahb {
73 usb0: gadget@00300000 {
74 status = "okay";
75 };
76
77 usb1: ohci@00400000 {
78 num-ports = <3>;
79 status = "okay";
80 };
81
82 usb2: ehci@00500000 {
83 status = "okay";
84 };
85
86 sdmmc0: sdio-host@a0000000 {
87 bus-width = <8>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_sdmmc0_default>;
90 non-removable;
91 mmc-ddr-1_8v;
92 status = "okay";
93 };
94
95 sdmmc1: sdio-host@b0000000 {
96 bus-width = <4>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_sdmmc1_default>;
99 status = "okay"; /* conflict with qspi0 */
100 };
101
102 apb {
103 spi0: spi@f8000000 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_spi0_default>;
106 status = "okay";
107
108 m25p80@0 {
109 compatible = "atmel,at25df321a";
110 reg = <0>;
111 spi-max-frequency = <50000000>;
112 };
113 };
114
115 macb0: ethernet@f8008000 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
118 phy-mode = "rmii";
119 status = "okay";
120
121 ethernet-phy@1 {
122 reg = <0x1>;
123 interrupt-parent = <&pioA>;
124 interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
125 };
126 };
127
128 pdmic@f8018000 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_pdmic_default>;
131 atmel,model = "PDMIC @ sama5d2_xplained";
132 atmel,mic-min-freq = <1000000>;
133 atmel,mic-max-freq = <3246000>;
134 atmel,mic-offset = <0x0>;
135 status = "okay";
136 };
137
138 uart1: serial@f8020000 {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_uart1_default>;
141 status = "okay";
142 };
143
144 i2c0: i2c@f8028000 {
145 dmas = <0>, <0>;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_i2c0_default>;
148 i2c-sda-hold-time-ns = <350>;
149 status = "okay";
150
151 pmic: act8865@5b {
152 compatible = "active-semi,act8865";
153 reg = <0x5b>;
154 active-semi,vsel-high;
155 status = "okay";
156
157 regulators {
158 vdd_1v35_reg: DCDC_REG1 {
159 regulator-name = "VDD_1V35";
160 regulator-min-microvolt = <1350000>;
161 regulator-max-microvolt = <1350000>;
162 regulator-always-on;
163 };
164
165 vdd_1v2_reg: DCDC_REG2 {
166 regulator-name = "VDD_1V2";
167 regulator-min-microvolt = <1100000>;
168 regulator-max-microvolt = <1300000>;
169 regulator-always-on;
170 };
171
172 vdd_3v3_reg: DCDC_REG3 {
173 regulator-name = "VDD_3V3";
174 regulator-min-microvolt = <3300000>;
175 regulator-max-microvolt = <3300000>;
176 regulator-always-on;
177 };
178
179 vdd_fuse_reg: LDO_REG1 {
180 regulator-name = "VDD_FUSE";
181 regulator-min-microvolt = <2500000>;
182 regulator-max-microvolt = <2500000>;
183 regulator-always-on;
184 };
185
186 vdd_3v3_lp_reg: LDO_REG2 {
187 regulator-name = "VDD_3V3_LP";
188 regulator-min-microvolt = <3300000>;
189 regulator-max-microvolt = <3300000>;
190 regulator-always-on;
191 };
192
193 vdd_led_reg: LDO_REG3 {
194 regulator-name = "VDD_LED";
195 regulator-min-microvolt = <3300000>;
196 regulator-max-microvolt = <3300000>;
197 regulator-always-on;
198 };
199
200 vdd_sdhc_1v8_reg: LDO_REG4 {
201 regulator-name = "VDD_SDHC_1V8";
202 regulator-min-microvolt = <1800000>;
203 regulator-max-microvolt = <1800000>;
204 regulator-always-on;
205 };
206 };
207 };
208 };
209
210 flx0: flexcom@f8034000 {
211 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
212 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
213
214 uart5: serial@200 {
215 compatible = "atmel,at91sam9260-usart";
216 reg = <0x200 0x200>;
217 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
218 clocks = <&flx0_clk>;
219 clock-names = "usart";
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_flx0_default>;
222 atmel,fifo-size = <32>;
223 status = "okay";
224 };
225 };
226
227 watchdog@f8048040 {
228 status = "okay";
229 };
230
231 uart3: serial@fc008000 {
232 pinctrl-names = "default";
233 pinctrl-0 = <&pinctrl_uart3_default>;
234 status = "okay";
235 };
236
237 flx4: flexcom@fc018000 {
238 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
239 status = "okay";
240
241 i2c2: i2c@600 {
242 compatible = "atmel,sama5d2-i2c";
243 reg = <0x600 0x200>;
244 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
245 dmas = <0>, <0>;
246 dma-names = "tx", "rx";
247 #address-cells = <1>;
248 #size-cells = <0>;
249 clocks = <&flx4_clk>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_flx4_default>;
252 atmel,fifo-size = <16>;
253 status = "okay";
254 };
255 };
256
257 i2c1: i2c@fc028000 {
258 dmas = <0>, <0>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_i2c1_default>;
261 status = "okay";
262
263 at24@54 {
264 compatible = "atmel,24c02";
265 reg = <0x54>;
266 pagesize = <16>;
267 };
268 };
269
270 adc: adc@fc030000 {
271 vddana-supply = <&vdd_3v3_lp_reg>;
272 vref-supply = <&vdd_3v3_lp_reg>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_adc_default>;
275 status = "okay";
276 };
277
278 pinctrl@fc038000 {
279 /*
280 * There is no real pinmux for ADC, if the pin
281 * is not requested by another peripheral then
282 * the muxing is done when channel is enabled.
283 * Requesting pins for ADC is GPIO is
284 * encouraged to prevent conflicts and to
285 * disable bias in order to be in the same
286 * state when the pin is not muxed to the adc.
287 */
288 pinctrl_adc_default: adc_default {
289 pinmux = <PIN_PD23__GPIO>;
290 bias-disable;
291 };
292
293 pinctrl_flx0_default: flx0_default {
294 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
295 <PIN_PB29__FLEXCOM0_IO1>;
296 bias-disable;
297 };
298
299 pinctrl_flx4_default: flx4_default {
300 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
301 <PIN_PD13__FLEXCOM4_IO1>;
302 bias-disable;
303 };
304
305 pinctrl_i2c0_default: i2c0_default {
306 pinmux = <PIN_PD21__TWD0>,
307 <PIN_PD22__TWCK0>;
308 bias-disable;
309 };
310
311 pinctrl_i2c1_default: i2c1_default {
312 pinmux = <PIN_PD4__TWD1>,
313 <PIN_PD5__TWCK1>;
314 bias-disable;
315 };
316
317 pinctrl_macb0_default: macb0_default {
318 pinmux = <PIN_PB14__GTXCK>,
319 <PIN_PB15__GTXEN>,
320 <PIN_PB16__GRXDV>,
321 <PIN_PB17__GRXER>,
322 <PIN_PB18__GRX0>,
323 <PIN_PB19__GRX1>,
324 <PIN_PB20__GTX0>,
325 <PIN_PB21__GTX1>,
326 <PIN_PB22__GMDC>,
327 <PIN_PB23__GMDIO>;
328 bias-disable;
329 };
330
331 pinctrl_macb0_phy_irq: macb0_phy_irq {
332 pinmux = <PIN_PC9__GPIO>;
333 };
334
335 pinctrl_pdmic_default: pdmic_default {
336 pinmux = <PIN_PB26__PDMIC_DAT>,
337 <PIN_PB27__PDMIC_CLK>;
338 bias-disable;
339 };
340
341 pinctrl_sdmmc0_default: sdmmc0_default {
342 cmd_data {
343 pinmux = <PIN_PA1__SDMMC0_CMD>,
344 <PIN_PA2__SDMMC0_DAT0>,
345 <PIN_PA3__SDMMC0_DAT1>,
346 <PIN_PA4__SDMMC0_DAT2>,
347 <PIN_PA5__SDMMC0_DAT3>,
348 <PIN_PA6__SDMMC0_DAT4>,
349 <PIN_PA7__SDMMC0_DAT5>,
350 <PIN_PA8__SDMMC0_DAT6>,
351 <PIN_PA9__SDMMC0_DAT7>;
352 bias-pull-up;
353 };
354
355 ck_cd_rstn_vddsel {
356 pinmux = <PIN_PA0__SDMMC0_CK>,
357 <PIN_PA10__SDMMC0_RSTN>,
358 <PIN_PA11__SDMMC0_VDDSEL>,
359 <PIN_PA13__SDMMC0_CD>;
360 bias-disable;
361 };
362 };
363
364 pinctrl_sdmmc1_default: sdmmc1_default {
365 cmd_data {
366 pinmux = <PIN_PA28__SDMMC1_CMD>,
367 <PIN_PA18__SDMMC1_DAT0>,
368 <PIN_PA19__SDMMC1_DAT1>,
369 <PIN_PA20__SDMMC1_DAT2>,
370 <PIN_PA21__SDMMC1_DAT3>;
371 bias-pull-up;
372 };
373
374 conf-ck_cd {
375 pinmux = <PIN_PA22__SDMMC1_CK>,
376 <PIN_PA30__SDMMC1_CD>;
377 bias-disable;
378 };
379 };
380
381 pinctrl_spi0_default: spi0_default {
382 pinmux = <PIN_PA14__SPI0_SPCK>,
383 <PIN_PA15__SPI0_MOSI>,
384 <PIN_PA16__SPI0_MISO>,
385 <PIN_PA17__SPI0_NPCS0>;
386 bias-disable;
387 };
388
389 pinctrl_uart1_default: uart1_default {
390 pinmux = <PIN_PD2__URXD1>,
391 <PIN_PD3__UTXD1>;
392 bias-disable;
393 };
394
395 pinctrl_uart3_default: uart3_default {
396 pinmux = <PIN_PB11__URXD3>,
397 <PIN_PB12__UTXD3>;
398 bias-disable;
399 };
400 };
401 };
402 };
403 };
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