Merge branch 'component' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
[deliverable/linux.git] / arch / arm / boot / dts / at91-sama5d2_xplained.dts
1 /*
2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
3 *
4 * Copyright (C) 2015 Atmel,
5 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45 /dts-v1/;
46 #include "sama5d2.dtsi"
47 #include "sama5d2-pinfunc.h"
48 #include <dt-bindings/mfd/atmel-flexcom.h>
49
50 / {
51 model = "Atmel SAMA5D2 Xplained";
52 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57
58 memory {
59 reg = <0x20000000 0x80000>;
60 };
61
62 clocks {
63 slow_xtal {
64 clock-frequency = <32768>;
65 };
66
67 main_xtal {
68 clock-frequency = <12000000>;
69 };
70 };
71
72 ahb {
73 usb0: gadget@00300000 {
74 status = "okay";
75 };
76
77 usb1: ohci@00400000 {
78 num-ports = <3>;
79 status = "okay";
80 };
81
82 usb2: ehci@00500000 {
83 status = "okay";
84 };
85
86 sdmmc0: sdio-host@a0000000 {
87 bus-width = <8>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_sdmmc0_default>;
90 non-removable;
91 mmc-ddr-1_8v;
92 status = "okay";
93 };
94
95 sdmmc1: sdio-host@b0000000 {
96 bus-width = <4>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_sdmmc1_default>;
99 status = "okay"; /* conflict with qspi0 */
100 };
101
102 apb {
103 spi0: spi@f8000000 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_spi0_default>;
106 status = "okay";
107
108 m25p80@0 {
109 compatible = "atmel,at25df321a";
110 reg = <0>;
111 spi-max-frequency = <50000000>;
112 };
113 };
114
115 macb0: ethernet@f8008000 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_macb0_default>;
118 phy-mode = "rmii";
119 status = "okay";
120 };
121
122 uart1: serial@f8020000 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart1_default>;
125 status = "okay";
126 };
127
128 i2c0: i2c@f8028000 {
129 dmas = <0>, <0>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_i2c0_default>;
132 status = "okay";
133
134 pmic: act8865@5b {
135 compatible = "active-semi,act8865";
136 reg = <0x5b>;
137 active-semi,vsel-high;
138 status = "okay";
139
140 regulators {
141 vdd_1v35_reg: DCDC_REG1 {
142 regulator-name = "VDD_1V35";
143 regulator-min-microvolt = <1350000>;
144 regulator-max-microvolt = <1350000>;
145 regulator-always-on;
146 };
147
148 vdd_1v2_reg: DCDC_REG2 {
149 regulator-name = "VDD_1V2";
150 regulator-min-microvolt = <1100000>;
151 regulator-max-microvolt = <1300000>;
152 regulator-always-on;
153 };
154
155 vdd_3v3_reg: DCDC_REG3 {
156 regulator-name = "VDD_3V3";
157 regulator-min-microvolt = <3300000>;
158 regulator-max-microvolt = <3300000>;
159 regulator-always-on;
160 };
161
162 vdd_fuse_reg: LDO_REG1 {
163 regulator-name = "VDD_FUSE";
164 regulator-min-microvolt = <2500000>;
165 regulator-max-microvolt = <2500000>;
166 regulator-always-on;
167 };
168
169 vdd_3v3_lp_reg: LDO_REG2 {
170 regulator-name = "VDD_3V3_LP";
171 regulator-min-microvolt = <3300000>;
172 regulator-max-microvolt = <3300000>;
173 regulator-always-on;
174 };
175
176 vdd_led_reg: LDO_REG3 {
177 regulator-name = "VDD_LED";
178 regulator-min-microvolt = <3300000>;
179 regulator-max-microvolt = <3300000>;
180 regulator-always-on;
181 };
182
183 vdd_sdhc_1v8_reg: LDO_REG4 {
184 regulator-name = "VDD_SDHC_1V8";
185 regulator-min-microvolt = <1800000>;
186 regulator-max-microvolt = <1800000>;
187 regulator-always-on;
188 };
189 };
190 };
191 };
192
193 flx0: flexcom@f8034000 {
194 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
195 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
196
197 uart5: serial@200 {
198 compatible = "atmel,at91sam9260-usart";
199 reg = <0x200 0x200>;
200 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
201 clocks = <&flx0_clk>;
202 clock-names = "usart";
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_flx0_default>;
205 atmel,fifo-size = <32>;
206 status = "okay";
207 };
208 };
209
210 uart3: serial@fc008000 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&pinctrl_uart3_default>;
213 status = "okay";
214 };
215
216 flx4: flexcom@fc018000 {
217 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
218 status = "okay";
219
220 i2c2: i2c@600 {
221 compatible = "atmel,sama5d2-i2c";
222 reg = <0x600 0x200>;
223 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
224 dmas = <0>, <0>;
225 dma-names = "tx", "rx";
226 #address-cells = <1>;
227 #size-cells = <0>;
228 clocks = <&flx4_clk>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_flx4_default>;
231 atmel,fifo-size = <16>;
232 status = "okay";
233 };
234 };
235
236 i2c1: i2c@fc028000 {
237 dmas = <0>, <0>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_i2c1_default>;
240 status = "okay";
241
242 at24@54 {
243 compatible = "atmel,24c02";
244 reg = <0x54>;
245 pagesize = <16>;
246 };
247 };
248
249 pinctrl@fc038000 {
250 pinctrl_flx0_default: flx0_default {
251 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
252 <PIN_PB29__FLEXCOM0_IO1>;
253 bias-disable;
254 };
255
256 pinctrl_flx4_default: flx4_default {
257 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
258 <PIN_PD13__FLEXCOM4_IO1>;
259 bias-disable;
260 };
261
262 pinctrl_i2c0_default: i2c0_default {
263 pinmux = <PIN_PD21__TWD0>,
264 <PIN_PD22__TWCK0>;
265 bias-disable;
266 };
267
268 pinctrl_i2c1_default: i2c1_default {
269 pinmux = <PIN_PD4__TWD1>,
270 <PIN_PD5__TWCK1>;
271 bias-disable;
272 };
273
274 pinctrl_macb0_default: macb0_default {
275 pinmux = <PIN_PB14__GTXCK>,
276 <PIN_PB15__GTXEN>,
277 <PIN_PB16__GRXDV>,
278 <PIN_PB17__GRXER>,
279 <PIN_PB18__GRX0>,
280 <PIN_PB19__GRX1>,
281 <PIN_PB20__GTX0>,
282 <PIN_PB21__GTX1>,
283 <PIN_PB22__GMDC>,
284 <PIN_PB23__GMDIO>;
285 bias-disable;
286 };
287
288 pinctrl_sdmmc0_default: sdmmc0_default {
289 cmd_data {
290 pinmux = <PIN_PA1__SDMMC0_CMD>,
291 <PIN_PA2__SDMMC0_DAT0>,
292 <PIN_PA3__SDMMC0_DAT1>,
293 <PIN_PA4__SDMMC0_DAT2>,
294 <PIN_PA5__SDMMC0_DAT3>,
295 <PIN_PA6__SDMMC0_DAT4>,
296 <PIN_PA7__SDMMC0_DAT5>,
297 <PIN_PA8__SDMMC0_DAT6>,
298 <PIN_PA9__SDMMC0_DAT7>;
299 bias-pull-up;
300 };
301
302 ck_cd_rstn_vddsel {
303 pinmux = <PIN_PA0__SDMMC0_CK>,
304 <PIN_PA10__SDMMC0_RSTN>,
305 <PIN_PA11__SDMMC0_VDDSEL>,
306 <PIN_PA13__SDMMC0_CD>;
307 bias-disable;
308 };
309 };
310
311 pinctrl_sdmmc1_default: sdmmc1_default {
312 cmd_data {
313 pinmux = <PIN_PA28__SDMMC1_CMD>,
314 <PIN_PA18__SDMMC1_DAT0>,
315 <PIN_PA19__SDMMC1_DAT1>,
316 <PIN_PA20__SDMMC1_DAT2>,
317 <PIN_PA21__SDMMC1_DAT3>;
318 bias-pull-up;
319 };
320
321 conf-ck_cd {
322 pinmux = <PIN_PA22__SDMMC1_CK>,
323 <PIN_PA30__SDMMC1_CD>;
324 bias-disable;
325 };
326 };
327
328 pinctrl_spi0_default: spi0_default {
329 pinmux = <PIN_PA14__SPI0_SPCK>,
330 <PIN_PA15__SPI0_MOSI>,
331 <PIN_PA16__SPI0_MISO>,
332 <PIN_PA17__SPI0_NPCS0>;
333 bias-disable;
334 };
335
336 pinctrl_uart1_default: uart1_default {
337 pinmux = <PIN_PD2__URXD1>,
338 <PIN_PD3__UTXD1>;
339 bias-disable;
340 };
341
342 pinctrl_uart3_default: uart3_default {
343 pinmux = <PIN_PB11__URXD3>,
344 <PIN_PB12__UTXD3>;
345 bias-disable;
346 };
347 };
348 };
349 };
350 };
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