2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
37 compatible = "arm,arm926ejs";
42 reg = <0x70000000 0x10000000>;
46 compatible = "simple-bus";
52 compatible = "simple-bus";
57 aic: interrupt-controller@fffff000 {
58 #interrupt-cells = <3>;
59 compatible = "atmel,at91rm9200-aic";
61 reg = <0xfffff000 0x200>;
62 atmel,external-irqs = <31>;
65 ramc0: ramc@ffffe400 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe400 0x200
72 compatible = "atmel,at91rm9200-pmc";
73 reg = <0xfffffc00 0x100>;
77 compatible = "atmel,at91sam9g45-rstc";
78 reg = <0xfffffd00 0x10>;
82 compatible = "atmel,at91sam9260-pit";
83 reg = <0xfffffd30 0xf>;
89 compatible = "atmel,at91sam9rl-shdwc";
90 reg = <0xfffffd10 0x10>;
93 tcb0: timer@fff7c000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfff7c000 0x100>;
96 interrupts = <18 4 0>;
99 tcb1: timer@fffd4000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfffd4000 0x100>;
102 interrupts = <18 4 0>;
105 dma: dma-controller@ffffec00 {
106 compatible = "atmel,at91sam9g45-dma";
107 reg = <0xffffec00 0x200>;
108 interrupts = <21 4 0>;
112 #address-cells = <1>;
114 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
115 ranges = <0xfffff200 0xfffff200 0xa00>;
119 0xffffffff 0xffc003ff /* pioA */
120 0xffffffff 0x800f8f00 /* pioB */
121 0xffffffff 0x00000e00 /* pioC */
122 0xffffffff 0xff0c1381 /* pioD */
123 0xffffffff 0x81ffff81 /* pioE */
126 /* shared pinctrl settings */
128 pinctrl_dbgu: dbgu-0 {
130 <1 12 0x1 0x0 /* PB12 periph A */
131 1 13 0x1 0x0>; /* PB13 periph A */
136 pinctrl_usart0: usart0-0 {
138 <1 19 0x1 0x1 /* PB19 periph A with pullup */
139 1 18 0x1 0x0>; /* PB18 periph A */
142 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
144 <1 17 0x2 0x0 /* PB17 periph B */
145 1 15 0x2 0x0>; /* PB15 periph B */
150 pinctrl_usart1: usart1-0 {
152 <1 4 0x1 0x1 /* PB4 periph A with pullup */
153 1 5 0x1 0x0>; /* PB5 periph A */
156 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
158 <3 16 0x1 0x0 /* PD16 periph A */
159 3 17 0x1 0x0>; /* PD17 periph A */
164 pinctrl_usart2: usart2-0 {
166 <1 6 0x1 0x1 /* PB6 periph A with pullup */
167 1 7 0x1 0x0>; /* PB7 periph A */
170 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
172 <2 9 0x2 0x0 /* PC9 periph B */
173 2 11 0x2 0x0>; /* PC11 periph B */
178 pinctrl_usart3: usart3-0 {
180 <1 8 0x1 0x1 /* PB9 periph A with pullup */
181 1 9 0x1 0x0>; /* PB8 periph A */
184 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
186 <0 23 0x2 0x0 /* PA23 periph B */
187 0 24 0x2 0x0>; /* PA24 periph B */
192 pinctrl_nand: nand-0 {
194 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
195 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
200 pinctrl_macb_rmii: macb_rmii-0 {
202 <0 10 0x1 0x0 /* PA10 periph A */
203 0 11 0x1 0x0 /* PA11 periph A */
204 0 12 0x1 0x0 /* PA12 periph A */
205 0 13 0x1 0x0 /* PA13 periph A */
206 0 14 0x1 0x0 /* PA14 periph A */
207 0 15 0x1 0x0 /* PA15 periph A */
208 0 16 0x1 0x0 /* PA16 periph A */
209 0 17 0x1 0x0 /* PA17 periph A */
210 0 18 0x1 0x0 /* PA18 periph A */
211 0 19 0x1 0x0>; /* PA19 periph A */
214 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
216 <0 6 0x2 0x0 /* PA6 periph B */
217 0 7 0x2 0x0 /* PA7 periph B */
218 0 8 0x2 0x0 /* PA8 periph B */
219 0 9 0x2 0x0 /* PA9 periph B */
220 0 27 0x2 0x0 /* PA27 periph B */
221 0 28 0x2 0x0 /* PA28 periph B */
222 0 29 0x2 0x0 /* PA29 periph B */
223 0 30 0x2 0x0>; /* PA30 periph B */
227 pioA: gpio@fffff200 {
228 compatible = "atmel,at91rm9200-gpio";
229 reg = <0xfffff200 0x200>;
230 interrupts = <2 4 1>;
233 interrupt-controller;
234 #interrupt-cells = <2>;
237 pioB: gpio@fffff400 {
238 compatible = "atmel,at91rm9200-gpio";
239 reg = <0xfffff400 0x200>;
240 interrupts = <3 4 1>;
243 interrupt-controller;
244 #interrupt-cells = <2>;
247 pioC: gpio@fffff600 {
248 compatible = "atmel,at91rm9200-gpio";
249 reg = <0xfffff600 0x200>;
250 interrupts = <4 4 1>;
253 interrupt-controller;
254 #interrupt-cells = <2>;
257 pioD: gpio@fffff800 {
258 compatible = "atmel,at91rm9200-gpio";
259 reg = <0xfffff800 0x200>;
260 interrupts = <5 4 1>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
267 pioE: gpio@fffffa00 {
268 compatible = "atmel,at91rm9200-gpio";
269 reg = <0xfffffa00 0x200>;
270 interrupts = <5 4 1>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
278 dbgu: serial@ffffee00 {
279 compatible = "atmel,at91sam9260-usart";
280 reg = <0xffffee00 0x200>;
281 interrupts = <1 4 7>;
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_dbgu>;
287 usart0: serial@fff8c000 {
288 compatible = "atmel,at91sam9260-usart";
289 reg = <0xfff8c000 0x200>;
290 interrupts = <7 4 5>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_usart0>;
298 usart1: serial@fff90000 {
299 compatible = "atmel,at91sam9260-usart";
300 reg = <0xfff90000 0x200>;
301 interrupts = <8 4 5>;
304 pinctrl-names = "default";
305 pinctrl-0 = <&pinctrl_usart1>;
309 usart2: serial@fff94000 {
310 compatible = "atmel,at91sam9260-usart";
311 reg = <0xfff94000 0x200>;
312 interrupts = <9 4 5>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&pinctrl_usart2>;
320 usart3: serial@fff98000 {
321 compatible = "atmel,at91sam9260-usart";
322 reg = <0xfff98000 0x200>;
323 interrupts = <10 4 5>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_usart3>;
331 macb0: ethernet@fffbc000 {
332 compatible = "cdns,at32ap7000-macb", "cdns,macb";
333 reg = <0xfffbc000 0x100>;
334 interrupts = <25 4 3>;
335 pinctrl-names = "default";
336 pinctrl-0 = <&pinctrl_macb_rmii>;
341 compatible = "atmel,at91sam9g10-i2c";
342 reg = <0xfff84000 0x100>;
343 interrupts = <12 4 6>;
344 #address-cells = <1>;
350 compatible = "atmel,at91sam9g10-i2c";
351 reg = <0xfff88000 0x100>;
352 interrupts = <13 4 6>;
353 #address-cells = <1>;
359 compatible = "atmel,at91sam9260-adc";
360 reg = <0xfffb0000 0x100>;
361 interrupts = <20 4 0>;
362 atmel,adc-use-external-triggers;
363 atmel,adc-channels-used = <0xff>;
364 atmel,adc-vref = <3300>;
365 atmel,adc-num-channels = <8>;
366 atmel,adc-startup-time = <40>;
367 atmel,adc-channel-base = <0x30>;
368 atmel,adc-drdy-mask = <0x10000>;
369 atmel,adc-status-register = <0x1c>;
370 atmel,adc-trigger-register = <0x08>;
373 trigger-name = "external-rising";
374 trigger-value = <0x1>;
378 trigger-name = "external-falling";
379 trigger-value = <0x2>;
384 trigger-name = "external-any";
385 trigger-value = <0x3>;
390 trigger-name = "continuous";
391 trigger-value = <0x6>;
396 nand0: nand@40000000 {
397 compatible = "atmel,at91rm9200-nand";
398 #address-cells = <1>;
400 reg = <0x40000000 0x10000000
403 atmel,nand-addr-offset = <21>;
404 atmel,nand-cmd-offset = <22>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_nand>;
414 usb0: ohci@00700000 {
415 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
416 reg = <0x00700000 0x100000>;
417 interrupts = <22 4 2>;
421 usb1: ehci@00800000 {
422 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
423 reg = <0x00800000 0x100000>;
424 interrupts = <22 4 2>;
430 compatible = "i2c-gpio";
431 gpios = <&pioA 20 0 /* sda */
434 i2c-gpio,sda-open-drain;
435 i2c-gpio,scl-open-drain;
436 i2c-gpio,delay-us = <5>; /* ~100 kHz */
437 #address-cells = <1>;