6a40b777ea4cd1761cf3816f0030c966faffaae4
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9x5.dtsi
1 /*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12 /include/ "skeleton.dtsi"
13
14 / {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 i2c0 = &i2c0;
31 i2c1 = &i2c1;
32 i2c2 = &i2c2;
33 };
34 cpus {
35 cpu@0 {
36 compatible = "arm,arm926ejs";
37 };
38 };
39
40 memory {
41 reg = <0x20000000 0x10000000>;
42 };
43
44 ahb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49
50 apb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55
56 aic: interrupt-controller@fffff000 {
57 #interrupt-cells = <3>;
58 compatible = "atmel,at91rm9200-aic";
59 interrupt-controller;
60 reg = <0xfffff000 0x200>;
61 atmel,external-irqs = <31>;
62 };
63
64 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
67 };
68
69 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
74 rstc@fffffe00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
77 };
78
79 shdwc@fffffe10 {
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
82 };
83
84 pit: timer@fffffe30 {
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
87 interrupts = <1 4 7>;
88 };
89
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
93 interrupts = <17 4 0>;
94 };
95
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
99 interrupts = <17 4 0>;
100 };
101
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
105 interrupts = <20 4 0>;
106 };
107
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
111 interrupts = <21 4 0>;
112 };
113
114 pinctrl@fffff400 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff400 0xfffff400 0x800>;
119
120 /* shared pinctrl settings */
121 dbgu {
122 pinctrl_dbgu: dbgu-0 {
123 atmel,pins =
124 <0 9 0x1 0x0 /* PA9 periph A */
125 0 10 0x1 0x1>; /* PA10 periph A with pullup */
126 };
127 };
128
129 uart0 {
130 pinctrl_uart0: uart0-0 {
131 atmel,pins =
132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 0 1 0x1 0x0>; /* PA1 periph A */
134 };
135
136 pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
137 atmel,pins =
138 <0 2 0x1 0x0 /* PA2 periph A */
139 0 3 0x1 0x0>; /* PA3 periph A */
140 };
141 };
142
143 uart1 {
144 pinctrl_uart1: uart1-0 {
145 atmel,pins =
146 <0 5 0x1 0x1 /* PA5 periph A with pullup */
147 0 6 0x1 0x0>; /* PA6 periph A */
148 };
149
150 pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
151 atmel,pins =
152 <3 27 0x3 0x0 /* PC27 periph C */
153 3 28 0x3 0x0>; /* PC28 periph C */
154 };
155 };
156
157 uart2 {
158 pinctrl_uart2: uart2-0 {
159 atmel,pins =
160 <0 7 0x1 0x1 /* PA7 periph A with pullup */
161 0 8 0x1 0x0>; /* PA8 periph A */
162 };
163
164 pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
165 atmel,pins =
166 <0 0 0x2 0x0 /* PB0 periph B */
167 0 1 0x2 0x0>; /* PB1 periph B */
168 };
169 };
170
171 uart3 {
172 pinctrl_uart3: uart3-0 {
173 atmel,pins =
174 <3 23 0x2 0x1 /* PC22 periph B with pullup */
175 3 23 0x2 0x0>; /* PC23 periph B */
176 };
177
178 pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
179 atmel,pins =
180 <3 24 0x2 0x0 /* PC24 periph B */
181 3 25 0x2 0x0>; /* PC25 periph B */
182 };
183 };
184
185 usart0 {
186 pinctrl_usart0: usart0-0 {
187 atmel,pins =
188 <3 8 0x3 0x0 /* PC8 periph C */
189 3 9 0x3 0x1>; /* PC9 periph C with pullup */
190 };
191 };
192
193 usart1 {
194 pinctrl_usart1: usart1-0 {
195 atmel,pins =
196 <3 16 0x3 0x0 /* PC16 periph C */
197 3 17 0x3 0x1>; /* PC17 periph C with pullup */
198 };
199 };
200
201 nand {
202 pinctrl_nand: nand-0 {
203 atmel,pins =
204 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
205 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
206 };
207 };
208
209 pioA: gpio@fffff400 {
210 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
211 reg = <0xfffff400 0x200>;
212 interrupts = <2 4 1>;
213 #gpio-cells = <2>;
214 gpio-controller;
215 interrupt-controller;
216 #interrupt-cells = <2>;
217 };
218
219 pioB: gpio@fffff600 {
220 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
221 reg = <0xfffff600 0x200>;
222 interrupts = <2 4 1>;
223 #gpio-cells = <2>;
224 gpio-controller;
225 #gpio-lines = <19>;
226 interrupt-controller;
227 #interrupt-cells = <2>;
228 };
229
230 pioC: gpio@fffff800 {
231 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
232 reg = <0xfffff800 0x200>;
233 interrupts = <3 4 1>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 interrupt-controller;
237 #interrupt-cells = <2>;
238 };
239
240 pioD: gpio@fffffa00 {
241 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
242 reg = <0xfffffa00 0x200>;
243 interrupts = <3 4 1>;
244 #gpio-cells = <2>;
245 gpio-controller;
246 #gpio-lines = <22>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
249 };
250 };
251
252 dbgu: serial@fffff200 {
253 compatible = "atmel,at91sam9260-usart";
254 reg = <0xfffff200 0x200>;
255 interrupts = <1 4 7>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_dbgu>;
258 status = "disabled";
259 };
260
261 usart0: serial@f801c000 {
262 compatible = "atmel,at91sam9260-usart";
263 reg = <0xf801c000 0x200>;
264 interrupts = <5 4 5>;
265 atmel,use-dma-rx;
266 atmel,use-dma-tx;
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_uart0>;
269 status = "disabled";
270 };
271
272 usart1: serial@f8020000 {
273 compatible = "atmel,at91sam9260-usart";
274 reg = <0xf8020000 0x200>;
275 interrupts = <6 4 5>;
276 atmel,use-dma-rx;
277 atmel,use-dma-tx;
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_uart1>;
280 status = "disabled";
281 };
282
283 usart2: serial@f8024000 {
284 compatible = "atmel,at91sam9260-usart";
285 reg = <0xf8024000 0x200>;
286 interrupts = <7 4 5>;
287 atmel,use-dma-rx;
288 atmel,use-dma-tx;
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_uart2>;
291 status = "disabled";
292 };
293
294 macb0: ethernet@f802c000 {
295 compatible = "cdns,at32ap7000-macb", "cdns,macb";
296 reg = <0xf802c000 0x100>;
297 interrupts = <24 4 3>;
298 status = "disabled";
299 };
300
301 macb1: ethernet@f8030000 {
302 compatible = "cdns,at32ap7000-macb", "cdns,macb";
303 reg = <0xf8030000 0x100>;
304 interrupts = <27 4 3>;
305 status = "disabled";
306 };
307
308 i2c0: i2c@f8010000 {
309 compatible = "atmel,at91sam9x5-i2c";
310 reg = <0xf8010000 0x100>;
311 interrupts = <9 4 6>;
312 #address-cells = <1>;
313 #size-cells = <0>;
314 status = "disabled";
315 };
316
317 i2c1: i2c@f8014000 {
318 compatible = "atmel,at91sam9x5-i2c";
319 reg = <0xf8014000 0x100>;
320 interrupts = <10 4 6>;
321 #address-cells = <1>;
322 #size-cells = <0>;
323 status = "disabled";
324 };
325
326 i2c2: i2c@f8018000 {
327 compatible = "atmel,at91sam9x5-i2c";
328 reg = <0xf8018000 0x100>;
329 interrupts = <11 4 6>;
330 #address-cells = <1>;
331 #size-cells = <0>;
332 status = "disabled";
333 };
334
335 adc0: adc@f804c000 {
336 compatible = "atmel,at91sam9260-adc";
337 reg = <0xf804c000 0x100>;
338 interrupts = <19 4 0>;
339 atmel,adc-use-external;
340 atmel,adc-channels-used = <0xffff>;
341 atmel,adc-vref = <3300>;
342 atmel,adc-num-channels = <12>;
343 atmel,adc-startup-time = <40>;
344 atmel,adc-channel-base = <0x50>;
345 atmel,adc-drdy-mask = <0x1000000>;
346 atmel,adc-status-register = <0x30>;
347 atmel,adc-trigger-register = <0xc0>;
348
349 trigger@0 {
350 trigger-name = "external-rising";
351 trigger-value = <0x1>;
352 trigger-external;
353 };
354
355 trigger@1 {
356 trigger-name = "external-falling";
357 trigger-value = <0x2>;
358 trigger-external;
359 };
360
361 trigger@2 {
362 trigger-name = "external-any";
363 trigger-value = <0x3>;
364 trigger-external;
365 };
366
367 trigger@3 {
368 trigger-name = "continuous";
369 trigger-value = <0x6>;
370 };
371 };
372 };
373
374 nand0: nand@40000000 {
375 compatible = "atmel,at91rm9200-nand";
376 #address-cells = <1>;
377 #size-cells = <1>;
378 reg = <0x40000000 0x10000000
379 >;
380 atmel,nand-addr-offset = <21>;
381 atmel,nand-cmd-offset = <22>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_nand>;
384 gpios = <&pioD 5 0
385 &pioD 4 0
386 0
387 >;
388 status = "disabled";
389 };
390
391 usb0: ohci@00600000 {
392 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
393 reg = <0x00600000 0x100000>;
394 interrupts = <22 4 2>;
395 status = "disabled";
396 };
397
398 usb1: ehci@00700000 {
399 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
400 reg = <0x00700000 0x100000>;
401 interrupts = <22 4 2>;
402 status = "disabled";
403 };
404 };
405
406 i2c@0 {
407 compatible = "i2c-gpio";
408 gpios = <&pioA 30 0 /* sda */
409 &pioA 31 0 /* scl */
410 >;
411 i2c-gpio,sda-open-drain;
412 i2c-gpio,scl-open-drain;
413 i2c-gpio,delay-us = <2>; /* ~100 kHz */
414 #address-cells = <1>;
415 #size-cells = <0>;
416 status = "disabled";
417 };
418
419 i2c@1 {
420 compatible = "i2c-gpio";
421 gpios = <&pioC 0 0 /* sda */
422 &pioC 1 0 /* scl */
423 >;
424 i2c-gpio,sda-open-drain;
425 i2c-gpio,scl-open-drain;
426 i2c-gpio,delay-us = <2>; /* ~100 kHz */
427 #address-cells = <1>;
428 #size-cells = <0>;
429 status = "disabled";
430 };
431
432 i2c@2 {
433 compatible = "i2c-gpio";
434 gpios = <&pioB 4 0 /* sda */
435 &pioB 5 0 /* scl */
436 >;
437 i2c-gpio,sda-open-drain;
438 i2c-gpio,scl-open-drain;
439 i2c-gpio,delay-us = <2>; /* ~100 kHz */
440 #address-cells = <1>;
441 #size-cells = <0>;
442 status = "disabled";
443 };
444 };
This page took 0.039259 seconds and 4 git commands to generate.