2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
36 compatible = "arm,arm926ejs";
41 reg = <0x20000000 0x10000000>;
45 compatible = "simple-bus";
51 compatible = "simple-bus";
56 aic: interrupt-controller@fffff000 {
57 #interrupt-cells = <3>;
58 compatible = "atmel,at91rm9200-aic";
60 reg = <0xfffff000 0x200>;
61 atmel,external-irqs = <31>;
64 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
93 interrupts = <17 4 0>;
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
99 interrupts = <17 4 0>;
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
105 interrupts = <20 4 0>;
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
111 interrupts = <21 4 0>;
115 #address-cells = <1>;
117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff400 0xfffff400 0x800>;
120 /* shared pinctrl settings */
122 pinctrl_dbgu: dbgu-0 {
124 <0 9 0x1 0x0 /* PA9 periph A */
125 0 10 0x1 0x1>; /* PA10 periph A with pullup */
130 pinctrl_uart0: uart0-0 {
132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 0 1 0x1 0x0>; /* PA1 periph A */
136 pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
138 <0 2 0x1 0x0 /* PA2 periph A */
139 0 3 0x1 0x0>; /* PA3 periph A */
144 pinctrl_uart1: uart1-0 {
146 <0 5 0x1 0x1 /* PA5 periph A with pullup */
147 0 6 0x1 0x0>; /* PA6 periph A */
150 pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
152 <3 27 0x3 0x0 /* PC27 periph C */
153 3 28 0x3 0x0>; /* PC28 periph C */
158 pinctrl_uart2: uart2-0 {
160 <0 7 0x1 0x1 /* PA7 periph A with pullup */
161 0 8 0x1 0x0>; /* PA8 periph A */
164 pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
166 <0 0 0x2 0x0 /* PB0 periph B */
167 0 1 0x2 0x0>; /* PB1 periph B */
172 pinctrl_uart3: uart3-0 {
174 <3 23 0x2 0x1 /* PC22 periph B with pullup */
175 3 23 0x2 0x0>; /* PC23 periph B */
178 pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
180 <3 24 0x2 0x0 /* PC24 periph B */
181 3 25 0x2 0x0>; /* PC25 periph B */
186 pinctrl_usart0: usart0-0 {
188 <3 8 0x3 0x0 /* PC8 periph C */
189 3 9 0x3 0x1>; /* PC9 periph C with pullup */
194 pinctrl_usart1: usart1-0 {
196 <3 16 0x3 0x0 /* PC16 periph C */
197 3 17 0x3 0x1>; /* PC17 periph C with pullup */
202 pinctrl_nand: nand-0 {
204 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
205 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
209 pioA: gpio@fffff400 {
210 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
211 reg = <0xfffff400 0x200>;
212 interrupts = <2 4 1>;
215 interrupt-controller;
216 #interrupt-cells = <2>;
219 pioB: gpio@fffff600 {
220 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
221 reg = <0xfffff600 0x200>;
222 interrupts = <2 4 1>;
226 interrupt-controller;
227 #interrupt-cells = <2>;
230 pioC: gpio@fffff800 {
231 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
232 reg = <0xfffff800 0x200>;
233 interrupts = <3 4 1>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
240 pioD: gpio@fffffa00 {
241 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
242 reg = <0xfffffa00 0x200>;
243 interrupts = <3 4 1>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
252 dbgu: serial@fffff200 {
253 compatible = "atmel,at91sam9260-usart";
254 reg = <0xfffff200 0x200>;
255 interrupts = <1 4 7>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_dbgu>;
261 usart0: serial@f801c000 {
262 compatible = "atmel,at91sam9260-usart";
263 reg = <0xf801c000 0x200>;
264 interrupts = <5 4 5>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&pinctrl_uart0>;
272 usart1: serial@f8020000 {
273 compatible = "atmel,at91sam9260-usart";
274 reg = <0xf8020000 0x200>;
275 interrupts = <6 4 5>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_uart1>;
283 usart2: serial@f8024000 {
284 compatible = "atmel,at91sam9260-usart";
285 reg = <0xf8024000 0x200>;
286 interrupts = <7 4 5>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_uart2>;
294 macb0: ethernet@f802c000 {
295 compatible = "cdns,at32ap7000-macb", "cdns,macb";
296 reg = <0xf802c000 0x100>;
297 interrupts = <24 4 3>;
301 macb1: ethernet@f8030000 {
302 compatible = "cdns,at32ap7000-macb", "cdns,macb";
303 reg = <0xf8030000 0x100>;
304 interrupts = <27 4 3>;
309 compatible = "atmel,at91sam9x5-i2c";
310 reg = <0xf8010000 0x100>;
311 interrupts = <9 4 6>;
312 #address-cells = <1>;
318 compatible = "atmel,at91sam9x5-i2c";
319 reg = <0xf8014000 0x100>;
320 interrupts = <10 4 6>;
321 #address-cells = <1>;
327 compatible = "atmel,at91sam9x5-i2c";
328 reg = <0xf8018000 0x100>;
329 interrupts = <11 4 6>;
330 #address-cells = <1>;
336 compatible = "atmel,at91sam9260-adc";
337 reg = <0xf804c000 0x100>;
338 interrupts = <19 4 0>;
339 atmel,adc-use-external;
340 atmel,adc-channels-used = <0xffff>;
341 atmel,adc-vref = <3300>;
342 atmel,adc-num-channels = <12>;
343 atmel,adc-startup-time = <40>;
344 atmel,adc-channel-base = <0x50>;
345 atmel,adc-drdy-mask = <0x1000000>;
346 atmel,adc-status-register = <0x30>;
347 atmel,adc-trigger-register = <0xc0>;
350 trigger-name = "external-rising";
351 trigger-value = <0x1>;
356 trigger-name = "external-falling";
357 trigger-value = <0x2>;
362 trigger-name = "external-any";
363 trigger-value = <0x3>;
368 trigger-name = "continuous";
369 trigger-value = <0x6>;
374 nand0: nand@40000000 {
375 compatible = "atmel,at91rm9200-nand";
376 #address-cells = <1>;
378 reg = <0x40000000 0x10000000
380 atmel,nand-addr-offset = <21>;
381 atmel,nand-cmd-offset = <22>;
382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_nand>;
391 usb0: ohci@00600000 {
392 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
393 reg = <0x00600000 0x100000>;
394 interrupts = <22 4 2>;
398 usb1: ehci@00700000 {
399 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
400 reg = <0x00700000 0x100000>;
401 interrupts = <22 4 2>;
407 compatible = "i2c-gpio";
408 gpios = <&pioA 30 0 /* sda */
411 i2c-gpio,sda-open-drain;
412 i2c-gpio,scl-open-drain;
413 i2c-gpio,delay-us = <2>; /* ~100 kHz */
414 #address-cells = <1>;
420 compatible = "i2c-gpio";
421 gpios = <&pioC 0 0 /* sda */
424 i2c-gpio,sda-open-drain;
425 i2c-gpio,scl-open-drain;
426 i2c-gpio,delay-us = <2>; /* ~100 kHz */
427 #address-cells = <1>;
433 compatible = "i2c-gpio";
434 gpios = <&pioB 4 0 /* sda */
437 i2c-gpio,sda-open-drain;
438 i2c-gpio,scl-open-drain;
439 i2c-gpio,delay-us = <2>; /* ~100 kHz */
440 #address-cells = <1>;