2 * Broadcom BCM63138 DSL SoCs Device Tree
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
8 #include "skeleton.dtsi"
11 compatible = "brcm,bcm63138";
12 model = "Broadcom BCM63138 DSL SoC";
13 interrupt-parent = <&gic>;
26 compatible = "arm,cortex-a9";
27 next-level-cache = <&L2>;
29 enable-method = "brcm,bcm63138";
34 compatible = "arm,cortex-a9";
35 next-level-cache = <&L2>;
37 enable-method = "brcm,bcm63138";
46 /* UBUS peripheral clock */
47 periph_clk: periph_clk {
49 compatible = "fixed-clock";
50 clock-frequency = <50000000>;
51 clock-output-names = "periph";
54 /* peripheral clock for system timer */
57 compatible = "fixed-factor-clock";
66 compatible = "fixed-factor-clock";
75 compatible = "simple-bus";
76 ranges = <0 0x80000000 0x784000>;
80 L2: cache-controller@1d000 {
81 compatible = "arm,pl310-cache";
82 reg = <0x1d000 0x1000>;
85 cache-size = <524288>;
87 cache-line-size = <32>;
88 interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
92 compatible = "arm,cortex-a9-scu";
93 reg = <0x1e000 0x100>;
96 gic: interrupt-controller@1e100 {
97 compatible = "arm,cortex-a9-gic";
100 #interrupt-cells = <3>;
101 #address-cells = <0>;
102 interrupt-controller;
105 global_timer: timer@1e200 {
106 compatible = "arm,cortex-a9-global-timer";
107 reg = <0x1e200 0x20>;
108 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
112 local_timer: local-timer@1e600 {
113 compatible = "arm,cortex-a9-twd-timer";
114 reg = <0x1e600 0x20>;
115 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
119 twd_watchdog: watchdog@1e620 {
120 compatible = "arm,cortex-a9-twd-wdt";
121 reg = <0x1e620 0x20>;
122 interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
127 compatible = "brcm,bcm63138-armpll";
128 clocks = <&periph_clk>;
129 reg = <0x20000 0xf00>;
132 pmb0: reset-controller@4800c0 {
133 compatible = "brcm,bcm63138-pmb";
134 reg = <0x4800c0 0x10>;
138 pmb1: reset-controller@4800e0 {
139 compatible = "brcm,bcm63138-pmb";
140 reg = <0x4800e0 0x10>;
145 /* Legacy UBUS base */
147 compatible = "simple-bus";
148 #address-cells = <1>;
150 ranges = <0 0xfffe8000 0x8100>;
153 compatible = "brcm,bcm6328-timer", "syscon";
157 serial0: serial@600 {
158 compatible = "brcm,bcm6345-uart";
160 interrupts = <GIC_SPI 32 0>;
161 clocks = <&periph_clk>;
162 clock-names = "periph";
166 serial1: serial@620 {
167 compatible = "brcm,bcm6345-uart";
169 interrupts = <GIC_SPI 33 0>;
170 clocks = <&periph_clk>;
171 clock-names = "periph";
176 #address-cells = <1>;
178 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
179 reg = <0x2000 0x600>, <0xf0 0x10>;
180 reg-names = "nand", "nand-int-base";
182 interrupts = <GIC_SPI 38 0>;
183 interrupt-names = "nand";
186 bootlut: bootlut@8000 {
187 compatible = "brcm,bcm63138-bootlut";
192 compatible = "syscon-reboot";