arch/arm/boot/dts/da850.dtsi

   1 /*
   2  * Copyright 2012 DENX Software Engineering GmbH
   3  * Heiko Schocher <hs@denx.de>
   4  *
   5  * This program is free software; you can redistribute  it and/or modify it
   6  * under  the terms of  the GNU General  Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10 /include/ "skeleton.dtsi"
  11
  12 / {
  13         arm {
  14                 #address-cells = <1>;
  15                 #size-cells = <1>;
  16                 ranges;
  17                 intc: interrupt-controller {
  18                         compatible = "ti,cp-intc";
  19                         interrupt-controller;
  20                         #interrupt-cells = <1>;
  21                         ti,intc-size = <100>;
  22                         reg = <0xfffee000 0x2000>;
  23                 };
  24         };
  25         soc {
  26                 compatible = "simple-bus";
  27                 model = "da850";
  28                 #address-cells = <1>;
  29                 #size-cells = <1>;
  30                 ranges = <0x0 0x01c00000 0x400000>;
  31                 interrupt-parent = <&intc>;
  32
  33                 pmx_core: pinmux@1c14120 {
  34                         compatible = "pinctrl-single";
  35                         reg = <0x14120 0x50>;
  36                         #address-cells = <1>;
  37                         #size-cells = <0>;
  38                         pinctrl-single,bit-per-mux;
  39                         pinctrl-single,register-width = <32>;
  40                         pinctrl-single,function-mask = <0xffffffff>;
  41                         status = "disabled";
  42
  43                         nand_cs3_pins: pinmux_nand_pins {
  44                                 pinctrl-single,bits = <
  45                                         /* EMA_OE, EMA_WE */
  46                                         0x1c 0x00110000  0x00ff0000
  47                                         /* EMA_CS[4],EMA_CS[3]*/
  48                                         0x1c 0x00000110  0x00000ff0
  49                                         /*
  50                                          * EMA_D[0], EMA_D[1], EMA_D[2],
  51                                          * EMA_D[3], EMA_D[4], EMA_D[5],
  52                                          * EMA_D[6], EMA_D[7]
  53                                          */
  54                                         0x24 0x11111111  0xffffffff
  55                                         /* EMA_A[1], EMA_A[2] */
  56                                         0x30 0x01100000  0x0ff00000
  57                                 >;
  58                         };
  59                         i2c0_pins: pinmux_i2c0_pins {
  60                                 pinctrl-single,bits = <
  61                                         /* I2C0_SDA,I2C0_SCL */
  62                                         0x10 0x00002200 0x0000ff00
  63                                 >;
  64                         };
  65                 };
  66                 serial0: serial@1c42000 {
  67                         compatible = "ns16550a";
  68                         reg = <0x42000 0x100>;
  69                         clock-frequency = <150000000>;
  70                         reg-shift = <2>;
  71                         interrupts = <25>;
  72                         status = "disabled";
  73                 };
  74                 serial1: serial@1d0c000 {
  75                         compatible = "ns16550a";
  76                         reg = <0x10c000 0x100>;
  77                         clock-frequency = <150000000>;
  78                         reg-shift = <2>;
  79                         interrupts = <53>;
  80                         status = "disabled";
  81                 };
  82                 serial2: serial@1d0d000 {
  83                         compatible = "ns16550a";
  84                         reg = <0x10d000 0x100>;
  85                         clock-frequency = <150000000>;
  86                         reg-shift = <2>;
  87                         interrupts = <61>;
  88                         status = "disabled";
  89                 };
  90                 rtc0: rtc@1c23000 {
  91                         compatible = "ti,da830-rtc";
  92                         reg = <0x23000 0x1000>;
  93                         interrupts = <19
  94                                       19>;
  95                         status = "disabled";
  96                 };
  97                 i2c0: i2c@1c22000 {
  98                         compatible = "ti,davinci-i2c";
  99                         reg = <0x22000 0x1000>;
 100                         interrupts = <15>;
 101                         #address-cells = <1>;
 102                         #size-cells = <0>;
 103                         status = "disabled";
 104                 };
 105         };
 106         nand_cs3@62000000 {
 107                 compatible = "ti,davinci-nand";
 108                 reg = <0x62000000 0x807ff
 109                        0x68000000 0x8000>;
 110                 ti,davinci-chipselect = <1>;
 111                 ti,davinci-mask-ale = <0>;
 112                 ti,davinci-mask-cle = <0>;
 113                 ti,davinci-mask-chipsel = <0>;
 114                 ti,davinci-ecc-mode = "hw";
 115                 ti,davinci-ecc-bits = <4>;
 116                 ti,davinci-nand-use-bbt;
 117                 status = "disabled";
 118         };
 119 };