Merge tag 'for-v4.0-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / boot / dts / dm816x.dtsi
1 /*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
6
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
9
10 #include "skeleton.dtsi"
11
12 / {
13 compatible = "ti,dm816";
14 interrupt-parent = <&intc>;
15
16 aliases {
17 i2c0 = &i2c1;
18 i2c1 = &i2c2;
19 serial0 = &uart1;
20 serial1 = &uart2;
21 serial2 = &uart3;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29 cpu@0 {
30 compatible = "arm,cortex-a8";
31 device_type = "cpu";
32 reg = <0>;
33 };
34 };
35
36 pmu {
37 compatible = "arm,cortex-a8-pmu";
38 interrupts = <3>;
39 };
40
41 /*
42 * The soc node represents the soc top level view. It is used for IPs
43 * that are not memory mapped in the MPU view or for the MPU itself.
44 */
45 soc {
46 compatible = "ti,omap-infra";
47 mpu {
48 compatible = "ti,omap3-mpu";
49 ti,hwmods = "mpu";
50 };
51 };
52
53 /*
54 * XXX: Use a flat representation of the dm816x interconnect.
55 * The real dm816x interconnect network is quite complex. Since
56 * it will not bring real advantage to represent that in DT
57 * for the moment, just use a fake OCP bus entry to represent
58 * the whole bus hierarchy.
59 */
60 ocp {
61 compatible = "ti,omap3-l3-smx", "simple-bus";
62 reg = <0x44000000 0x10000>;
63 interrupts = <9 10>;
64 #address-cells = <1>;
65 #size-cells = <1>;
66 ranges;
67 ti,hwmods = "l3_main";
68
69 prcm: prcm@48180000 {
70 compatible = "ti,dm816-prcm";
71 reg = <0x48180000 0x4000>;
72
73 prcm_clocks: clocks {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 };
77
78 prcm_clockdomains: clockdomains {
79 };
80 };
81
82 scrm: scrm@48140000 {
83 compatible = "ti,dm816-scrm", "simple-bus";
84 reg = <0x48140000 0x21000>;
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges = <0 0x48140000 0x21000>;
88
89 dm816x_pinmux: pinmux@800 {
90 compatible = "pinctrl-single";
91 reg = <0x800 0x50a>;
92 #address-cells = <1>;
93 #size-cells = <0>;
94 pinctrl-single,register-width = <16>;
95 pinctrl-single,function-mask = <0xf>;
96 };
97
98 /* Device Configuration Registers */
99 scm_conf: syscon@600 {
100 compatible = "syscon", "simple-bus";
101 reg = <0x600 0x110>;
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x600 0x110>;
105
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
108 reg = <0x20 0x8>;
109 reg-names = "phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
112 #phy-cells = <0>;
113 syscon = <&scm_conf>;
114 };
115
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
118 reg = <0x28 0x8>;
119 reg-names = "phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
122 #phy-cells = <0>;
123 syscon = <&scm_conf>;
124 };
125 };
126
127 scrm_clocks: clocks {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 };
131
132 scrm_clockdomains: clockdomains {
133 };
134 };
135
136 edma: edma@49000000 {
137 compatible = "ti,edma3";
138 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
139 reg = <0x49000000 0x10000>,
140 <0x44e10f90 0x40>;
141 interrupts = <12 13 14>;
142 #dma-cells = <1>;
143 };
144
145 elm: elm@48080000 {
146 compatible = "ti,816-elm";
147 ti,hwmods = "elm";
148 reg = <0x48080000 0x2000>;
149 interrupts = <4>;
150 };
151
152 gpio1: gpio@48032000 {
153 compatible = "ti,omap3-gpio";
154 ti,hwmods = "gpio1";
155 reg = <0x48032000 0x1000>;
156 interrupts = <97>;
157 };
158
159 gpio2: gpio@4804c000 {
160 compatible = "ti,omap3-gpio";
161 ti,hwmods = "gpio2";
162 reg = <0x4804c000 0x1000>;
163 interrupts = <99>;
164 };
165
166 gpmc: gpmc@50000000 {
167 compatible = "ti,am3352-gpmc";
168 ti,hwmods = "gpmc";
169 reg = <0x50000000 0x2000>;
170 #address-cells = <2>;
171 #size-cells = <1>;
172 interrupts = <100>;
173 gpmc,num-cs = <6>;
174 gpmc,num-waitpins = <2>;
175 };
176
177 i2c1: i2c@48028000 {
178 compatible = "ti,omap4-i2c";
179 ti,hwmods = "i2c1";
180 reg = <0x48028000 0x1000>;
181 #address-cells = <1>;
182 #size-cells = <0>;
183 interrupts = <70>;
184 dmas = <&edma 58 &edma 59>;
185 dma-names = "tx", "rx";
186 };
187
188 i2c2: i2c@4802a000 {
189 compatible = "ti,omap4-i2c";
190 ti,hwmods = "i2c2";
191 reg = <0x4802a000 0x1000>;
192 #address-cells = <1>;
193 #size-cells = <0>;
194 interrupts = <71>;
195 dmas = <&edma 60 &edma 61>;
196 dma-names = "tx", "rx";
197 };
198
199 intc: interrupt-controller@48200000 {
200 compatible = "ti,dm816-intc";
201 interrupt-controller;
202 #interrupt-cells = <1>;
203 reg = <0x48200000 0x1000>;
204 };
205
206 mailbox: mailbox@480c8000 {
207 compatible = "ti,omap4-mailbox";
208 reg = <0x480c8000 0x2000>;
209 interrupts = <77>;
210 ti,hwmods = "mailbox";
211 ti,mbox-num-users = <4>;
212 ti,mbox-num-fifos = <12>;
213 mbox_dsp: mbox_dsp {
214 ti,mbox-tx = <3 0 0>;
215 ti,mbox-rx = <0 0 0>;
216 };
217 };
218
219 mdio: mdio@4a100800 {
220 compatible = "ti,davinci_mdio";
221 #address-cells = <1>;
222 #size-cells = <0>;
223 reg = <0x4a100800 0x100>;
224 ti,hwmods = "davinci_mdio";
225 bus_freq = <1000000>;
226 phy0: ethernet-phy@0 {
227 reg = <1>;
228 };
229 phy1: ethernet-phy@1 {
230 reg = <2>;
231 };
232 };
233
234 eth0: ethernet@4a100000 {
235 compatible = "ti,dm816-emac";
236 ti,hwmods = "emac0";
237 reg = <0x4a100000 0x800
238 0x4a100900 0x3700>;
239 clocks = <&sysclk24_ck>;
240 syscon = <&scm_conf>;
241 ti,davinci-ctrl-reg-offset = <0>;
242 ti,davinci-ctrl-mod-reg-offset = <0x900>;
243 ti,davinci-ctrl-ram-offset = <0x2000>;
244 ti,davinci-ctrl-ram-size = <0x2000>;
245 interrupts = <40 41 42 43>;
246 phy-handle = <&phy0>;
247 };
248
249 eth1: ethernet@4a120000 {
250 compatible = "ti,dm816-emac";
251 ti,hwmods = "emac1";
252 reg = <0x4a120000 0x4000>;
253 clocks = <&sysclk24_ck>;
254 syscon = <&scm_conf>;
255 ti,davinci-ctrl-reg-offset = <0>;
256 ti,davinci-ctrl-mod-reg-offset = <0x900>;
257 ti,davinci-ctrl-ram-offset = <0x2000>;
258 ti,davinci-ctrl-ram-size = <0x2000>;
259 interrupts = <44 45 46 47>;
260 phy-handle = <&phy1>;
261 };
262
263 mcspi1: spi@48030000 {
264 compatible = "ti,omap4-mcspi";
265 reg = <0x48030000 0x1000>;
266 #address-cells = <1>;
267 #size-cells = <0>;
268 interrupts = <65>;
269 ti,spi-num-cs = <4>;
270 ti,hwmods = "mcspi1";
271 dmas = <&edma 16 &edma 17
272 &edma 18 &edma 19>;
273 dma-names = "tx0", "rx0", "tx1", "rx1";
274 };
275
276 mmc1: mmc@48060000 {
277 compatible = "ti,omap4-hsmmc";
278 reg = <0x48060000 0x11000>;
279 ti,hwmods = "mmc1";
280 interrupts = <64>;
281 dmas = <&edma 24 &edma 25>;
282 dma-names = "tx", "rx";
283 };
284
285 timer1: timer@4802e000 {
286 compatible = "ti,dm816-timer";
287 reg = <0x4802e000 0x2000>;
288 interrupts = <67>;
289 ti,hwmods = "timer1";
290 ti,timer-alwon;
291 };
292
293 timer2: timer@48040000 {
294 compatible = "ti,dm816-timer";
295 reg = <0x48040000 0x2000>;
296 interrupts = <68>;
297 ti,hwmods = "timer2";
298 };
299
300 timer3: timer@48042000 {
301 compatible = "ti,dm816-timer";
302 reg = <0x48042000 0x2000>;
303 interrupts = <69>;
304 ti,hwmods = "timer3";
305 };
306
307 timer4: timer@48044000 {
308 compatible = "ti,dm816-timer";
309 reg = <0x48044000 0x2000>;
310 interrupts = <92>;
311 ti,hwmods = "timer4";
312 };
313
314 timer5: timer@48046000 {
315 compatible = "ti,dm816-timer";
316 reg = <0x48046000 0x2000>;
317 interrupts = <93>;
318 ti,hwmods = "timer5";
319 };
320
321 timer6: timer@48048000 {
322 compatible = "ti,dm816-timer";
323 reg = <0x48048000 0x2000>;
324 interrupts = <94>;
325 ti,hwmods = "timer6";
326 };
327
328 timer7: timer@4804a000 {
329 compatible = "ti,dm816-timer";
330 reg = <0x4804a000 0x2000>;
331 interrupts = <95>;
332 ti,hwmods = "timer7";
333 };
334
335 uart1: uart@48020000 {
336 compatible = "ti,omap3-uart";
337 ti,hwmods = "uart1";
338 reg = <0x48020000 0x2000>;
339 clock-frequency = <48000000>;
340 interrupts = <72>;
341 dmas = <&edma 26 &edma 27>;
342 dma-names = "tx", "rx";
343 };
344
345 uart2: uart@48022000 {
346 compatible = "ti,omap3-uart";
347 ti,hwmods = "uart2";
348 reg = <0x48022000 0x2000>;
349 clock-frequency = <48000000>;
350 interrupts = <73>;
351 dmas = <&edma 28 &edma 29>;
352 dma-names = "tx", "rx";
353 };
354
355 uart3: uart@48024000 {
356 compatible = "ti,omap3-uart";
357 ti,hwmods = "uart3";
358 reg = <0x48024000 0x2000>;
359 clock-frequency = <48000000>;
360 interrupts = <74>;
361 dmas = <&edma 30 &edma 31>;
362 dma-names = "tx", "rx";
363 };
364
365 /* NOTE: USB needs a transceiver driver for phys to work */
366 usb: usb_otg_hs@47401000 {
367 compatible = "ti,am33xx-usb";
368 reg = <0x47401000 0x400000>;
369 ranges;
370 #address-cells = <1>;
371 #size-cells = <1>;
372 ti,hwmods = "usb_otg_hs";
373
374 usb0: usb@47401000 {
375 compatible = "ti,musb-am33xx";
376 reg = <0x47401400 0x400
377 0x47401000 0x200>;
378 reg-names = "mc", "control";
379 interrupts = <18>;
380 interrupt-names = "mc";
381 dr_mode = "host";
382 interface-type = <0>;
383 phys = <&usb_phy0>;
384 phy-names = "usb2-phy";
385 mentor,multipoint = <1>;
386 mentor,num-eps = <16>;
387 mentor,ram-bits = <12>;
388 mentor,power = <500>;
389 };
390
391 usb1: usb@47401800 {
392 compatible = "ti,musb-am33xx";
393 reg = <0x47401c00 0x400
394 0x47401800 0x200>;
395 reg-names = "mc", "control";
396 interrupts = <19>;
397 interrupt-names = "mc";
398 dr_mode = "host";
399 interface-type = <0>;
400 phys = <&usb_phy1>;
401 phy-names = "usb2-phy";
402 mentor,multipoint = <1>;
403 mentor,num-eps = <16>;
404 mentor,ram-bits = <12>;
405 mentor,power = <500>;
406 };
407 };
408
409 wd_timer2: wd_timer@480c2000 {
410 compatible = "ti,omap3-wdt";
411 ti,hwmods = "wd_timer";
412 reg = <0x480c2000 0x1000>;
413 interrupts = <0>;
414 };
415 };
416 };
417
418 #include "dm816x-clocks.dtsi"
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