arch/arm/boot/dts/exynos5.dtsi

   1 /*
   2  * Samsung's Exynos5 SoC series common device tree source
   3  *
   4  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
   8  * SoCs from Exynos5 series can include this file and provide values for SoCs
   9  * specfic bindings.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include "skeleton.dtsi"
  17
  18 / {
  19         interrupt-parent = <&gic>;
  20
  21         aliases {
  22                 serial0 = &serial_0;
  23                 serial1 = &serial_1;
  24                 serial2 = &serial_2;
  25                 serial3 = &serial_3;
  26         };
  27
  28         chipid@10000000 {
  29                 compatible = "samsung,exynos4210-chipid";
  30                 reg = <0x10000000 0x100>;
  31         };
  32
  33         combiner: interrupt-controller@10440000 {
  34                 compatible = "samsung,exynos4210-combiner";
  35                 #interrupt-cells = <2>;
  36                 interrupt-controller;
  37                 samsung,combiner-nr = <32>;
  38                 reg = <0x10440000 0x1000>;
  39                 interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  40                                 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  41                                 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  42                                 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  43                                 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  44                                 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  45                                 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  46                                 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  47         };
  48
  49         gic: interrupt-controller@10481000 {
  50                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  51                 #interrupt-cells = <3>;
  52                 interrupt-controller;
  53                 reg =   <0x10481000 0x1000>,
  54                         <0x10482000 0x1000>,
  55                         <0x10484000 0x2000>,
  56                         <0x10486000 0x2000>;
  57                 interrupts = <1 9 0xf04>;
  58         };
  59
  60         serial_0: serial@12C00000 {
  61                 compatible = "samsung,exynos4210-uart";
  62                 reg = <0x12C00000 0x100>;
  63                 interrupts = <0 51 0>;
  64         };
  65
  66         serial_1: serial@12C10000 {
  67                 compatible = "samsung,exynos4210-uart";
  68                 reg = <0x12C10000 0x100>;
  69                 interrupts = <0 52 0>;
  70         };
  71
  72         serial_2: serial@12C20000 {
  73                 compatible = "samsung,exynos4210-uart";
  74                 reg = <0x12C20000 0x100>;
  75                 interrupts = <0 53 0>;
  76         };
  77
  78         serial_3: serial@12C30000 {
  79                 compatible = "samsung,exynos4210-uart";
  80                 reg = <0x12C30000 0x100>;
  81                 interrupts = <0 54 0>;
  82         };
  83
  84         rtc: rtc@101E0000 {
  85                 compatible = "samsung,s3c6410-rtc";
  86                 reg = <0x101E0000 0x100>;
  87                 interrupts = <0 43 0>, <0 44 0>;
  88                 status = "disabled";
  89         };
  90
  91         poweroff: syscon-poweroff {
  92                 compatible = "syscon-poweroff";
  93                 regmap = <&pmu_system_controller>;
  94                 offset = <0x330C>; /* PS_HOLD_CONTROL */
  95                 mask = <0x5200>; /* reset value */
  96         };
  97
  98         reboot: syscon-reboot {
  99                 compatible = "syscon-reboot";
 100                 regmap = <&pmu_system_controller>;
 101                 offset = <0x0400>; /* SWRESET */
 102                 mask = <0x1>;
 103         };
 104
 105         fimd: fimd@14400000 {
 106                 compatible = "samsung,exynos5250-fimd";
 107                 interrupt-parent = <&combiner>;
 108                 reg = <0x14400000 0x40000>;
 109                 interrupt-names = "fifo", "vsync", "lcd_sys";
 110                 interrupts = <18 4>, <18 5>, <18 6>;
 111                 samsung,sysreg = <&sysreg_system_controller>;
 112                 status = "disabled";
 113         };
 114
 115         dp: dp-controller@145B0000 {
 116                 compatible = "samsung,exynos5-dp";
 117                 reg = <0x145B0000 0x1000>;
 118                 interrupts = <10 3>;
 119                 interrupt-parent = <&combiner>;
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122                 status = "disabled";
 123         };
 124 };