arch/arm/boot/dts/exynos5440.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5440 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 /include/ "skeleton.dtsi"
  13
  14 / {
  15         compatible = "samsung,exynos5440";
  16
  17         interrupt-parent = <&gic>;
  18
  19         clock: clock-controller@0x160000 {
  20                 compatible = "samsung,exynos5440-clock";
  21                 reg = <0x160000 0x1000>;
  22                 #clock-cells = <1>;
  23         };
  24
  25         gic:interrupt-controller@2E0000 {
  26                 compatible = "arm,cortex-a15-gic";
  27                 #interrupt-cells = <3>;
  28                 interrupt-controller;
  29                 reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 cpu@0 {
  37                         compatible = "arm,cortex-a15";
  38                         reg = <0>;
  39                 };
  40                 cpu@1 {
  41                         compatible = "arm,cortex-a15";
  42                         reg = <1>;
  43                 };
  44                 cpu@2 {
  45                         compatible = "arm,cortex-a15";
  46                         reg = <2>;
  47                 };
  48                 cpu@3 {
  49                         compatible = "arm,cortex-a15";
  50                         reg = <3>;
  51                 };
  52         };
  53
  54         timer {
  55                 compatible = "arm,cortex-a15-timer",
  56                              "arm,armv7-timer";
  57                 interrupts = <1 13 0xf08>,
  58                              <1 14 0xf08>,
  59                              <1 11 0xf08>,
  60                              <1 10 0xf08>;
  61                 clock-frequency = <50000000>;
  62         };
  63
  64         serial@B0000 {
  65                 compatible = "samsung,exynos4210-uart";
  66                 reg = <0xB0000 0x1000>;
  67                 interrupts = <0 2 0>;
  68                 clocks = <&clock 21>, <&clock 21>;
  69                 clock-names = "uart", "clk_uart_baud0";
  70         };
  71
  72         serial@C0000 {
  73                 compatible = "samsung,exynos4210-uart";
  74                 reg = <0xC0000 0x1000>;
  75                 interrupts = <0 3 0>;
  76                 clocks = <&clock 21>, <&clock 21>;
  77                 clock-names = "uart", "clk_uart_baud0";
  78         };
  79
  80         spi {
  81                 compatible = "samsung,exynos4210-spi";
  82                 reg = <0xD0000 0x1000>;
  83                 interrupts = <0 4 0>;
  84                 tx-dma-channel = <&pdma0 5>; /* preliminary */
  85                 rx-dma-channel = <&pdma0 4>; /* preliminary */
  86                 #address-cells = <1>;
  87                 #size-cells = <0>;
  88                 clocks = <&clock 21>, <&clock 16>;
  89                 clock-names = "spi", "spi_busclk0";
  90         };
  91
  92         pinctrl {
  93                 compatible = "samsung,exynos5440-pinctrl";
  94                 reg = <0xE0000 0x1000>;
  95                 interrupt-controller;
  96                 #interrupt-cells = <2>;
  97                 #gpio-cells = <2>;
  98
  99                 fan: fan {
 100                         samsung,exynos5440-pin-function = <1>;
 101                 };
 102
 103                 hdd_led0: hdd_led0 {
 104                         samsung,exynos5440-pin-function = <2>;
 105                 };
 106
 107                 hdd_led1: hdd_led1 {
 108                         samsung,exynos5440-pin-function = <3>;
 109                 };
 110
 111                 uart1: uart1 {
 112                         samsung,exynos5440-pin-function = <4>;
 113                 };
 114         };
 115
 116         i2c@F0000 {
 117                 compatible = "samsung,exynos5440-i2c";
 118                 reg = <0xF0000 0x1000>;
 119                 interrupts = <0 5 0>;
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122                 clocks = <&clock 21>;
 123                 clock-names = "i2c";
 124         };
 125
 126         i2c@100000 {
 127                 compatible = "samsung,exynos5440-i2c";
 128                 reg = <0x100000 0x1000>;
 129                 interrupts = <0 6 0>;
 130                 #address-cells = <1>;
 131                 #size-cells = <0>;
 132                 clocks = <&clock 21>;
 133                 clock-names = "i2c";
 134         };
 135
 136         watchdog {
 137                 compatible = "samsung,s3c2410-wdt";
 138                 reg = <0x110000 0x1000>;
 139                 interrupts = <0 1 0>;
 140                 clocks = <&clock 21>;
 141                 clock-names = "watchdog";
 142         };
 143
 144         amba {
 145                 #address-cells = <1>;
 146                 #size-cells = <1>;
 147                 compatible = "arm,amba-bus";
 148                 interrupt-parent = <&gic>;
 149                 ranges;
 150
 151                 pdma0: pdma@121A0000 {
 152                         compatible = "arm,pl330", "arm,primecell";
 153                         reg = <0x120000 0x1000>;
 154                         interrupts = <0 34 0>;
 155                         clocks = <&clock 21>;
 156                         clock-names = "apb_pclk";
 157                         #dma-cells = <1>;
 158                         #dma-channels = <8>;
 159                         #dma-requests = <32>;
 160                 };
 161
 162                 pdma1: pdma@121B0000 {
 163                         compatible = "arm,pl330", "arm,primecell";
 164                         reg = <0x121000 0x1000>;
 165                         interrupts = <0 35 0>;
 166                         clocks = <&clock 21>;
 167                         clock-names = "apb_pclk";
 168                         #dma-cells = <1>;
 169                         #dma-channels = <8>;
 170                         #dma-requests = <32>;
 171                 };
 172         };
 173
 174         rtc {
 175                 compatible = "samsung,s3c6410-rtc";
 176                 reg = <0x130000 0x1000>;
 177                 interrupts = <0 17 0>, <0 16 0>;
 178                 clocks = <&clock 21>;
 179                 clock-names = "rtc";
 180         };
 181 };