arch/arm/boot/dts/imx25-pdk.dts

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 /dts-v1/;
  13 #include <dt-bindings/input/input.h>
  14 #include "imx25.dtsi"
  15
  16 / {
  17         model = "Freescale i.MX25 Product Development Kit";
  18         compatible = "fsl,imx25-pdk", "fsl,imx25";
  19
  20         memory {
  21                 reg = <0x80000000 0x4000000>;
  22         };
  23
  24         regulators {
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 reg_fec_3v3: regulator@0 {
  30                         compatible = "regulator-fixed";
  31                         reg = <0>;
  32                         regulator-name = "fec-3v3";
  33                         regulator-min-microvolt = <3300000>;
  34                         regulator-max-microvolt = <3300000>;
  35                         gpio = <&gpio2 3 0>;
  36                         enable-active-high;
  37                 };
  38
  39                 reg_2p5v: regulator@1 {
  40                         compatible = "regulator-fixed";
  41                         reg = <1>;
  42                         regulator-name = "2P5V";
  43                         regulator-min-microvolt = <2500000>;
  44                         regulator-max-microvolt = <2500000>;
  45                 };
  46
  47                 reg_3p3v: regulator@2 {
  48                         compatible = "regulator-fixed";
  49                         reg = <2>;
  50                         regulator-name = "3P3V";
  51                         regulator-min-microvolt = <3300000>;
  52                         regulator-max-microvolt = <3300000>;
  53                 };
  54
  55                 reg_can_3v3: regulator@3 {
  56                         compatible = "regulator-fixed";
  57                         reg = <3>;
  58                         regulator-name = "can-3v3";
  59                         regulator-min-microvolt = <3300000>;
  60                         regulator-max-microvolt = <3300000>;
  61                         gpio = <&gpio4 6 0>;
  62                 };
  63         };
  64
  65         sound {
  66                 compatible = "fsl,imx25-pdk-sgtl5000",
  67                              "fsl,imx-audio-sgtl5000";
  68                 model = "imx25-pdk-sgtl5000";
  69                 ssi-controller = <&ssi1>;
  70                 audio-codec = <&codec>;
  71                 audio-routing =
  72                         "MIC_IN", "Mic Jack",
  73                         "Mic Jack", "Mic Bias",
  74                         "Headphone Jack", "HP_OUT";
  75                 mux-int-port = <1>;
  76                 mux-ext-port = <4>;
  77         };
  78 };
  79
  80 &audmux {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <&pinctrl_audmux>;
  83         status = "okay";
  84 };
  85
  86 &can1 {
  87         pinctrl-names = "default";
  88         pinctrl-0 = <&pinctrl_can1>;
  89         xceiver-supply = <&reg_can_3v3>;
  90         status = "okay";
  91 };
  92
  93 &esdhc1 {
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&pinctrl_esdhc1>;
  96         cd-gpios = <&gpio2 1 0>;
  97         wp-gpios = <&gpio2 0 0>;
  98         status = "okay";
  99 };
 100
 101 &fec {
 102         phy-mode = "rmii";
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&pinctrl_fec>;
 105         phy-supply = <&reg_fec_3v3>;
 106         phy-reset-gpios = <&gpio4 8 0>;
 107         status = "okay";
 108 };
 109
 110 &i2c1 {
 111         clock-frequency = <100000>;
 112         pinctrl-names = "default";
 113         pinctrl-0 = <&pinctrl_i2c1>;
 114         status = "okay";
 115
 116         codec: sgtl5000@0a {
 117                 compatible = "fsl,sgtl5000";
 118                 reg = <0x0a>;
 119                 clocks = <&clks 129>;
 120                 VDDA-supply = <&reg_2p5v>;
 121                 VDDIO-supply = <&reg_3p3v>;
 122         };
 123 };
 124
 125 &iomuxc {
 126         imx25-pdk {
 127                 pinctrl_audmux: audmuxgrp {
 128                         fsl,pins = <
 129                                 MX25_PAD_RW__AUD4_TXFS                  0xe0
 130                                 MX25_PAD_OE__AUD4_TXC                   0xe0
 131                                 MX25_PAD_EB0__AUD4_TXD                  0xe0
 132                                 MX25_PAD_EB1__AUD4_RXD                  0xe0
 133                         >;
 134                 };
 135
 136                 pinctrl_can1: can1grp {
 137                         fsl,pins = <
 138                                 MX25_PAD_GPIO_A__CAN1_TX                0x0
 139                                 MX25_PAD_GPIO_B__CAN1_RX                0x0
 140                                 MX25_PAD_D14__GPIO_4_6                  0x80000000
 141                         >;
 142                 };
 143
 144                 pinctrl_esdhc1: esdhc1grp {
 145                         fsl,pins = <
 146                                 MX25_PAD_SD1_CMD__SD1_CMD               0x80000000
 147                                 MX25_PAD_SD1_CLK__SD1_CLK               0x80000000
 148                                 MX25_PAD_SD1_DATA0__SD1_DATA0           0x80000000
 149                                 MX25_PAD_SD1_DATA1__SD1_DATA1           0x80000000
 150                                 MX25_PAD_SD1_DATA2__SD1_DATA2           0x80000000
 151                                 MX25_PAD_SD1_DATA3__SD1_DATA3           0x80000000
 152                                 MX25_PAD_A14__GPIO_2_0                  0x80000000
 153                                 MX25_PAD_A15__GPIO_2_1                  0x80000000
 154                         >;
 155                 };
 156
 157                 pinctrl_fec: fecgrp {
 158                         fsl,pins = <
 159                                 MX25_PAD_FEC_MDC__FEC_MDC               0x80000000
 160                                 MX25_PAD_FEC_MDIO__FEC_MDIO             0x400001e0
 161                                 MX25_PAD_FEC_TDATA0__FEC_TDATA0         0x80000000
 162                                 MX25_PAD_FEC_TDATA1__FEC_TDATA1         0x80000000
 163                                 MX25_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
 164                                 MX25_PAD_FEC_RDATA0__FEC_RDATA0         0x80000000
 165                                 MX25_PAD_FEC_RDATA1__FEC_RDATA1         0x80000000
 166                                 MX25_PAD_FEC_RX_DV__FEC_RX_DV           0x80000000
 167                                 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK         0x1c0
 168                                 MX25_PAD_A17__GPIO_2_3                  0x80000000
 169                                 MX25_PAD_D12__GPIO_4_8                  0x80000000
 170                         >;
 171                 };
 172
 173                 pinctrl_i2c1: i2c1grp {
 174                         fsl,pins = <
 175                                 MX25_PAD_I2C1_CLK__I2C1_CLK             0x80000000
 176                                 MX25_PAD_I2C1_DAT__I2C1_DAT             0x80000000
 177                         >;
 178                 };
 179
 180                 pinctrl_kpp: kppgrp {
 181                         fsl,pins = <
 182                                 MX25_PAD_KPP_ROW0__KPP_ROW0     0x80000000
 183                                 MX25_PAD_KPP_ROW1__KPP_ROW1     0x80000000
 184                                 MX25_PAD_KPP_ROW2__KPP_ROW2     0x80000000
 185                                 MX25_PAD_KPP_ROW3__KPP_ROW3     0x80000000
 186                                 MX25_PAD_KPP_COL0__KPP_COL0     0x80000000
 187                                 MX25_PAD_KPP_COL1__KPP_COL1     0x80000000
 188                                 MX25_PAD_KPP_COL2__KPP_COL2     0x80000000
 189                                 MX25_PAD_KPP_COL3__KPP_COL3     0x80000000
 190                         >;
 191                 };
 192
 193
 194                 pinctrl_uart1: uart1grp {
 195                         fsl,pins = <
 196                                 MX25_PAD_UART1_RTS__UART1_RTS           0xe0
 197                                 MX25_PAD_UART1_CTS__UART1_CTS           0xe0
 198                                 MX25_PAD_UART1_TXD__UART1_TXD           0x80000000
 199                                 MX25_PAD_UART1_RXD__UART1_RXD           0xc0
 200                         >;
 201                 };
 202         };
 203 };
 204
 205 &nfc {
 206         nand-on-flash-bbt;
 207         status = "okay";
 208 };
 209
 210 &kpp {
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&pinctrl_kpp>;
 213         linux,keymap = <
 214                         MATRIX_KEY(0x0, 0x0, KEY_UP)
 215                         MATRIX_KEY(0x0, 0x1, KEY_DOWN)
 216                         MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN)
 217                         MATRIX_KEY(0x0, 0x3, KEY_HOME)
 218                         MATRIX_KEY(0x1, 0x0, KEY_RIGHT)
 219                         MATRIX_KEY(0x1, 0x1, KEY_LEFT)
 220                         MATRIX_KEY(0x1, 0x2, KEY_ENTER)
 221                         MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP)
 222                         MATRIX_KEY(0x2, 0x0, KEY_F6)
 223                         MATRIX_KEY(0x2, 0x1, KEY_F8)
 224                         MATRIX_KEY(0x2, 0x2, KEY_F9)
 225                         MATRIX_KEY(0x2, 0x3, KEY_F10)
 226                         MATRIX_KEY(0x3, 0x0, KEY_F1)
 227                         MATRIX_KEY(0x3, 0x1, KEY_F2)
 228                         MATRIX_KEY(0x3, 0x2, KEY_F3)
 229                         MATRIX_KEY(0x3, 0x2, KEY_POWER)
 230         >;
 231         status = "okay";
 232 };
 233
 234 &ssi1 {
 235         codec-handle = <&codec>;
 236         status = "okay";
 237 };
 238
 239 &uart1 {
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&pinctrl_uart1>;
 242         fsl,uart-has-rtscts;
 243         status = "okay";
 244 };
 245
 246 &usbhost1 {
 247         phy_type = "serial";
 248         dr_mode = "host";
 249         status = "okay";
 250 };
 251
 252 &usbotg {
 253         phy_type = "utmi";
 254         dr_mode = "otg";
 255         external-vbus-divider;
 256         status = "okay";
 257 };