arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include "imx27-pinfunc.h"
  14 #include <dt-bindings/input/input.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         aliases {
  20                 ethernet0 = &fec;
  21                 gpio0 = &gpio1;
  22                 gpio1 = &gpio2;
  23                 gpio2 = &gpio3;
  24                 gpio3 = &gpio4;
  25                 gpio4 = &gpio5;
  26                 gpio5 = &gpio6;
  27                 i2c0 = &i2c1;
  28                 i2c1 = &i2c2;
  29                 serial0 = &uart1;
  30                 serial1 = &uart2;
  31                 serial2 = &uart3;
  32                 serial3 = &uart4;
  33                 serial4 = &uart5;
  34                 serial5 = &uart6;
  35                 spi0 = &cspi1;
  36                 spi1 = &cspi2;
  37                 spi2 = &cspi3;
  38         };
  39
  40         aitc: aitc-interrupt-controller@e0000000 {
  41                 compatible = "fsl,imx27-aitc", "fsl,avic";
  42                 interrupt-controller;
  43                 #interrupt-cells = <1>;
  44                 reg = <0x10040000 0x1000>;
  45         };
  46
  47         clocks {
  48                 #address-cells = <1>;
  49                 #size-cells = <0>;
  50
  51                 osc26m {
  52                         compatible = "fsl,imx-osc26m", "fixed-clock";
  53                         #clock-cells = <0>;
  54                         clock-frequency = <26000000>;
  55                 };
  56         };
  57
  58         cpus {
  59                 #size-cells = <0>;
  60                 #address-cells = <1>;
  61
  62                 cpu: cpu@0 {
  63                         device_type = "cpu";
  64                         compatible = "arm,arm926ej-s";
  65                         operating-points = <
  66                                 /* kHz uV */
  67                                 266000 1300000
  68                                 399000 1450000
  69                         >;
  70                         clock-latency = <62500>;
  71                         clocks = <&clks 18>;
  72                         voltage-tolerance = <5>;
  73                 };
  74         };
  75
  76         soc {
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 compatible = "simple-bus";
  80                 interrupt-parent = <&aitc>;
  81                 ranges;
  82
  83                 aipi@10000000 { /* AIPI1 */
  84                         compatible = "fsl,aipi-bus", "simple-bus";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87                         reg = <0x10000000 0x20000>;
  88                         ranges;
  89
  90                         dma: dma@10001000 {
  91                                 compatible = "fsl,imx27-dma";
  92                                 reg = <0x10001000 0x1000>;
  93                                 interrupts = <32>;
  94                                 clocks = <&clks 50>, <&clks 70>;
  95                                 clock-names = "ipg", "ahb";
  96                                 #dma-cells = <1>;
  97                                 #dma-channels = <16>;
  98                         };
  99
 100                         wdog: wdog@10002000 {
 101                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
 102                                 reg = <0x10002000 0x1000>;
 103                                 interrupts = <27>;
 104                                 clocks = <&clks 74>;
 105                         };
 106
 107                         gpt1: timer@10003000 {
 108                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 109                                 reg = <0x10003000 0x1000>;
 110                                 interrupts = <26>;
 111                                 clocks = <&clks 46>, <&clks 61>;
 112                                 clock-names = "ipg", "per";
 113                         };
 114
 115                         gpt2: timer@10004000 {
 116                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 117                                 reg = <0x10004000 0x1000>;
 118                                 interrupts = <25>;
 119                                 clocks = <&clks 45>, <&clks 61>;
 120                                 clock-names = "ipg", "per";
 121                         };
 122
 123                         gpt3: timer@10005000 {
 124                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 125                                 reg = <0x10005000 0x1000>;
 126                                 interrupts = <24>;
 127                                 clocks = <&clks 44>, <&clks 61>;
 128                                 clock-names = "ipg", "per";
 129                         };
 130
 131                         pwm: pwm@10006000 {
 132                                 #pwm-cells = <2>;
 133                                 compatible = "fsl,imx27-pwm";
 134                                 reg = <0x10006000 0x1000>;
 135                                 interrupts = <23>;
 136                                 clocks = <&clks 34>, <&clks 61>;
 137                                 clock-names = "ipg", "per";
 138                         };
 139
 140                         kpp: kpp@10008000 {
 141                                 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
 142                                 reg = <0x10008000 0x1000>;
 143                                 interrupts = <21>;
 144                                 clocks = <&clks 37>;
 145                                 status = "disabled";
 146                         };
 147
 148                         owire: owire@10009000 {
 149                                 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
 150                                 reg = <0x10009000 0x1000>;
 151                                 clocks = <&clks 35>;
 152                                 status = "disabled";
 153                         };
 154
 155                         uart1: serial@1000a000 {
 156                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 157                                 reg = <0x1000a000 0x1000>;
 158                                 interrupts = <20>;
 159                                 clocks = <&clks 81>, <&clks 61>;
 160                                 clock-names = "ipg", "per";
 161                                 status = "disabled";
 162                         };
 163
 164                         uart2: serial@1000b000 {
 165                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 166                                 reg = <0x1000b000 0x1000>;
 167                                 interrupts = <19>;
 168                                 clocks = <&clks 80>, <&clks 61>;
 169                                 clock-names = "ipg", "per";
 170                                 status = "disabled";
 171                         };
 172
 173                         uart3: serial@1000c000 {
 174                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 175                                 reg = <0x1000c000 0x1000>;
 176                                 interrupts = <18>;
 177                                 clocks = <&clks 79>, <&clks 61>;
 178                                 clock-names = "ipg", "per";
 179                                 status = "disabled";
 180                         };
 181
 182                         uart4: serial@1000d000 {
 183                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 184                                 reg = <0x1000d000 0x1000>;
 185                                 interrupts = <17>;
 186                                 clocks = <&clks 78>, <&clks 61>;
 187                                 clock-names = "ipg", "per";
 188                                 status = "disabled";
 189                         };
 190
 191                         cspi1: cspi@1000e000 {
 192                                 #address-cells = <1>;
 193                                 #size-cells = <0>;
 194                                 compatible = "fsl,imx27-cspi";
 195                                 reg = <0x1000e000 0x1000>;
 196                                 interrupts = <16>;
 197                                 clocks = <&clks 53>, <&clks 60>;
 198                                 clock-names = "ipg", "per";
 199                                 status = "disabled";
 200                         };
 201
 202                         cspi2: cspi@1000f000 {
 203                                 #address-cells = <1>;
 204                                 #size-cells = <0>;
 205                                 compatible = "fsl,imx27-cspi";
 206                                 reg = <0x1000f000 0x1000>;
 207                                 interrupts = <15>;
 208                                 clocks = <&clks 52>, <&clks 60>;
 209                                 clock-names = "ipg", "per";
 210                                 status = "disabled";
 211                         };
 212
 213                         ssi1: ssi@10010000 {
 214                                 #sound-dai-cells = <0>;
 215                                 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
 216                                 reg = <0x10010000 0x1000>;
 217                                 interrupts = <14>;
 218                                 clocks = <&clks 26>;
 219                                 dmas = <&dma 12>, <&dma 13>, <&dma 14>, <&dma 15>;
 220                                 dma-names = "rx0", "tx0", "rx1", "tx1";
 221                                 fsl,fifo-depth = <8>;
 222                                 status = "disabled";
 223                         };
 224
 225                         ssi2: ssi@10011000 {
 226                                 #sound-dai-cells = <0>;
 227                                 compatible = "fsl,imx27-ssi", "fsl,imx21-ssi";
 228                                 reg = <0x10011000 0x1000>;
 229                                 interrupts = <13>;
 230                                 clocks = <&clks 25>;
 231                                 dmas = <&dma 8>, <&dma 9>, <&dma 10>, <&dma 11>;
 232                                 dma-names = "rx0", "tx0", "rx1", "tx1";
 233                                 fsl,fifo-depth = <8>;
 234                                 status = "disabled";
 235                         };
 236
 237                         i2c1: i2c@10012000 {
 238                                 #address-cells = <1>;
 239                                 #size-cells = <0>;
 240                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 241                                 reg = <0x10012000 0x1000>;
 242                                 interrupts = <12>;
 243                                 clocks = <&clks 40>;
 244                                 status = "disabled";
 245                         };
 246
 247                         sdhci1: sdhci@10013000 {
 248                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 249                                 reg = <0x10013000 0x1000>;
 250                                 interrupts = <11>;
 251                                 clocks = <&clks 30>, <&clks 60>;
 252                                 clock-names = "ipg", "per";
 253                                 dmas = <&dma 7>;
 254                                 dma-names = "rx-tx";
 255                                 status = "disabled";
 256                         };
 257
 258                         sdhci2: sdhci@10014000 {
 259                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 260                                 reg = <0x10014000 0x1000>;
 261                                 interrupts = <10>;
 262                                 clocks = <&clks 29>, <&clks 60>;
 263                                 clock-names = "ipg", "per";
 264                                 dmas = <&dma 6>;
 265                                 dma-names = "rx-tx";
 266                                 status = "disabled";
 267                         };
 268
 269                         iomuxc: iomuxc@10015000 {
 270                                 compatible = "fsl,imx27-iomuxc";
 271                                 reg = <0x10015000 0x600>;
 272                                 #address-cells = <1>;
 273                                 #size-cells = <1>;
 274                                 ranges;
 275
 276                                 gpio1: gpio@10015000 {
 277                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 278                                         reg = <0x10015000 0x100>;
 279                                         interrupts = <8>;
 280                                         gpio-controller;
 281                                         #gpio-cells = <2>;
 282                                         interrupt-controller;
 283                                         #interrupt-cells = <2>;
 284                                 };
 285
 286                                 gpio2: gpio@10015100 {
 287                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 288                                         reg = <0x10015100 0x100>;
 289                                         interrupts = <8>;
 290                                         gpio-controller;
 291                                         #gpio-cells = <2>;
 292                                         interrupt-controller;
 293                                         #interrupt-cells = <2>;
 294                                 };
 295
 296                                 gpio3: gpio@10015200 {
 297                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 298                                         reg = <0x10015200 0x100>;
 299                                         interrupts = <8>;
 300                                         gpio-controller;
 301                                         #gpio-cells = <2>;
 302                                         interrupt-controller;
 303                                         #interrupt-cells = <2>;
 304                                 };
 305
 306                                 gpio4: gpio@10015300 {
 307                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 308                                         reg = <0x10015300 0x100>;
 309                                         interrupts = <8>;
 310                                         gpio-controller;
 311                                         #gpio-cells = <2>;
 312                                         interrupt-controller;
 313                                         #interrupt-cells = <2>;
 314                                 };
 315
 316                                 gpio5: gpio@10015400 {
 317                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 318                                         reg = <0x10015400 0x100>;
 319                                         interrupts = <8>;
 320                                         gpio-controller;
 321                                         #gpio-cells = <2>;
 322                                         interrupt-controller;
 323                                         #interrupt-cells = <2>;
 324                                 };
 325
 326                                 gpio6: gpio@10015500 {
 327                                         compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 328                                         reg = <0x10015500 0x100>;
 329                                         interrupts = <8>;
 330                                         gpio-controller;
 331                                         #gpio-cells = <2>;
 332                                         interrupt-controller;
 333                                         #interrupt-cells = <2>;
 334                                 };
 335                         };
 336
 337                         audmux: audmux@10016000 {
 338                                 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
 339                                 reg = <0x10016000 0x1000>;
 340                                 clocks = <&clks 0>;
 341                                 clock-names = "audmux";
 342                                 status = "disabled";
 343                         };
 344
 345                         cspi3: cspi@10017000 {
 346                                 #address-cells = <1>;
 347                                 #size-cells = <0>;
 348                                 compatible = "fsl,imx27-cspi";
 349                                 reg = <0x10017000 0x1000>;
 350                                 interrupts = <6>;
 351                                 clocks = <&clks 51>, <&clks 60>;
 352                                 clock-names = "ipg", "per";
 353                                 status = "disabled";
 354                         };
 355
 356                         gpt4: timer@10019000 {
 357                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 358                                 reg = <0x10019000 0x1000>;
 359                                 interrupts = <4>;
 360                                 clocks = <&clks 43>, <&clks 61>;
 361                                 clock-names = "ipg", "per";
 362                         };
 363
 364                         gpt5: timer@1001a000 {
 365                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 366                                 reg = <0x1001a000 0x1000>;
 367                                 interrupts = <3>;
 368                                 clocks = <&clks 42>, <&clks 61>;
 369                                 clock-names = "ipg", "per";
 370                         };
 371
 372                         uart5: serial@1001b000 {
 373                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 374                                 reg = <0x1001b000 0x1000>;
 375                                 interrupts = <49>;
 376                                 clocks = <&clks 77>, <&clks 61>;
 377                                 clock-names = "ipg", "per";
 378                                 status = "disabled";
 379                         };
 380
 381                         uart6: serial@1001c000 {
 382                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 383                                 reg = <0x1001c000 0x1000>;
 384                                 interrupts = <48>;
 385                                 clocks = <&clks 78>, <&clks 61>;
 386                                 clock-names = "ipg", "per";
 387                                 status = "disabled";
 388                         };
 389
 390                         i2c2: i2c@1001d000 {
 391                                 #address-cells = <1>;
 392                                 #size-cells = <0>;
 393                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 394                                 reg = <0x1001d000 0x1000>;
 395                                 interrupts = <1>;
 396                                 clocks = <&clks 39>;
 397                                 status = "disabled";
 398                         };
 399
 400                         sdhci3: sdhci@1001e000 {
 401                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 402                                 reg = <0x1001e000 0x1000>;
 403                                 interrupts = <9>;
 404                                 clocks = <&clks 28>, <&clks 60>;
 405                                 clock-names = "ipg", "per";
 406                                 dmas = <&dma 36>;
 407                                 dma-names = "rx-tx";
 408                                 status = "disabled";
 409                         };
 410
 411                         gpt6: timer@1001f000 {
 412                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 413                                 reg = <0x1001f000 0x1000>;
 414                                 interrupts = <2>;
 415                                 clocks = <&clks 41>, <&clks 61>;
 416                                 clock-names = "ipg", "per";
 417                         };
 418                 };
 419
 420                 aipi@10020000 { /* AIPI2 */
 421                         compatible = "fsl,aipi-bus", "simple-bus";
 422                         #address-cells = <1>;
 423                         #size-cells = <1>;
 424                         reg = <0x10020000 0x20000>;
 425                         ranges;
 426
 427                         fb: fb@10021000 {
 428                                 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
 429                                 interrupts = <61>;
 430                                 reg = <0x10021000 0x1000>;
 431                                 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
 432                                 clock-names = "ipg", "ahb", "per";
 433                                 status = "disabled";
 434                         };
 435
 436                         coda: coda@10023000 {
 437                                 compatible = "fsl,imx27-vpu";
 438                                 reg = <0x10023000 0x0200>;
 439                                 interrupts = <53>;
 440                                 clocks = <&clks 57>, <&clks 66>;
 441                                 clock-names = "per", "ahb";
 442                                 iram = <&iram>;
 443                         };
 444
 445                         usbotg: usb@10024000 {
 446                                 compatible = "fsl,imx27-usb";
 447                                 reg = <0x10024000 0x200>;
 448                                 interrupts = <56>;
 449                                 clocks = <&clks 75>;
 450                                 fsl,usbmisc = <&usbmisc 0>;
 451                                 status = "disabled";
 452                         };
 453
 454                         usbh1: usb@10024200 {
 455                                 compatible = "fsl,imx27-usb";
 456                                 reg = <0x10024200 0x200>;
 457                                 interrupts = <54>;
 458                                 clocks = <&clks 75>;
 459                                 fsl,usbmisc = <&usbmisc 1>;
 460                                 status = "disabled";
 461                         };
 462
 463                         usbh2: usb@10024400 {
 464                                 compatible = "fsl,imx27-usb";
 465                                 reg = <0x10024400 0x200>;
 466                                 interrupts = <55>;
 467                                 clocks = <&clks 75>;
 468                                 fsl,usbmisc = <&usbmisc 2>;
 469                                 status = "disabled";
 470                         };
 471
 472                         usbmisc: usbmisc@10024600 {
 473                                 #index-cells = <1>;
 474                                 compatible = "fsl,imx27-usbmisc";
 475                                 reg = <0x10024600 0x200>;
 476                                 clocks = <&clks 62>;
 477                         };
 478
 479                         sahara2: sahara@10025000 {
 480                                 compatible = "fsl,imx27-sahara";
 481                                 reg = <0x10025000 0x1000>;
 482                                 interrupts = <59>;
 483                                 clocks = <&clks 32>, <&clks 64>;
 484                                 clock-names = "ipg", "ahb";
 485                         };
 486
 487                         clks: ccm@10027000{
 488                                 compatible = "fsl,imx27-ccm";
 489                                 reg = <0x10027000 0x1000>;
 490                                 #clock-cells = <1>;
 491                         };
 492
 493                         iim: iim@10028000 {
 494                                 compatible = "fsl,imx27-iim";
 495                                 reg = <0x10028000 0x1000>;
 496                                 interrupts = <62>;
 497                                 clocks = <&clks 38>;
 498                         };
 499
 500                         fec: ethernet@1002b000 {
 501                                 compatible = "fsl,imx27-fec";
 502                                 reg = <0x1002b000 0x4000>;
 503                                 interrupts = <50>;
 504                                 clocks = <&clks 48>, <&clks 67>;
 505                                 clock-names = "ipg", "ahb";
 506                                 status = "disabled";
 507                         };
 508                 };
 509
 510                 nfc: nand@d8000000 {
 511                         #address-cells = <1>;
 512                         #size-cells = <1>;
 513                         compatible = "fsl,imx27-nand";
 514                         reg = <0xd8000000 0x1000>;
 515                         interrupts = <29>;
 516                         clocks = <&clks 54>;
 517                         status = "disabled";
 518                 };
 519
 520                 weim: weim@d8002000 {
 521                         #address-cells = <2>;
 522                         #size-cells = <1>;
 523                         compatible = "fsl,imx27-weim";
 524                         reg = <0xd8002000 0x1000>;
 525                         clocks = <&clks 0>;
 526                         ranges = <
 527                                 0 0 0xc0000000 0x08000000
 528                                 1 0 0xc8000000 0x08000000
 529                                 2 0 0xd0000000 0x02000000
 530                                 3 0 0xd2000000 0x02000000
 531                                 4 0 0xd4000000 0x02000000
 532                                 5 0 0xd6000000 0x02000000
 533                         >;
 534                         status = "disabled";
 535                 };
 536
 537                 iram: iram@ffff4c00 {
 538                         compatible = "mmio-sram";
 539                         reg = <0xffff4c00 0xb400>;
 540                 };
 541         };
 542 };