arch/arm/boot/dts/imx6q-ba16.dtsi

   1 /*
   2  * Support for imx6 based Advantech DMS-BA16 Qseven module
   3  *
   4  * Copyright 2015 Timesys Corporation.
   5  * Copyright 2015 General Electric Company
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License
  14  *     version 2 as published by the Free Software Foundation.
  15  *
  16  *     This file is distributed in the hope that it will be useful
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include "imx6q.dtsi"
  46 #include <dt-bindings/gpio/gpio.h>
  47
  48 / {
  49         memory {
  50                 reg = <0x10000000 0x40000000>;
  51         };
  52
  53         backlight_lvds: backlight {
  54                 compatible = "pwm-backlight";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&pinctrl_display>;
  57                 pwms = <&pwm1 0 5000000>;
  58                 brightness-levels = <  0   1   2   3   4   5   6   7   8   9
  59                                       10  11  12  13  14  15  16  17  18  19
  60                                       20  21  22  23  24  25  26  27  28  29
  61                                       30  31  32  33  34  35  36  37  38  39
  62                                       40  41  42  43  44  45  46  47  48  49
  63                                       50  51  52  53  54  55  56  57  58  59
  64                                       60  61  62  63  64  65  66  67  68  69
  65                                       70  71  72  73  74  75  76  77  78  79
  66                                       80  81  82  83  84  85  86  87  88  89
  67                                       90  91  92  93  94  95  96  97  98  99
  68                                      100 101 102 103 104 105 106 107 108 109
  69                                      110 111 112 113 114 115 116 117 118 119
  70                                      120 121 122 123 124 125 126 127 128 129
  71                                      130 131 132 133 134 135 136 137 138 139
  72                                      140 141 142 143 144 145 146 147 148 149
  73                                      150 151 152 153 154 155 156 157 158 159
  74                                      160 161 162 163 164 165 166 167 168 169
  75                                      170 171 172 173 174 175 176 177 178 179
  76                                      180 181 182 183 184 185 186 187 188 189
  77                                      190 191 192 193 194 195 196 197 198 199
  78                                      200 201 202 203 204 205 206 207 208 209
  79                                      210 211 212 213 214 215 216 217 218 219
  80                                      220 221 222 223 224 225 226 227 228 229
  81                                      230 231 232 233 234 235 236 237 238 239
  82                                      240 241 242 243 244 245 246 247 248 249
  83                                      250 251 252 253 254 255>;
  84                 default-brightness-level = <255>;
  85                 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  86         };
  87
  88         reg_1p8v: regulator-1p8v {
  89                 compatible = "regulator-fixed";
  90                 regulator-name = "1P8V";
  91                 regulator-min-microvolt = <1800000>;
  92                 regulator-max-microvolt = <1800000>;
  93                 regulator-always-on;
  94         };
  95
  96         reg_3p3v: regulator-3p3v {
  97                 compatible = "regulator-fixed";
  98                 regulator-name = "3P3V";
  99                 regulator-min-microvolt = <3300000>;
 100                 regulator-max-microvolt = <3300000>;
 101                 regulator-always-on;
 102         };
 103
 104         reg_lvds: regulator-lvds {
 105                 compatible = "regulator-fixed";
 106                 regulator-name = "lvds_ppen";
 107                 regulator-min-microvolt = <3300000>;
 108                 regulator-max-microvolt = <3300000>;
 109                 regulator-boot-on;
 110                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 111                 enable-active-high;
 112         };
 113
 114         reg_usb_h1_vbus: regulator-usbh1vbus {
 115                 compatible = "regulator-fixed";
 116                 regulator-name = "usb_h1_vbus";
 117                 regulator-min-microvolt = <5000000>;
 118                 regulator-max-microvolt = <5000000>;
 119         };
 120
 121         reg_usb_otg_vbus: regulator-usbotgvbus {
 122                 compatible = "regulator-fixed";
 123                 regulator-name = "usb_otg_vbus";
 124                 regulator-min-microvolt = <5000000>;
 125                 regulator-max-microvolt = <5000000>;
 126         };
 127 };
 128
 129 &audmux {
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_audmux>;
 132         status = "okay";
 133 };
 134
 135 &ecspi1 {
 136         fsl,spi-num-chipselects = <1>;
 137         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
 138         pinctrl-names = "default";
 139         pinctrl-0 = <&pinctrl_ecspi1>;
 140         status = "okay";
 141
 142         flash: n25q032@0 {
 143                 compatible = "jedec,spi-nor";
 144                 #address-cells = <1>;
 145                 #size-cells = <1>;
 146                 spi-max-frequency = <20000000>;
 147                 reg = <0>;
 148
 149                 partition@0 {
 150                         label = "U-Boot";
 151                         reg = <0x0 0xc0000>;
 152                 };
 153
 154                 partition@c0000 {
 155                         label = "env";
 156                         reg = <0xc0000 0x10000>;
 157                 };
 158
 159                 partition@d0000 {
 160                         label = "spare";
 161                         reg = <0xd0000 0x130000>;
 162                 };
 163         };
 164 };
 165
 166 &fec {
 167         pinctrl-names = "default";
 168         pinctrl-0 = <&pinctrl_enet>;
 169         phy-mode = "rgmii";
 170         status = "okay";
 171 };
 172
 173 &hdmi {
 174         ddc-i2c-bus = <&i2c2>;
 175         status = "okay";
 176 };
 177
 178 &i2c1 {
 179         clock-frequency = <100000>;
 180         pinctrl-names = "default";
 181         pinctrl-0 = <&pinctrl_i2c1>;
 182         status = "okay";
 183 };
 184
 185 &i2c2 {
 186         clock-frequency = <100000>;
 187         pinctrl-names = "default";
 188         pinctrl-0 = <&pinctrl_i2c2>;
 189         status = "okay";
 190 };
 191
 192 &i2c3 {
 193         clock-frequency = <100000>;
 194         pinctrl-names = "default";
 195         pinctrl-0 = <&pinctrl_i2c3>;
 196         status = "okay";
 197
 198         pmic@58 {
 199                 compatible = "dlg,da9063";
 200                 reg = <0x58>;
 201                 pinctrl-names = "default";
 202                 pinctrl-0 = <&pinctrl_pmic>;
 203                 interrupt-parent = <&gpio7>;
 204                 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
 205
 206                 onkey {
 207                         compatible = "dlg,da9063-onkey";
 208                 };
 209
 210                 regulators {
 211                         vdd_bcore1: bcore1 {
 212                                 regulator-min-microvolt = <1420000>;
 213                                 regulator-max-microvolt = <1420000>;
 214                                 regulator-always-on;
 215                                 regulator-boot-on;
 216                         };
 217
 218                         vdd_bcore2: bcore2 {
 219                                 regulator-min-microvolt = <1420000>;
 220                                 regulator-max-microvolt = <1420000>;
 221                                 regulator-always-on;
 222                                 regulator-boot-on;
 223                         };
 224
 225                         vdd_bpro: bpro {
 226                                 regulator-min-microvolt = <1500000>;
 227                                 regulator-max-microvolt = <1500000>;
 228                                 regulator-always-on;
 229                                 regulator-boot-on;
 230                         };
 231
 232                         vdd_bmem: bmem {
 233                                 regulator-min-microvolt = <1800000>;
 234                                 regulator-max-microvolt = <1800000>;
 235                                 regulator-always-on;
 236                                 regulator-boot-on;
 237                         };
 238
 239                         vdd_bio: bio {
 240                                 regulator-min-microvolt = <1800000>;
 241                                 regulator-max-microvolt = <1800000>;
 242                                 regulator-always-on;
 243                                 regulator-boot-on;
 244                         };
 245
 246                         vdd_bperi: bperi {
 247                                 regulator-min-microvolt = <3300000>;
 248                                 regulator-max-microvolt = <3300000>;
 249                                 regulator-always-on;
 250                                 regulator-boot-on;
 251                         };
 252
 253                         vdd_ldo1: ldo1 {
 254                                 regulator-min-microvolt = <600000>;
 255                                 regulator-max-microvolt = <1860000>;
 256                         };
 257
 258                         vdd_ldo2: ldo2 {
 259                                 regulator-min-microvolt = <600000>;
 260                                 regulator-max-microvolt = <1860000>;
 261                         };
 262
 263                         vdd_ldo3: ldo3 {
 264                                 regulator-min-microvolt = <900000>;
 265                                 regulator-max-microvolt = <3440000>;
 266                         };
 267
 268                         vdd_ldo4: ldo4 {
 269                                 regulator-min-microvolt = <900000>;
 270                                 regulator-max-microvolt = <3440000>;
 271                         };
 272
 273                         vdd_ldo5: ldo5 {
 274                                 regulator-min-microvolt = <900000>;
 275                                 regulator-max-microvolt = <3600000>;
 276                         };
 277
 278                         vdd_ldo6: ldo6 {
 279                                 regulator-min-microvolt = <900000>;
 280                                 regulator-max-microvolt = <3600000>;
 281                         };
 282
 283                         vdd_ldo7: ldo7 {
 284                                 regulator-min-microvolt = <900000>;
 285                                 regulator-max-microvolt = <3600000>;
 286                         };
 287
 288                         vdd_ldo8: ldo8 {
 289                                 regulator-min-microvolt = <900000>;
 290                                 regulator-max-microvolt = <3600000>;
 291                         };
 292
 293                         vdd_ldo9: ldo9 {
 294                                 regulator-min-microvolt = <950000>;
 295                                 regulator-max-microvolt = <3600000>;
 296                         };
 297
 298                         vdd_ldo10: ldo10 {
 299                                 regulator-min-microvolt = <900000>;
 300                                 regulator-max-microvolt = <3600000>;
 301                         };
 302
 303                         vdd_ldo11: ldo11 {
 304                                 regulator-min-microvolt = <900000>;
 305                                 regulator-max-microvolt = <3600000>;
 306                                 regulator-always-on;
 307                                 regulator-boot-on;
 308                         };
 309                 };
 310         };
 311
 312         rtc@32 {
 313                 compatible = "epson,rx8010";
 314                 pinctrl-names = "default";
 315                 pinctrl-0 = <&pinctrl_rtc>;
 316                 reg = <0x32>;
 317                 interrupt-parent = <&gpio4>;
 318                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 319         };
 320 };
 321
 322 &pcie {
 323         pinctrl-names = "default";
 324         pinctrl-0 = <&pinctrl_pcie>;
 325         reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
 326         status = "okay";
 327 };
 328
 329 &pwm1 {
 330         pinctrl-names = "default";
 331         pinctrl-0 = <&pinctrl_pwm1>;
 332         status = "okay";
 333 };
 334
 335 &pwm2 {
 336         pinctrl-names = "default";
 337         pinctrl-0 = <&pinctrl_pwm2>;
 338         status = "okay";
 339 };
 340
 341 &sata {
 342         status = "okay";
 343 };
 344
 345 &ssi1 {
 346         status = "okay";
 347 };
 348
 349 &uart3 {
 350         pinctrl-names = "default";
 351         pinctrl-0 = <&pinctrl_uart3>;
 352         fsl,uart-has-rtscts;
 353         status = "okay";
 354 };
 355
 356 &uart4 {
 357         pinctrl-names = "default";
 358         pinctrl-0 = <&pinctrl_uart4>;
 359         status = "okay";
 360 };
 361
 362 &usbh1 {
 363         pinctrl-names = "default";
 364         pinctrl-0 = <&pinctrl_usbhub>;
 365         vbus-supply = <&reg_usb_h1_vbus>;
 366         reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
 367         status = "okay";
 368 };
 369
 370 &usbotg {
 371         vbus-supply = <&reg_usb_otg_vbus>;
 372         pinctrl-names = "default";
 373         pinctrl-0 = <&pinctrl_usbotg>;
 374         disable-over-current;
 375         status = "okay";
 376 };
 377
 378 &usdhc2 {
 379         pinctrl-names = "default";
 380         pinctrl-0 = <&pinctrl_usdhc2>;
 381         cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 382         no-1-8-v;
 383         keep-power-in-suspend;
 384         wakeup-source;
 385         status = "okay";
 386 };
 387
 388 &usdhc3 {
 389         pinctrl-names = "default";
 390         pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
 391         bus-width = <8>;
 392         vmmc-supply = <&vdd_bperi>;
 393         vqmmc-supply = <&vdd_bio>;
 394         non-removable;
 395         keep-power-in-suspend;
 396         status = "okay";
 397 };
 398
 399 &wdog1 {
 400         pinctrl-names = "default";
 401         pinctrl-0 = <&pinctrl_wdog>;
 402 };
 403
 404 &iomuxc {
 405         pinctrl-names = "default";
 406         pinctrl-0 = <&pinctrl_hog>;
 407
 408         pinctrl_audmux: audmuxgrp {
 409                 fsl,pins = <
 410                         MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
 411                         MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x130b0
 412                         MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
 413                         MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
 414                 >;
 415         };
 416
 417         pinctrl_display: dispgrp {
 418                 fsl,pins = <
 419                         /* BLEN_OUT */
 420                         MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x1b0b0
 421                         /* LVDS_PPEN_OUT */
 422                         MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x1b0b0
 423                 >;
 424         };
 425
 426         pinctrl_ecspi1: ecspi1grp {
 427                 fsl,pins = <
 428                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
 429                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
 430                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
 431                         /* SPI1 CS */
 432                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30  0x1b0b0
 433                 >;
 434         };
 435
 436         pinctrl_ecspi5: ecspi5grp {
 437                 fsl,pins = <
 438                         MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x1b0b0
 439                         MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI         0x1b0b0
 440                         MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK         0x1b0b0
 441                         MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b0
 442                 >;
 443         };
 444
 445         pinctrl_enet: enetgrp {
 446                 fsl,pins = <
 447                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x100b0
 448                         MX6QDL_PAD_ENET_MDC__ENET_MDC         0x100b0
 449                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x100b0
 450                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x100b0
 451                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x100b0
 452                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x100b0
 453                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x100b0
 454                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
 455                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
 456                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
 457                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
 458                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
 459                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
 460                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
 461                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
 462                         /* FEC Reset */
 463                         MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x1b0b0
 464                         /* AR8033 Interrupt */
 465                         MX6QDL_PAD_GPIO_19__GPIO4_IO05        0x1b0b0
 466                 >;
 467         };
 468
 469         pinctrl_hog: hoggrp {
 470                 fsl,pins = <
 471                         /* GPIO 0-7 */
 472                         MX6QDL_PAD_NANDF_D0__GPIO2_IO00  0x1b0b0
 473                         MX6QDL_PAD_NANDF_D1__GPIO2_IO01  0x1b0b0
 474                         MX6QDL_PAD_NANDF_D2__GPIO2_IO02  0x1b0b0
 475                         MX6QDL_PAD_NANDF_D3__GPIO2_IO03  0x1b0b0
 476                         MX6QDL_PAD_NANDF_D4__GPIO2_IO04  0x1b0b0
 477                         MX6QDL_PAD_NANDF_D5__GPIO2_IO05  0x1b0b0
 478                         MX6QDL_PAD_NANDF_D6__GPIO2_IO06  0x1b0b0
 479                         MX6QDL_PAD_NANDF_D7__GPIO2_IO07  0x1b0b0
 480                         /* SUS_S3_OUT to CPLD */
 481                         MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
 482                 >;
 483         };
 484
 485         pinctrl_i2c1: i2c1grp {
 486                 fsl,pins = <
 487                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA  0x4001b8b1
 488                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL  0x4001b8b1
 489                 >;
 490         };
 491
 492         pinctrl_i2c2: i2c2grp {
 493                 fsl,pins = <
 494                         MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
 495                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
 496                 >;
 497         };
 498
 499         pinctrl_i2c3: i2c3grp {
 500                 fsl,pins = <
 501                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
 502                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
 503                 >;
 504         };
 505
 506         pinctrl_pcie: pciegrp {
 507                 fsl,pins = <
 508                         /* PCIe Reset */
 509                         MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x1b0b0
 510                         /* PCIe Wake */
 511                         MX6QDL_PAD_GPIO_5__GPIO1_IO05   0x1b0b0
 512                 >;
 513         };
 514
 515         pinctrl_pmic: pmicgrp {
 516                 fsl,pins = <
 517                         /* PMIC Interrupt */
 518                         MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b0b0
 519                 >;
 520         };
 521
 522         pinctrl_pwm1: pwm1grp {
 523                 fsl,pins = <
 524                         MX6QDL_PAD_SD1_DAT3__PWM1_OUT   0x1b0b1
 525                 >;
 526         };
 527
 528         pinctrl_pwm2: pwm2grp {
 529                 fsl,pins = <
 530                         MX6QDL_PAD_GPIO_1__PWM2_OUT     0x1b0b1
 531                 >;
 532         };
 533
 534         pinctrl_rtc: rtcgrp {
 535                 fsl,pins = <
 536                         /* RTC_INT */
 537                         MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
 538                 >;
 539         };
 540
 541         pinctrl_uart3: uart3grp {
 542                 fsl,pins = <
 543                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
 544                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
 545                         MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
 546                         MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
 547                 >;
 548         };
 549
 550         pinctrl_uart4: uart4grp {
 551                 fsl,pins = <
 552                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
 553                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
 554                 >;
 555         };
 556
 557         pinctrl_usbhub: usbhubgrp {
 558                 fsl,pins = <
 559                         /* HUB_RESET */
 560                         MX6QDL_PAD_GPIO_16__GPIO7_IO11  0x1b0b0
 561                 >;
 562         };
 563
 564         pinctrl_usbotg: usbotggrp {
 565                 fsl,pins = <
 566                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
 567                 >;
 568         };
 569
 570         pinctrl_usdhc2: usdhc2grp {
 571                 fsl,pins = <
 572                         MX6QDL_PAD_SD2_CMD__SD2_CMD     0x17059
 573                         MX6QDL_PAD_SD2_CLK__SD2_CLK     0x10059
 574                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0  0x17059
 575                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1  0x17059
 576                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2  0x17059
 577                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3  0x17059
 578                         /* uSDHC2 CD */
 579                         MX6QDL_PAD_GPIO_4__GPIO1_IO04   0x1b0b0
 580                 >;
 581         };
 582
 583         pinctrl_usdhc3: usdhc3grp {
 584                 fsl,pins = <
 585                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 586                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 587                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 588                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 589                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 590                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 591                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
 592                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
 593                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
 594                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
 595                 >;
 596         };
 597
 598         pinctrl_usdhc3_reset: usdhc3grp-reset {
 599                 fsl,pins = <
 600                         MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
 601                 >;
 602         };
 603
 604         pinctrl_usdhc4: usdhc4grp {
 605                 fsl,pins = <
 606                         MX6QDL_PAD_SD4_CMD__SD4_CMD     0x17059
 607                         MX6QDL_PAD_SD4_CLK__SD4_CLK     0x17059
 608                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0  0x17059
 609                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1  0x17059
 610                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2  0x17059
 611                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3  0x17059
 612                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4  0x17059
 613                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5  0x17059
 614                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6  0x17059
 615                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7  0x17059
 616                         /* uSDHC4 CD */
 617                         MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
 618                         /* uSDHC4 SDIO PWR */
 619                         MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
 620                         /* uSDHC4 SDIO WP */
 621                         MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
 622                         /* uSDHC4 SDIO LED */
 623                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
 624                 >;
 625         };
 626
 627         pinctrl_wdog: wdoggrp {
 628                 fsl,pins = <
 629                         MX6QDL_PAD_GPIO_9__WDOG1_B      0x1b0b0
 630                 >;
 631         };
 632 };