ARM: dts: STi: STih407: Switch LPC mode from RTC to Clocksource
[deliverable/linux.git] / arch / arm / boot / dts / imx6q-bx50v3.dtsi
1 /*
2 * Copyright 2015 Timesys Corporation.
3 * Copyright 2015 General Electric Company
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This file is distributed in the hope that it will be useful
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 #include "imx6q-ba16.dtsi"
44
45 / {
46 clocks {
47 mclk: clock@0 {
48 compatible = "fixed-clock";
49 reg = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <22000000>;
52 };
53 };
54
55 reg_wl18xx_vmmc: regulator-wl18xx {
56 compatible = "regulator-fixed";
57 regulator-name = "vwl1807";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
61 startup-delay-us = <70000>;
62 enable-active-high;
63 };
64
65 reg_wlan: regulator-wlan {
66 compatible = "regulator-fixed";
67 regulator-name = "3P3V_wlan";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 regulator-always-on;
71 regulator-boot-on;
72 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
73 };
74
75 sound {
76 compatible = "fsl,imx6q-ba16-sgtl5000",
77 "fsl,imx-audio-sgtl5000";
78 model = "imx6q-ba16-sgtl5000";
79 ssi-controller = <&ssi1>;
80 audio-codec = <&sgtl5000>;
81 audio-routing =
82 "MIC_IN", "Mic Jack",
83 "Mic Jack", "Mic Bias",
84 "LINE_IN", "Line In Jack",
85 "Headphone Jack", "HP_OUT";
86 mux-int-port = <1>;
87 mux-ext-port = <4>;
88 };
89 };
90
91 &ecspi5 {
92 fsl,spi-num-chipselects = <1>;
93 cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_ecspi5>;
96 status = "okay";
97
98 m25_eeprom: m25p80@0 {
99 compatible = "atmel,at25";
100 spi-max-frequency = <20000000>;
101 size = <0x8000>;
102 pagesize = <64>;
103 reg = <0>;
104 address-width = <16>;
105 };
106 };
107
108 &i2c1 {
109 pca9547: mux@70 {
110 compatible = "nxp,pca9547";
111 reg = <0x70>;
112 #address-cells = <1>;
113 #size-cells = <0>;
114
115 mux1_i2c1: i2c@0 {
116 #address-cells = <1>;
117 #size-cells = <0>;
118 reg = <0x0>;
119
120 ads7830: ads7830@48 {
121 compatible = "ti,ads7830";
122 reg = <0x48>;
123 };
124
125 mma8453: mma8453@1c {
126 compatible = "fsl,mma8453";
127 reg = <0x1c>;
128 };
129 };
130
131 mux1_i2c2: i2c@1 {
132 #address-cells = <1>;
133 #size-cells = <0>;
134 reg = <0x1>;
135
136 eeprom: eeprom@50 {
137 compatible = "atmel,24c08";
138 reg = <0x50>;
139 };
140
141 mpl3115: mpl3115@60 {
142 compatible = "fsl,mpl3115";
143 reg = <0x60>;
144 };
145 };
146
147 mux1_i2c3: i2c@2 {
148 #address-cells = <1>;
149 #size-cells = <0>;
150 reg = <0x2>;
151 };
152
153 mux1_i2c4: i2c@3 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 reg = <0x3>;
157
158 sgtl5000: codec@0a {
159 compatible = "fsl,sgtl5000";
160 reg = <0x0a>;
161 clocks = <&mclk>;
162 VDDA-supply = <&reg_1p8v>;
163 VDDIO-supply = <&reg_3p3v>;
164 };
165 };
166
167 mux1_i2c5: i2c@4 {
168 #address-cells = <1>;
169 #size-cells = <0>;
170 reg = <0x4>;
171
172 pca9539: pca9539@74 {
173 compatible = "nxp,pca9539";
174 reg = <0x74>;
175 gpio-controller;
176 #gpio-cells = <2>;
177 interrupt-controller;
178 interrupt-parent = <&gpio2>;
179 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
180 };
181 };
182
183 mux1_i2c6: i2c@5 {
184 #address-cells = <1>;
185 #size-cells = <0>;
186 reg = <0x5>;
187 };
188
189 mux1_i2c7: i2c@6 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 reg = <0x6>;
193 };
194
195 mux1_i2c8: i2c@7 {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 reg = <0x7>;
199 };
200 };
201 };
202
203 &usdhc4 {
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_usdhc4>;
206 bus-width = <4>;
207 vmmc-supply = <&reg_wl18xx_vmmc>;
208 no-1-8-v;
209 non-removable;
210 wakeup-source;
211 keep-power-in-suspend;
212 cap-power-off-card;
213 max-frequency = <25000000>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216 status = "okay";
217
218 wlcore: wlcore@2 {
219 compatible = "ti,wl1837";
220 reg = <2>;
221 interrupt-parent = <&gpio2>;
222 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
223 tcxo-clock-frequency = <26000000>;
224 };
225 };
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