2 * Copyright 2013 Gateworks Corporation
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
13 /* these are used by bootloader for disabling nodes */
25 bootargs = "console=ttymxc1,115200";
29 compatible = "gpio-leds";
33 gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
35 linux,default-trigger = "heartbeat";
40 gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
41 default-state = "off";
46 reg = <0x10000000 0x20000000>;
50 compatible = "pps-gpio";
51 gpios = <&gpio1 26 0>;
56 compatible = "simple-bus";
60 reg_3p3v: regulator@0 {
61 compatible = "regulator-fixed";
63 regulator-name = "3P3V";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
69 reg_5p0v: regulator@1 {
70 compatible = "regulator-fixed";
72 regulator-name = "5P0V";
73 regulator-min-microvolt = <5000000>;
74 regulator-max-microvolt = <5000000>;
78 reg_usb_otg_vbus: regulator@2 {
79 compatible = "regulator-fixed";
81 regulator-name = "usb_otg_vbus";
82 regulator-min-microvolt = <5000000>;
83 regulator-max-microvolt = <5000000>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_enet>;
94 phy-reset-gpios = <&gpio1 30 0>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_gpmi_nand>;
105 ddc-i2c-bus = <&i2c3>;
110 clock-frequency = <100000>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_i2c1>;
116 compatible = "atmel,24c02";
122 compatible = "atmel,24c02";
128 compatible = "atmel,24c02";
134 compatible = "atmel,24c02";
140 compatible = "nxp,pca9555";
147 compatible = "dallas,ds1672";
153 clock-frequency = <100000>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_i2c2>;
160 clock-frequency = <100000>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_i2c3>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_hog>;
171 pinctrl_hog: hoggrp {
173 MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
174 MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
175 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
176 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
177 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
178 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
179 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
180 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
184 pinctrl_enet: enetgrp {
186 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
187 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
188 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
189 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
190 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
191 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
192 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
193 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
194 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
195 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
196 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
197 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
198 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
199 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
200 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
201 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
205 pinctrl_gpmi_nand: gpminandgrp {
207 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
208 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
209 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
210 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
211 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
212 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
213 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
214 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
215 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
216 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
217 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
218 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
219 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
220 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
221 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
222 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
226 pinctrl_i2c1: i2c1grp {
228 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
229 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
233 pinctrl_i2c2: i2c2grp {
235 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
236 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
240 pinctrl_i2c3: i2c3grp {
242 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
243 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
247 pinctrl_uart1: uart1grp {
249 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
250 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
254 pinctrl_uart2: uart2grp {
256 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
257 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
261 pinctrl_uart3: uart3grp {
263 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
264 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
268 pinctrl_uart5: uart5grp {
270 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
271 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
275 pinctrl_usbotg: usbotggrp {
277 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
284 reset-gpio = <&gpio1 0 0>;
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_uart1>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&pinctrl_uart2>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_uart3>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_uart5>;
313 vbus-supply = <®_usb_otg_vbus>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_usbotg>;
316 disable-over-current;