arch/arm/boot/dts/imx6qdl-gw52xx.dtsi

   1 /*
   2  * Copyright 2013 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 / {
  13         /* these are used by bootloader for disabling nodes */
  14         aliases {
  15                 ethernet0 = &fec;
  16                 led0 = &led0;
  17                 led1 = &led1;
  18                 led2 = &led2;
  19                 nand = &gpmi;
  20                 ssi0 = &ssi1;
  21                 usb0 = &usbh1;
  22                 usb1 = &usbotg;
  23                 usdhc2 = &usdhc3;
  24         };
  25
  26         chosen {
  27                 bootargs = "console=ttymxc1,115200";
  28         };
  29
  30         backlight {
  31                 compatible = "pwm-backlight";
  32                 pwms = <&pwm4 0 5000000>;
  33                 brightness-levels = <0 4 8 16 32 64 128 255>;
  34                 default-brightness-level = <7>;
  35         };
  36
  37         leds {
  38                 compatible = "gpio-leds";
  39
  40                 led0: user1 {
  41                         label = "user1";
  42                         gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
  43                         default-state = "on";
  44                         linux,default-trigger = "heartbeat";
  45                 };
  46
  47                 led1: user2 {
  48                         label = "user2";
  49                         gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
  50                         default-state = "off";
  51                 };
  52
  53                 led2: user3 {
  54                         label = "user3";
  55                         gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
  56                         default-state = "off";
  57                 };
  58         };
  59
  60         memory {
  61                 reg = <0x10000000 0x20000000>;
  62         };
  63
  64         pps {
  65                 compatible = "pps-gpio";
  66                 gpios = <&gpio1 26 0>;
  67                 status = "okay";
  68         };
  69
  70         regulators {
  71                 compatible = "simple-bus";
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74
  75                 reg_1p0v: regulator@0 {
  76                         compatible = "regulator-fixed";
  77                         reg = <0>;
  78                         regulator-name = "1P0V";
  79                         regulator-min-microvolt = <1000000>;
  80                         regulator-max-microvolt = <1000000>;
  81                         regulator-always-on;
  82                 };
  83
  84                 /* remove this fixed regulator once ltc3676__sw2 driver available */
  85                 reg_1p8v: regulator@1 {
  86                         compatible = "regulator-fixed";
  87                         reg = <1>;
  88                         regulator-name = "1P8V";
  89                         regulator-min-microvolt = <1800000>;
  90                         regulator-max-microvolt = <1800000>;
  91                         regulator-always-on;
  92                 };
  93
  94                 reg_3p3v: regulator@2 {
  95                         compatible = "regulator-fixed";
  96                         reg = <2>;
  97                         regulator-name = "3P3V";
  98                         regulator-min-microvolt = <3300000>;
  99                         regulator-max-microvolt = <3300000>;
 100                         regulator-always-on;
 101                 };
 102
 103                 reg_5p0v: regulator@3 {
 104                         compatible = "regulator-fixed";
 105                         reg = <3>;
 106                         regulator-name = "5P0V";
 107                         regulator-min-microvolt = <5000000>;
 108                         regulator-max-microvolt = <5000000>;
 109                         regulator-always-on;
 110                 };
 111
 112                 reg_usb_otg_vbus: regulator@4 {
 113                         compatible = "regulator-fixed";
 114                         reg = <4>;
 115                         regulator-name = "usb_otg_vbus";
 116                         regulator-min-microvolt = <5000000>;
 117                         regulator-max-microvolt = <5000000>;
 118                         gpio = <&gpio3 22 0>;
 119                         enable-active-high;
 120                 };
 121         };
 122
 123         sound {
 124                 compatible = "fsl,imx6q-ventana-sgtl5000",
 125                              "fsl,imx-audio-sgtl5000";
 126                 model = "sgtl5000-audio";
 127                 ssi-controller = <&ssi1>;
 128                 audio-codec = <&codec>;
 129                 audio-routing =
 130                         "MIC_IN", "Mic Jack",
 131                         "Mic Jack", "Mic Bias",
 132                         "Headphone Jack", "HP_OUT";
 133                 mux-int-port = <1>;
 134                 mux-ext-port = <4>;
 135         };
 136 };
 137
 138 &audmux {
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&pinctrl_audmux>;
 141         status = "okay";
 142 };
 143
 144 &fec {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_enet>;
 147         phy-mode = "rgmii";
 148         phy-reset-gpios = <&gpio1 30 0>;
 149         status = "okay";
 150 };
 151
 152 &gpmi {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&pinctrl_gpmi_nand>;
 155         status = "okay";
 156 };
 157
 158 &hdmi {
 159         ddc-i2c-bus = <&i2c3>;
 160         status = "okay";
 161 };
 162
 163 &i2c1 {
 164         clock-frequency = <100000>;
 165         pinctrl-names = "default";
 166         pinctrl-0 = <&pinctrl_i2c1>;
 167         status = "okay";
 168
 169         eeprom1: eeprom@50 {
 170                 compatible = "atmel,24c02";
 171                 reg = <0x50>;
 172                 pagesize = <16>;
 173         };
 174
 175         eeprom2: eeprom@51 {
 176                 compatible = "atmel,24c02";
 177                 reg = <0x51>;
 178                 pagesize = <16>;
 179         };
 180
 181         eeprom3: eeprom@52 {
 182                 compatible = "atmel,24c02";
 183                 reg = <0x52>;
 184                 pagesize = <16>;
 185         };
 186
 187         eeprom4: eeprom@53 {
 188                 compatible = "atmel,24c02";
 189                 reg = <0x53>;
 190                 pagesize = <16>;
 191         };
 192
 193         gpio: pca9555@23 {
 194                 compatible = "nxp,pca9555";
 195                 reg = <0x23>;
 196                 gpio-controller;
 197                 #gpio-cells = <2>;
 198         };
 199
 200         rtc: ds1672@68 {
 201                 compatible = "dallas,ds1672";
 202                 reg = <0x68>;
 203         };
 204 };
 205
 206 &i2c2 {
 207         clock-frequency = <100000>;
 208         pinctrl-names = "default";
 209         pinctrl-0 = <&pinctrl_i2c2>;
 210         status = "okay";
 211 };
 212
 213 &i2c3 {
 214         clock-frequency = <100000>;
 215         pinctrl-names = "default";
 216         pinctrl-0 = <&pinctrl_i2c3>;
 217         status = "okay";
 218
 219         codec: sgtl5000@0a {
 220                 compatible = "fsl,sgtl5000";
 221                 reg = <0x0a>;
 222                 clocks = <&clks 201>;
 223                 VDDA-supply = <&reg_1p8v>;
 224                 VDDIO-supply = <&reg_3p3v>;
 225         };
 226
 227         touchscreen: egalax_ts@04 {
 228                 compatible = "eeti,egalax_ts";
 229                 reg = <0x04>;
 230                 interrupt-parent = <&gpio7>;
 231                 interrupts = <12 2>; /* gpio7_12 active low */
 232                 wakeup-gpios = <&gpio7 12 0>;
 233         };
 234 };
 235
 236 &iomuxc {
 237         pinctrl-names = "default";
 238         pinctrl-0 = <&pinctrl_hog>;
 239
 240         imx6qdl-gw52xx {
 241                 pinctrl_hog: hoggrp {
 242                         fsl,pins = <
 243                                 MX6QDL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
 244                                 MX6QDL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
 245                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
 246                                 MX6QDL_PAD_EIM_D31__GPIO3_IO31   0x80000000 /* VIDDEC_PDN# */
 247                                 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
 248                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
 249                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
 250                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
 251                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1     0x000130b0 /* AUD4_MCK */
 252                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02    0x80000000 /* USB_SEL_PCI */
 253                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12   0x80000000 /* TOUCH_IRQ# */
 254                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
 255                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
 256                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15  0x80000000 /* user3 led */
 257                                 MX6QDL_PAD_SD2_CMD__GPIO1_IO11   0x80000000 /* LVDS_TCH# */
 258                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00  0x80000000 /* SD3_CD# */
 259                                 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11  0x80000000 /* UART2_EN# */
 260                          >;
 261                 };
 262
 263                 pinctrl_audmux: audmuxgrp {
 264                         fsl,pins = <
 265                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 266                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 267                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 268                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 269                         >;
 270                 };
 271
 272                 pinctrl_enet: enetgrp {
 273                         fsl,pins = <
 274                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 275                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 276                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 277                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 278                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 279                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 280                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 281                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 282                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 283                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 284                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 285                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 286                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 287                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 288                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 289                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 290                         >;
 291                 };
 292
 293                 pinctrl_gpmi_nand: gpminandgrp {
 294                         fsl,pins = <
 295                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 296                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 297                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 298                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 299                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 300                                 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B        0xb0b1
 301                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 302                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 303                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 304                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 305                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 306                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 307                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 308                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 309                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 310                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 311                         >;
 312                 };
 313
 314                 pinctrl_i2c1: i2c1grp {
 315                         fsl,pins = <
 316                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 317                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 318                         >;
 319                 };
 320
 321                 pinctrl_i2c2: i2c2grp {
 322                         fsl,pins = <
 323                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 324                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 325                         >;
 326                 };
 327
 328                 pinctrl_i2c3: i2c3grp {
 329                         fsl,pins = <
 330                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 331                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 332                         >;
 333                 };
 334
 335                 pinctrl_pwm4: pwm4grp {
 336                         fsl,pins = <
 337                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 338                         >;
 339                 };
 340
 341                 pinctrl_uart1: uart1grp {
 342                         fsl,pins = <
 343                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 344                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 345                         >;
 346                 };
 347
 348                 pinctrl_uart2: uart2grp {
 349                         fsl,pins = <
 350                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 351                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 352                         >;
 353                 };
 354
 355                 pinctrl_uart5: uart5grp {
 356                         fsl,pins = <
 357                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 358                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 359                         >;
 360                 };
 361
 362                 pinctrl_usbotg: usbotggrp {
 363                         fsl,pins = <
 364                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 365                         >;
 366                 };
 367
 368                 pinctrl_usdhc3: usdhc3grp {
 369                         fsl,pins = <
 370                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 371                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 372                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 373                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 374                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 375                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 376                         >;
 377                 };
 378         };
 379 };
 380
 381 &ldb {
 382         status = "okay";
 383
 384         lvds-channel@0 {
 385                 fsl,data-mapping = "spwg";
 386                 fsl,data-width = <18>;
 387                 status = "okay";
 388
 389                 display-timings {
 390                         native-mode = <&timing0>;
 391                         timing0: hsd100pxn1 {
 392                                 clock-frequency = <65000000>;
 393                                 hactive = <1024>;
 394                                 vactive = <768>;
 395                                 hback-porch = <220>;
 396                                 hfront-porch = <40>;
 397                                 vback-porch = <21>;
 398                                 vfront-porch = <7>;
 399                                 hsync-len = <60>;
 400                                 vsync-len = <10>;
 401                         };
 402                 };
 403         };
 404 };
 405
 406 &pcie {
 407         reset-gpio = <&gpio1 29 0>;
 408         status = "okay";
 409 };
 410
 411 &pwm4 {
 412         pinctrl-names = "default";
 413         pinctrl-0 = <&pinctrl_pwm4>;
 414         status = "okay";
 415 };
 416
 417 &ssi1 {
 418         status = "okay";
 419 };
 420
 421 &uart1 {
 422         pinctrl-names = "default";
 423         pinctrl-0 = <&pinctrl_uart1>;
 424         status = "okay";
 425 };
 426
 427 &uart2 {
 428         pinctrl-names = "default";
 429         pinctrl-0 = <&pinctrl_uart2>;
 430         status = "okay";
 431 };
 432
 433 &uart5 {
 434         pinctrl-names = "default";
 435         pinctrl-0 = <&pinctrl_uart5>;
 436         status = "okay";
 437 };
 438
 439 &usbotg {
 440         vbus-supply = <&reg_usb_otg_vbus>;
 441         pinctrl-names = "default";
 442         pinctrl-0 = <&pinctrl_usbotg>;
 443         disable-over-current;
 444         status = "okay";
 445 };
 446
 447 &usbh1 {
 448         status = "okay";
 449 };
 450
 451 &usdhc3 {
 452         pinctrl-names = "default";
 453         pinctrl-0 = <&pinctrl_usdhc3>;
 454         cd-gpios = <&gpio7 0 0>;
 455         vmmc-supply = <&reg_3p3v>;
 456         status = "okay";
 457 };