arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

   1 /*
   2  * Copyright 2013 Boundary Devices, Inc.
   3  * Copyright 2011 Freescale Semiconductor, Inc.
   4  * Copyright 2011 Linaro Ltd.
   5  *
   6  * The code contained herein is licensed under the GNU General Public
   7  * License. You may obtain a copy of the GNU General Public License
   8  * Version 2 or later at the following locations:
   9  *
  10  * http://www.opensource.org/licenses/gpl-license.html
  11  * http://www.gnu.org/copyleft/gpl.html
  12  */
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include <dt-bindings/input/input.h>
  15
  16 / {
  17         chosen {
  18                 stdout-path = &uart2;
  19         };
  20
  21         memory {
  22                 reg = <0x10000000 0x40000000>;
  23         };
  24
  25         regulators {
  26                 compatible = "simple-bus";
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 reg_2p5v: regulator@0 {
  31                         compatible = "regulator-fixed";
  32                         reg = <0>;
  33                         regulator-name = "2P5V";
  34                         regulator-min-microvolt = <2500000>;
  35                         regulator-max-microvolt = <2500000>;
  36                         regulator-always-on;
  37                 };
  38
  39                 reg_3p3v: regulator@1 {
  40                         compatible = "regulator-fixed";
  41                         reg = <1>;
  42                         regulator-name = "3P3V";
  43                         regulator-min-microvolt = <3300000>;
  44                         regulator-max-microvolt = <3300000>;
  45                         regulator-always-on;
  46                 };
  47
  48                 reg_usb_otg_vbus: regulator@2 {
  49                         compatible = "regulator-fixed";
  50                         reg = <2>;
  51                         regulator-name = "usb_otg_vbus";
  52                         regulator-min-microvolt = <5000000>;
  53                         regulator-max-microvolt = <5000000>;
  54                         gpio = <&gpio3 22 0>;
  55                         enable-active-high;
  56                 };
  57         };
  58
  59         gpio-keys {
  60                 compatible = "gpio-keys";
  61                 pinctrl-names = "default";
  62                 pinctrl-0 = <&pinctrl_gpio_keys>;
  63
  64                 power {
  65                         label = "Power Button";
  66                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  67                         linux,code = <KEY_POWER>;
  68                         gpio-key,wakeup;
  69                 };
  70
  71                 menu {
  72                         label = "Menu";
  73                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  74                         linux,code = <KEY_MENU>;
  75                 };
  76
  77                 home {
  78                         label = "Home";
  79                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  80                         linux,code = <KEY_HOME>;
  81                 };
  82
  83                 back {
  84                         label = "Back";
  85                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  86                         linux,code = <KEY_BACK>;
  87                 };
  88
  89                 volume-up {
  90                         label = "Volume Up";
  91                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  92                         linux,code = <KEY_VOLUMEUP>;
  93                 };
  94
  95                 volume-down {
  96                         label = "Volume Down";
  97                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  98                         linux,code = <KEY_VOLUMEDOWN>;
  99                 };
 100         };
 101
 102         sound {
 103                 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
 104                              "fsl,imx-audio-sgtl5000";
 105                 model = "imx6q-nitrogen6x-sgtl5000";
 106                 ssi-controller = <&ssi1>;
 107                 audio-codec = <&codec>;
 108                 audio-routing =
 109                         "MIC_IN", "Mic Jack",
 110                         "Mic Jack", "Mic Bias",
 111                         "Headphone Jack", "HP_OUT";
 112                 mux-int-port = <1>;
 113                 mux-ext-port = <3>;
 114         };
 115
 116         backlight_lcd {
 117                 compatible = "pwm-backlight";
 118                 pwms = <&pwm1 0 5000000>;
 119                 brightness-levels = <0 4 8 16 32 64 128 255>;
 120                 default-brightness-level = <7>;
 121                 power-supply = <&reg_3p3v>;
 122                 status = "okay";
 123         };
 124
 125         backlight_lvds {
 126                 compatible = "pwm-backlight";
 127                 pwms = <&pwm4 0 5000000>;
 128                 brightness-levels = <0 4 8 16 32 64 128 255>;
 129                 default-brightness-level = <7>;
 130                 power-supply = <&reg_3p3v>;
 131                 status = "okay";
 132         };
 133 };
 134
 135 &audmux {
 136         pinctrl-names = "default";
 137         pinctrl-0 = <&pinctrl_audmux>;
 138         status = "okay";
 139 };
 140
 141 &ecspi1 {
 142         fsl,spi-num-chipselects = <1>;
 143         cs-gpios = <&gpio3 19 0>;
 144         pinctrl-names = "default";
 145         pinctrl-0 = <&pinctrl_ecspi1>;
 146         status = "okay";
 147
 148         flash: m25p80@0 {
 149                 compatible = "sst,sst25vf016b";
 150                 spi-max-frequency = <20000000>;
 151                 reg = <0>;
 152         };
 153 };
 154
 155 &fec {
 156         pinctrl-names = "default";
 157         pinctrl-0 = <&pinctrl_enet>;
 158         phy-mode = "rgmii";
 159         phy-reset-gpios = <&gpio1 27 0>;
 160         txen-skew-ps = <0>;
 161         txc-skew-ps = <3000>;
 162         rxdv-skew-ps = <0>;
 163         rxc-skew-ps = <3000>;
 164         rxd0-skew-ps = <0>;
 165         rxd1-skew-ps = <0>;
 166         rxd2-skew-ps = <0>;
 167         rxd3-skew-ps = <0>;
 168         txd0-skew-ps = <0>;
 169         txd1-skew-ps = <0>;
 170         txd2-skew-ps = <0>;
 171         txd3-skew-ps = <0>;
 172         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 173                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 174         status = "okay";
 175 };
 176
 177 &hdmi {
 178         ddc-i2c-bus = <&i2c2>;
 179         status = "okay";
 180 };
 181
 182 &i2c1 {
 183         clock-frequency = <100000>;
 184         pinctrl-names = "default";
 185         pinctrl-0 = <&pinctrl_i2c1>;
 186         status = "okay";
 187
 188         codec: sgtl5000@0a {
 189                 compatible = "fsl,sgtl5000";
 190                 reg = <0x0a>;
 191                 clocks = <&clks 201>;
 192                 VDDA-supply = <&reg_2p5v>;
 193                 VDDIO-supply = <&reg_3p3v>;
 194         };
 195
 196         rtc: rtc@6f {
 197                 compatible = "isil,isl1208";
 198                 reg = <0x6f>;
 199         };
 200 };
 201
 202 &i2c2 {
 203         clock-frequency = <100000>;
 204         pinctrl-names = "default";
 205         pinctrl-0 = <&pinctrl_i2c2>;
 206         status = "okay";
 207 };
 208
 209 &i2c3 {
 210         clock-frequency = <100000>;
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&pinctrl_i2c3>;
 213         status = "okay";
 214 };
 215
 216 &iomuxc {
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&pinctrl_hog>;
 219
 220         imx6q-nitrogen6x {
 221                 pinctrl_hog: hoggrp {
 222                         fsl,pins = <
 223                                 /* SGTL5000 sys_mclk */
 224                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 225                         >;
 226                 };
 227
 228                 pinctrl_audmux: audmuxgrp {
 229                         fsl,pins = <
 230                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 231                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 232                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 233                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 234                         >;
 235                 };
 236
 237                 pinctrl_ecspi1: ecspi1grp {
 238                         fsl,pins = <
 239                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 240                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 241                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 242                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 243                         >;
 244                 };
 245
 246                 pinctrl_enet: enetgrp {
 247                         fsl,pins = <
 248                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 249                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 250                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 251                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 252                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 253                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 254                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 255                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 256                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 257                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 258                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 259                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 260                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 261                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 262                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 263                                 /* Phy reset */
 264                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
 265                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 266                         >;
 267                 };
 268
 269                 pinctrl_gpio_keys: gpio_keysgrp {
 270                         fsl,pins = <
 271                                 /* Power Button */
 272                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 273                                 /* Menu Button */
 274                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 275                                 /* Home Button */
 276                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 277                                 /* Back Button */
 278                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 279                                 /* Volume Up Button */
 280                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 281                                 /* Volume Down Button */
 282                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 283                         >;
 284                 };
 285
 286                 pinctrl_i2c1: i2c1grp {
 287                         fsl,pins = <
 288                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 289                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 290                         >;
 291                 };
 292
 293                 pinctrl_i2c2: i2c2grp {
 294                         fsl,pins = <
 295                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 296                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 297                         >;
 298                 };
 299
 300                 pinctrl_i2c3: i2c3grp {
 301                         fsl,pins = <
 302                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 303                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 304                         >;
 305                 };
 306
 307                 pinctrl_pwm1: pwm1grp {
 308                         fsl,pins = <
 309                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 310                         >;
 311                 };
 312
 313                 pinctrl_pwm3: pwm3grp {
 314                         fsl,pins = <
 315                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 316                         >;
 317                 };
 318
 319                 pinctrl_pwm4: pwm4grp {
 320                         fsl,pins = <
 321                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 322                         >;
 323                 };
 324
 325                 pinctrl_uart1: uart1grp {
 326                         fsl,pins = <
 327                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 328                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 329                         >;
 330                 };
 331
 332                 pinctrl_uart2: uart2grp {
 333                         fsl,pins = <
 334                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 335                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 336                         >;
 337                 };
 338
 339                 pinctrl_usbotg: usbotggrp {
 340                         fsl,pins = <
 341                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x17059
 342                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 343                                 /* power enable, high active */
 344                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 345                         >;
 346                 };
 347
 348                 pinctrl_usdhc3: usdhc3grp {
 349                         fsl,pins = <
 350                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 351                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 352                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 353                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 354                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 355                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 356                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 357                         >;
 358                 };
 359
 360                 pinctrl_usdhc4: usdhc4grp {
 361                         fsl,pins = <
 362                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 363                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 364                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 365                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 366                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 367                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 368                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 369                         >;
 370                 };
 371         };
 372 };
 373
 374 &ldb {
 375         status = "okay";
 376
 377         lvds-channel@0 {
 378                 fsl,data-mapping = "spwg";
 379                 fsl,data-width = <18>;
 380                 status = "okay";
 381
 382                 display-timings {
 383                         native-mode = <&timing0>;
 384                         timing0: hsd100pxn1 {
 385                                 clock-frequency = <65000000>;
 386                                 hactive = <1024>;
 387                                 vactive = <768>;
 388                                 hback-porch = <220>;
 389                                 hfront-porch = <40>;
 390                                 vback-porch = <21>;
 391                                 vfront-porch = <7>;
 392                                 hsync-len = <60>;
 393                                 vsync-len = <10>;
 394                         };
 395                 };
 396         };
 397 };
 398
 399 &pcie {
 400         status = "okay";
 401 };
 402
 403 &pwm1 {
 404         pinctrl-names = "default";
 405         pinctrl-0 = <&pinctrl_pwm1>;
 406         status = "okay";
 407 };
 408
 409 &pwm3 {
 410         pinctrl-names = "default";
 411         pinctrl-0 = <&pinctrl_pwm3>;
 412         status = "okay";
 413 };
 414
 415 &pwm4 {
 416         pinctrl-names = "default";
 417         pinctrl-0 = <&pinctrl_pwm4>;
 418         status = "okay";
 419 };
 420
 421 &ssi1 {
 422         status = "okay";
 423 };
 424
 425 &uart1 {
 426         pinctrl-names = "default";
 427         pinctrl-0 = <&pinctrl_uart1>;
 428         status = "okay";
 429 };
 430
 431 &uart2 {
 432         pinctrl-names = "default";
 433         pinctrl-0 = <&pinctrl_uart2>;
 434         status = "okay";
 435 };
 436
 437 &usbh1 {
 438         status = "okay";
 439 };
 440
 441 &usbotg {
 442         vbus-supply = <&reg_usb_otg_vbus>;
 443         pinctrl-names = "default";
 444         pinctrl-0 = <&pinctrl_usbotg>;
 445         disable-over-current;
 446         status = "okay";
 447 };
 448
 449 &usdhc3 {
 450         pinctrl-names = "default";
 451         pinctrl-0 = <&pinctrl_usdhc3>;
 452         cd-gpios = <&gpio7 0 0>;
 453         vmmc-supply = <&reg_3p3v>;
 454         status = "okay";
 455 };
 456
 457 &usdhc4 {
 458         pinctrl-names = "default";
 459         pinctrl-0 = <&pinctrl_usdhc4>;
 460         cd-gpios = <&gpio2 6 0>;
 461         vmmc-supply = <&reg_3p3v>;
 462         status = "okay";
 463 };