2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
18 reg = <0x10000000 0x40000000>;
22 compatible = "simple-bus";
26 reg_usb_h1_vbus: regulator@0 {
27 compatible = "regulator-fixed";
29 regulator-name = "usb_h1_vbus";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
33 startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
39 compatible = "fsl,imx6q-udoo-ac97",
41 model = "fsl,imx6q-udoo-ac97";
45 "Headphone Jack", "TX";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_enet>;
59 ddc-i2c-bus = <&i2c2>;
64 clock-frequency = <100000>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_i2c2>;
72 pinctrl_enet: enetgrp {
74 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
75 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
76 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
77 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
78 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
79 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
80 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
81 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
82 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
83 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
84 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
85 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
86 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
87 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
88 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
89 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
93 pinctrl_i2c2: i2c2grp {
95 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
96 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
100 pinctrl_uart2: uart2grp {
102 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
103 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
107 pinctrl_usbh: usbhgrp {
109 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
110 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
114 pinctrl_usdhc3: usdhc3grp {
116 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
117 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
118 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
119 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
120 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
121 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
125 pinctrl_ac97_running: ac97running {
127 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
128 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
129 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
130 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
131 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
135 pinctrl_ac97_warm_reset: ac97warmreset {
137 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
138 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
139 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
140 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
141 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
145 pinctrl_ac97_reset: ac97reset {
147 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
148 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
149 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
150 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
151 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_uart2>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_usbh>;
166 vbus-supply = <®_usb_h1_vbus>;
167 clocks = <&clks 201>;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_usdhc3>;
184 fsl,mode = "ac97-slave";
185 pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
186 pinctrl-0 = <&pinctrl_ac97_running>;
187 pinctrl-1 = <&pinctrl_ac97_reset>;
188 pinctrl-2 = <&pinctrl_ac97_warm_reset>;
189 ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;