arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   4
   5 / {
   6         compatible = "marvell,kirkwood";
   7         interrupt-parent = <&intc>;
   8
   9         cpus {
  10                 #address-cells = <1>;
  11                 #size-cells = <0>;
  12
  13                 cpu@0 {
  14                         device_type = "cpu";
  15                         compatible = "marvell,feroceon";
  16                         reg = <0>;
  17                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  18                         clock-names = "cpu_clk", "ddrclk", "powersave";
  19                 };
  20         };
  21
  22         aliases {
  23                gpio0 = &gpio0;
  24                gpio1 = &gpio1;
  25         };
  26
  27         mbus {
  28                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  29                 #address-cells = <2>;
  30                 #size-cells = <1>;
  31                 controller = <&mbusc>;
  32                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  33                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  34         };
  35
  36         ocp@f1000000 {
  37                 compatible = "simple-bus";
  38                 ranges = <0x00000000 0xf1000000 0x0100000
  39                           0xf4000000 0xf4000000 0x0000400
  40                           0xf5000000 0xf5000000 0x0000400>;
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43
  44                 mbusc: mbus-controller@20000 {
  45                         compatible = "marvell,mbus-controller";
  46                         reg = <0x20000 0x80>, <0x1500 0x20>;
  47                 };
  48
  49                 timer: timer@20300 {
  50                         compatible = "marvell,orion-timer";
  51                         reg = <0x20300 0x20>;
  52                         interrupt-parent = <&bridge_intc>;
  53                         interrupts = <1>, <2>;
  54                         clocks = <&core_clk 0>;
  55                 };
  56
  57                 intc: main-interrupt-ctrl@20200 {
  58                         compatible = "marvell,orion-intc";
  59                         interrupt-controller;
  60                         #interrupt-cells = <1>;
  61                         reg = <0x20200 0x10>, <0x20210 0x10>;
  62                 };
  63
  64                 bridge_intc: bridge-interrupt-ctrl@20110 {
  65                         compatible = "marvell,orion-bridge-intc";
  66                         interrupt-controller;
  67                         #interrupt-cells = <1>;
  68                         reg = <0x20110 0x8>;
  69                         interrupts = <1>;
  70                         marvell,#interrupts = <6>;
  71                 };
  72
  73                 core_clk: core-clocks@10030 {
  74                         compatible = "marvell,kirkwood-core-clock";
  75                         reg = <0x10030 0x4>;
  76                         #clock-cells = <1>;
  77                 };
  78
  79                 gpio0: gpio@10100 {
  80                         compatible = "marvell,orion-gpio";
  81                         #gpio-cells = <2>;
  82                         gpio-controller;
  83                         reg = <0x10100 0x40>;
  84                         ngpios = <32>;
  85                         interrupt-controller;
  86                         #interrupt-cells = <2>;
  87                         interrupts = <35>, <36>, <37>, <38>;
  88                         clocks = <&gate_clk 7>;
  89                 };
  90
  91                 gpio1: gpio@10140 {
  92                         compatible = "marvell,orion-gpio";
  93                         #gpio-cells = <2>;
  94                         gpio-controller;
  95                         reg = <0x10140 0x40>;
  96                         ngpios = <18>;
  97                         interrupt-controller;
  98                         #interrupt-cells = <2>;
  99                         interrupts = <39>, <40>, <41>;
 100                         clocks = <&gate_clk 7>;
 101                 };
 102
 103                 serial@12000 {
 104                         compatible = "ns16550a";
 105                         reg = <0x12000 0x100>;
 106                         reg-shift = <2>;
 107                         interrupts = <33>;
 108                         clocks = <&gate_clk 7>;
 109                         status = "disabled";
 110                 };
 111
 112                 serial@12100 {
 113                         compatible = "ns16550a";
 114                         reg = <0x12100 0x100>;
 115                         reg-shift = <2>;
 116                         interrupts = <34>;
 117                         clocks = <&gate_clk 7>;
 118                         status = "disabled";
 119                 };
 120
 121                 spi@10600 {
 122                         compatible = "marvell,orion-spi";
 123                         #address-cells = <1>;
 124                         #size-cells = <0>;
 125                         cell-index = <0>;
 126                         interrupts = <23>;
 127                         reg = <0x10600 0x28>;
 128                         clocks = <&gate_clk 7>;
 129                         status = "disabled";
 130                 };
 131
 132                 gate_clk: clock-gating-control@2011c {
 133                         compatible = "marvell,kirkwood-gating-clock";
 134                         reg = <0x2011c 0x4>;
 135                         clocks = <&core_clk 0>;
 136                         #clock-cells = <1>;
 137                 };
 138
 139                 wdt: watchdog-timer@20300 {
 140                         compatible = "marvell,orion-wdt";
 141                         reg = <0x20300 0x28>;
 142                         interrupt-parent = <&bridge_intc>;
 143                         interrupts = <3>;
 144                         clocks = <&gate_clk 7>;
 145                         status = "okay";
 146                 };
 147
 148                 xor@60800 {
 149                         compatible = "marvell,orion-xor";
 150                         reg = <0x60800 0x100
 151                                0x60A00 0x100>;
 152                         status = "okay";
 153                         clocks = <&gate_clk 8>;
 154
 155                         xor00 {
 156                               interrupts = <5>;
 157                               dmacap,memcpy;
 158                               dmacap,xor;
 159                         };
 160                         xor01 {
 161                               interrupts = <6>;
 162                               dmacap,memcpy;
 163                               dmacap,xor;
 164                               dmacap,memset;
 165                         };
 166                 };
 167
 168                 xor@60900 {
 169                         compatible = "marvell,orion-xor";
 170                         reg = <0x60900 0x100
 171                                0x60B00 0x100>;
 172                         status = "okay";
 173                         clocks = <&gate_clk 16>;
 174
 175                         xor00 {
 176                               interrupts = <7>;
 177                               dmacap,memcpy;
 178                               dmacap,xor;
 179                         };
 180                         xor01 {
 181                               interrupts = <8>;
 182                               dmacap,memcpy;
 183                               dmacap,xor;
 184                               dmacap,memset;
 185                         };
 186                 };
 187
 188                 ehci@50000 {
 189                         compatible = "marvell,orion-ehci";
 190                         reg = <0x50000 0x1000>;
 191                         interrupts = <19>;
 192                         clocks = <&gate_clk 3>;
 193                         status = "okay";
 194                 };
 195
 196                 nand@3000000 {
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         cle = <0>;
 200                         ale = <1>;
 201                         bank-width = <1>;
 202                         compatible = "marvell,orion-nand";
 203                         reg = <0xf4000000 0x400>;
 204                         chip-delay = <25>;
 205                         /* set partition map and/or chip-delay in board dts */
 206                         clocks = <&gate_clk 7>;
 207                         status = "disabled";
 208                 };
 209
 210                 i2c@11000 {
 211                         compatible = "marvell,mv64xxx-i2c";
 212                         reg = <0x11000 0x20>;
 213                         #address-cells = <1>;
 214                         #size-cells = <0>;
 215                         interrupts = <29>;
 216                         clock-frequency = <100000>;
 217                         clocks = <&gate_clk 7>;
 218                         status = "disabled";
 219                 };
 220
 221                 crypto@30000 {
 222                         compatible = "marvell,orion-crypto";
 223                         reg = <0x30000 0x10000>,
 224                               <0xf5000000 0x800>;
 225                         reg-names = "regs", "sram";
 226                         interrupts = <22>;
 227                         clocks = <&gate_clk 17>;
 228                         status = "okay";
 229                 };
 230
 231                 mdio: mdio-bus@72004 {
 232                         compatible = "marvell,orion-mdio";
 233                         #address-cells = <1>;
 234                         #size-cells = <0>;
 235                         reg = <0x72004 0x84>;
 236                         interrupts = <46>;
 237                         clocks = <&gate_clk 0>;
 238                         status = "disabled";
 239
 240                         /* add phy nodes in board file */
 241                 };
 242
 243                 eth0: ethernet-controller@72000 {
 244                         compatible = "marvell,kirkwood-eth";
 245                         #address-cells = <1>;
 246                         #size-cells = <0>;
 247                         reg = <0x72000 0x4000>;
 248                         clocks = <&gate_clk 0>;
 249                         marvell,tx-checksum-limit = <1600>;
 250                         status = "disabled";
 251
 252                         ethernet0-port@0 {
 253                                 device_type = "network";
 254                                 compatible = "marvell,kirkwood-eth-port";
 255                                 reg = <0>;
 256                                 interrupts = <11>;
 257                                 /* overwrite MAC address in bootloader */
 258                                 local-mac-address = [00 00 00 00 00 00];
 259                                 /* set phy-handle property in board file */
 260                         };
 261                 };
 262
 263                 eth1: ethernet-controller@76000 {
 264                         compatible = "marvell,kirkwood-eth";
 265                         #address-cells = <1>;
 266                         #size-cells = <0>;
 267                         reg = <0x76000 0x4000>;
 268                         clocks = <&gate_clk 19>;
 269                         marvell,tx-checksum-limit = <1600>;
 270                         status = "disabled";
 271
 272                         ethernet1-port@0 {
 273                                 device_type = "network";
 274                                 compatible = "marvell,kirkwood-eth-port";
 275                                 reg = <0>;
 276                                 interrupts = <15>;
 277                                 /* overwrite MAC address in bootloader */
 278                                 local-mac-address = [00 00 00 00 00 00];
 279                                 /* set phy-handle property in board file */
 280                         };
 281                 };
 282         };
 283 };