arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "marvell,kirkwood";
   5         interrupt-parent = <&intc>;
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 cpu@0 {
  12                         device_type = "cpu";
  13                         compatible = "marvell,feroceon";
  14                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  15                         clock-names = "cpu_clk", "ddrclk", "powersave";
  16                 };
  17         };
  18
  19         aliases {
  20                gpio0 = &gpio0;
  21                gpio1 = &gpio1;
  22         };
  23         intc: interrupt-controller {
  24                 compatible = "marvell,orion-intc", "marvell,intc";
  25                 interrupt-controller;
  26                 #interrupt-cells = <1>;
  27                 reg = <0xf1020204 0x04>,
  28                       <0xf1020214 0x04>;
  29         };
  30
  31         ocp@f1000000 {
  32                 compatible = "simple-bus";
  33                 ranges = <0x00000000 0xf1000000 0x4000000
  34                           0xf5000000 0xf5000000 0x0000400>;
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37
  38                 core_clk: core-clocks@10030 {
  39                         compatible = "marvell,kirkwood-core-clock";
  40                         reg = <0x10030 0x4>;
  41                         #clock-cells = <1>;
  42                 };
  43
  44                 gpio0: gpio@10100 {
  45                         compatible = "marvell,orion-gpio";
  46                         #gpio-cells = <2>;
  47                         gpio-controller;
  48                         reg = <0x10100 0x40>;
  49                         ngpios = <32>;
  50                         interrupt-controller;
  51                         #interrupt-cells = <2>;
  52                         interrupts = <35>, <36>, <37>, <38>;
  53                         clocks = <&gate_clk 7>;
  54                 };
  55
  56                 gpio1: gpio@10140 {
  57                         compatible = "marvell,orion-gpio";
  58                         #gpio-cells = <2>;
  59                         gpio-controller;
  60                         reg = <0x10140 0x40>;
  61                         ngpios = <18>;
  62                         interrupt-controller;
  63                         #interrupt-cells = <2>;
  64                         interrupts = <39>, <40>, <41>;
  65                         clocks = <&gate_clk 7>;
  66                 };
  67
  68                 serial@12000 {
  69                         compatible = "ns16550a";
  70                         reg = <0x12000 0x100>;
  71                         reg-shift = <2>;
  72                         interrupts = <33>;
  73                         clocks = <&gate_clk 7>;
  74                         status = "disabled";
  75                 };
  76
  77                 serial@12100 {
  78                         compatible = "ns16550a";
  79                         reg = <0x12100 0x100>;
  80                         reg-shift = <2>;
  81                         interrupts = <34>;
  82                         clocks = <&gate_clk 7>;
  83                         status = "disabled";
  84                 };
  85
  86                 spi@10600 {
  87                         compatible = "marvell,orion-spi";
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         cell-index = <0>;
  91                         interrupts = <23>;
  92                         reg = <0x10600 0x28>;
  93                         clocks = <&gate_clk 7>;
  94                         status = "disabled";
  95                 };
  96
  97                 gate_clk: clock-gating-control@2011c {
  98                         compatible = "marvell,kirkwood-gating-clock";
  99                         reg = <0x2011c 0x4>;
 100                         clocks = <&core_clk 0>;
 101                         #clock-cells = <1>;
 102                 };
 103
 104                 wdt@20300 {
 105                         compatible = "marvell,orion-wdt";
 106                         reg = <0x20300 0x28>;
 107                         clocks = <&gate_clk 7>;
 108                         status = "okay";
 109                 };
 110
 111                 xor@60800 {
 112                         compatible = "marvell,orion-xor";
 113                         reg = <0x60800 0x100
 114                                0x60A00 0x100>;
 115                         status = "okay";
 116                         clocks = <&gate_clk 8>;
 117
 118                         xor00 {
 119                               interrupts = <5>;
 120                               dmacap,memcpy;
 121                               dmacap,xor;
 122                         };
 123                         xor01 {
 124                               interrupts = <6>;
 125                               dmacap,memcpy;
 126                               dmacap,xor;
 127                               dmacap,memset;
 128                         };
 129                 };
 130
 131                 xor@60900 {
 132                         compatible = "marvell,orion-xor";
 133                         reg = <0x60900 0x100
 134                                0xd0B00 0x100>;
 135                         status = "okay";
 136                         clocks = <&gate_clk 16>;
 137
 138                         xor00 {
 139                               interrupts = <7>;
 140                               dmacap,memcpy;
 141                               dmacap,xor;
 142                         };
 143                         xor01 {
 144                               interrupts = <8>;
 145                               dmacap,memcpy;
 146                               dmacap,xor;
 147                               dmacap,memset;
 148                         };
 149                 };
 150
 151                 ehci@50000 {
 152                         compatible = "marvell,orion-ehci";
 153                         reg = <0x50000 0x1000>;
 154                         interrupts = <19>;
 155                         clocks = <&gate_clk 3>;
 156                         status = "okay";
 157                 };
 158
 159                 nand@3000000 {
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         cle = <0>;
 163                         ale = <1>;
 164                         bank-width = <1>;
 165                         compatible = "marvell,orion-nand";
 166                         reg = <0x3000000 0x400>;
 167                         chip-delay = <25>;
 168                         /* set partition map and/or chip-delay in board dts */
 169                         clocks = <&gate_clk 7>;
 170                         status = "disabled";
 171                 };
 172
 173                 i2c@11000 {
 174                         compatible = "marvell,mv64xxx-i2c";
 175                         reg = <0x11000 0x20>;
 176                         #address-cells = <1>;
 177                         #size-cells = <0>;
 178                         interrupts = <29>;
 179                         clock-frequency = <100000>;
 180                         clocks = <&gate_clk 7>;
 181                         status = "disabled";
 182                 };
 183
 184                 crypto@30000 {
 185                         compatible = "marvell,orion-crypto";
 186                         reg = <0x30000 0x10000>,
 187                               <0xf5000000 0x800>;
 188                         reg-names = "regs", "sram";
 189                         interrupts = <22>;
 190                         clocks = <&gate_clk 17>;
 191                         status = "okay";
 192                 };
 193         };
 194 };