arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "marvell,kirkwood";
   5         interrupt-parent = <&intc>;
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 cpu@0 {
  12                         device_type = "cpu";
  13                         compatible = "marvell,feroceon";
  14                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  15                         clock-names = "cpu_clk", "ddrclk", "powersave";
  16                 };
  17         };
  18
  19         aliases {
  20                gpio0 = &gpio0;
  21                gpio1 = &gpio1;
  22         };
  23         intc: interrupt-controller {
  24                 compatible = "marvell,orion-intc", "marvell,intc";
  25                 interrupt-controller;
  26                 #interrupt-cells = <1>;
  27                 reg = <0xf1020204 0x04>,
  28                       <0xf1020214 0x04>;
  29         };
  30
  31         ocp@f1000000 {
  32                 compatible = "simple-bus";
  33                 ranges = <0x00000000 0xf1000000 0x0100000
  34                           0xe0000000 0xe0000000 0x8100000 /* PCIE */
  35                           0xf4000000 0xf4000000 0x0000400
  36                           0xf5000000 0xf5000000 0x0000400>;
  37                 #address-cells = <1>;
  38                 #size-cells = <1>;
  39
  40                 core_clk: core-clocks@10030 {
  41                         compatible = "marvell,kirkwood-core-clock";
  42                         reg = <0x10030 0x4>;
  43                         #clock-cells = <1>;
  44                 };
  45
  46                 gpio0: gpio@10100 {
  47                         compatible = "marvell,orion-gpio";
  48                         #gpio-cells = <2>;
  49                         gpio-controller;
  50                         reg = <0x10100 0x40>;
  51                         ngpios = <32>;
  52                         interrupt-controller;
  53                         #interrupt-cells = <2>;
  54                         interrupts = <35>, <36>, <37>, <38>;
  55                         clocks = <&gate_clk 7>;
  56                 };
  57
  58                 gpio1: gpio@10140 {
  59                         compatible = "marvell,orion-gpio";
  60                         #gpio-cells = <2>;
  61                         gpio-controller;
  62                         reg = <0x10140 0x40>;
  63                         ngpios = <18>;
  64                         interrupt-controller;
  65                         #interrupt-cells = <2>;
  66                         interrupts = <39>, <40>, <41>;
  67                         clocks = <&gate_clk 7>;
  68                 };
  69
  70                 serial@12000 {
  71                         compatible = "ns16550a";
  72                         reg = <0x12000 0x100>;
  73                         reg-shift = <2>;
  74                         interrupts = <33>;
  75                         clocks = <&gate_clk 7>;
  76                         status = "disabled";
  77                 };
  78
  79                 serial@12100 {
  80                         compatible = "ns16550a";
  81                         reg = <0x12100 0x100>;
  82                         reg-shift = <2>;
  83                         interrupts = <34>;
  84                         clocks = <&gate_clk 7>;
  85                         status = "disabled";
  86                 };
  87
  88                 spi@10600 {
  89                         compatible = "marvell,orion-spi";
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92                         cell-index = <0>;
  93                         interrupts = <23>;
  94                         reg = <0x10600 0x28>;
  95                         clocks = <&gate_clk 7>;
  96                         status = "disabled";
  97                 };
  98
  99                 gate_clk: clock-gating-control@2011c {
 100                         compatible = "marvell,kirkwood-gating-clock";
 101                         reg = <0x2011c 0x4>;
 102                         clocks = <&core_clk 0>;
 103                         #clock-cells = <1>;
 104                 };
 105
 106                 wdt@20300 {
 107                         compatible = "marvell,orion-wdt";
 108                         reg = <0x20300 0x28>;
 109                         clocks = <&gate_clk 7>;
 110                         status = "okay";
 111                 };
 112
 113                 xor@60800 {
 114                         compatible = "marvell,orion-xor";
 115                         reg = <0x60800 0x100
 116                                0x60A00 0x100>;
 117                         status = "okay";
 118                         clocks = <&gate_clk 8>;
 119
 120                         xor00 {
 121                               interrupts = <5>;
 122                               dmacap,memcpy;
 123                               dmacap,xor;
 124                         };
 125                         xor01 {
 126                               interrupts = <6>;
 127                               dmacap,memcpy;
 128                               dmacap,xor;
 129                               dmacap,memset;
 130                         };
 131                 };
 132
 133                 xor@60900 {
 134                         compatible = "marvell,orion-xor";
 135                         reg = <0x60900 0x100
 136                                0xd0B00 0x100>;
 137                         status = "okay";
 138                         clocks = <&gate_clk 16>;
 139
 140                         xor00 {
 141                               interrupts = <7>;
 142                               dmacap,memcpy;
 143                               dmacap,xor;
 144                         };
 145                         xor01 {
 146                               interrupts = <8>;
 147                               dmacap,memcpy;
 148                               dmacap,xor;
 149                               dmacap,memset;
 150                         };
 151                 };
 152
 153                 ehci@50000 {
 154                         compatible = "marvell,orion-ehci";
 155                         reg = <0x50000 0x1000>;
 156                         interrupts = <19>;
 157                         clocks = <&gate_clk 3>;
 158                         status = "okay";
 159                 };
 160
 161                 nand@3000000 {
 162                         #address-cells = <1>;
 163                         #size-cells = <1>;
 164                         cle = <0>;
 165                         ale = <1>;
 166                         bank-width = <1>;
 167                         compatible = "marvell,orion-nand";
 168                         reg = <0xf4000000 0x400>;
 169                         chip-delay = <25>;
 170                         /* set partition map and/or chip-delay in board dts */
 171                         clocks = <&gate_clk 7>;
 172                         status = "disabled";
 173                 };
 174
 175                 i2c@11000 {
 176                         compatible = "marvell,mv64xxx-i2c";
 177                         reg = <0x11000 0x20>;
 178                         #address-cells = <1>;
 179                         #size-cells = <0>;
 180                         interrupts = <29>;
 181                         clock-frequency = <100000>;
 182                         clocks = <&gate_clk 7>;
 183                         status = "disabled";
 184                 };
 185
 186                 crypto@30000 {
 187                         compatible = "marvell,orion-crypto";
 188                         reg = <0x30000 0x10000>,
 189                               <0xf5000000 0x800>;
 190                         reg-names = "regs", "sram";
 191                         interrupts = <22>;
 192                         clocks = <&gate_clk 17>;
 193                         status = "okay";
 194                 };
 195         };
 196 };