arch/arm/boot/dts/omap3-n900.dts

   1 /*
   2  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   3  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 (or later) as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "omap34xx.dtsi"
  13 #include <dt-bindings/input/input.h>
  14
  15 /*
  16  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  17  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  18  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  19  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  20  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  21  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  22  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  23  * There is also no runtime detection code if AES is disabled in L3 firewall...
  24  */
  25 &aes {
  26         status = "disabled";
  27 };
  28
  29 / {
  30         model = "Nokia N900";
  31         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  32
  33         aliases {
  34                 i2c0;
  35                 i2c1 = &i2c1;
  36                 i2c2 = &i2c2;
  37                 i2c3 = &i2c3;
  38         };
  39
  40         cpus {
  41                 cpu@0 {
  42                         cpu0-supply = <&vcc>;
  43                 };
  44         };
  45
  46         leds {
  47                 compatible = "gpio-leds";
  48                 heartbeat {
  49                         label = "debug::sleep";
  50                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* gpio162 */
  51                         linux,default-trigger = "default-on";
  52                         pinctrl-names = "default";
  53                         pinctrl-0 = <&debug_leds>;
  54                 };
  55         };
  56
  57         memory {
  58                 device_type = "memory";
  59                 reg = <0x80000000 0x10000000>; /* 256 MB */
  60         };
  61
  62         gpio_keys {
  63                 compatible = "gpio-keys";
  64
  65                 camera_lens_cover {
  66                         label = "Camera Lens Cover";
  67                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  68                         linux,input-type = <EV_SW>;
  69                         linux,code = <SW_CAMERA_LENS_COVER>;
  70                         linux,can-disable;
  71                 };
  72
  73                 camera_focus {
  74                         label = "Camera Focus";
  75                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  76                         linux,code = <KEY_CAMERA_FOCUS>;
  77                         linux,can-disable;
  78                 };
  79
  80                 camera_capture {
  81                         label = "Camera Capture";
  82                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  83                         linux,code = <KEY_CAMERA>;
  84                         linux,can-disable;
  85                 };
  86
  87                 lock_button {
  88                         label = "Lock Button";
  89                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  90                         linux,code = <KEY_SCREENLOCK>;
  91                         linux,can-disable;
  92                 };
  93
  94                 keypad_slide {
  95                         label = "Keypad Slide";
  96                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
  97                         linux,input-type = <EV_SW>;
  98                         linux,code = <SW_KEYPAD_SLIDE>;
  99                         linux,can-disable;
 100                 };
 101
 102                 proximity_sensor {
 103                         label = "Proximity Sensor";
 104                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 105                         linux,input-type = <EV_SW>;
 106                         linux,code = <SW_FRONT_PROXIMITY>;
 107                         linux,can-disable;
 108                 };
 109         };
 110
 111         isp1707: isp1707 {
 112                 compatible = "nxp,isp1707";
 113                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 114                 usb-phy = <&usb2_phy>;
 115         };
 116
 117         tv: connector {
 118                 compatible = "composite-video-connector";
 119                 label = "tv";
 120
 121                 port {
 122                         tv_connector_in: endpoint {
 123                                 remote-endpoint = <&venc_out>;
 124                         };
 125                 };
 126         };
 127
 128         sound: n900-audio {
 129                 compatible = "nokia,n900-audio";
 130
 131                 nokia,cpu-dai = <&mcbsp2>;
 132                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 133                 nokia,headphone-amplifier = <&tpa6130a2>;
 134
 135                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 136                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 137                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 138                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 139         };
 140
 141         battery: n900-battery {
 142                 compatible = "nokia,n900-battery";
 143                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 144                 io-channel-names = "temp", "bsi", "vbat";
 145         };
 146 };
 147
 148 &omap3_pmx_core {
 149         pinctrl-names = "default";
 150
 151         uart2_pins: pinmux_uart2_pins {
 152                 pinctrl-single,pins = <
 153                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 154                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 155                 >;
 156         };
 157
 158         uart3_pins: pinmux_uart3_pins {
 159                 pinctrl-single,pins = <
 160                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 161                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 162                 >;
 163         };
 164
 165         ethernet_pins: pinmux_ethernet_pins {
 166                 pinctrl-single,pins = <
 167                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 168                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 169                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 170                 >;
 171         };
 172
 173         gpmc_pins: pinmux_gpmc_pins {
 174                 pinctrl-single,pins = <
 175
 176                         /* address lines */
 177                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 178                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 179                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 180
 181                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 182                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 183                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 184                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 185                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 186                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 187                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 188                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 189                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 190
 191                         /*
 192                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 193                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 194                          */
 195                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 196                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 197                 >;
 198         };
 199
 200         i2c1_pins: pinmux_i2c1_pins {
 201                 pinctrl-single,pins = <
 202                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 203                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 204                 >;
 205         };
 206
 207         i2c2_pins: pinmux_i2c2_pins {
 208                 pinctrl-single,pins = <
 209                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 210                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 211                 >;
 212         };
 213
 214         i2c3_pins: pinmux_i2c3_pins {
 215                 pinctrl-single,pins = <
 216                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 217                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 218                 >;
 219         };
 220
 221         debug_leds: pinmux_debug_led_pins {
 222                 pinctrl-single,pins = <
 223                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 224                 >;
 225         };
 226
 227         mcspi4_pins: pinmux_mcspi4_pins {
 228                 pinctrl-single,pins = <
 229                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 230                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 231                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 232                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 233                 >;
 234         };
 235
 236         mmc1_pins: pinmux_mmc1_pins {
 237                 pinctrl-single,pins = <
 238                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 239                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 240                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 241                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 242                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 243                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 244                 >;
 245         };
 246
 247         mmc2_pins: pinmux_mmc2_pins {
 248                 pinctrl-single,pins = <
 249                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 250                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 251                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 252                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 253                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 254                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 255                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 256                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 257                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 258                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 259                 >;
 260         };
 261
 262         acx565akm_pins: pinmux_acx565akm_pins {
 263                 pinctrl-single,pins = <
 264                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 265                 >;
 266         };
 267
 268         dss_sdi_pins: pinmux_dss_sdi_pins {
 269                 pinctrl-single,pins = <
 270                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 271                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 272                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 273                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 274
 275                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 276                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 277                 >;
 278         };
 279
 280         wl1251_pins: pinmux_wl1251 {
 281                 pinctrl-single,pins = <
 282                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 283                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 284                 >;
 285         };
 286
 287         ssi_pins: pinmux_ssi {
 288                 pinctrl-single,pins = <
 289                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 290                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 291                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
 292                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 293                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 294                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 295                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 296                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 297                 >;
 298         };
 299
 300         modem_pins: pinmux_modem {
 301                 pinctrl-single,pins = <
 302                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 303                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
 304                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 305                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 306                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 307                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 308                 >;
 309         };
 310 };
 311
 312 &i2c1 {
 313         pinctrl-names = "default";
 314         pinctrl-0 = <&i2c1_pins>;
 315
 316         clock-frequency = <2200000>;
 317
 318         twl: twl@48 {
 319                 reg = <0x48>;
 320                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 321                 interrupt-parent = <&intc>;
 322         };
 323 };
 324
 325 #include "twl4030.dtsi"
 326 #include "twl4030_omap3.dtsi"
 327
 328 &vaux1 {
 329         regulator-name = "V28";
 330         regulator-min-microvolt = <2800000>;
 331         regulator-max-microvolt = <2800000>;
 332         regulator-always-on; /* due to battery cover sensor */
 333 };
 334
 335 &vaux2 {
 336         regulator-name = "VCSI";
 337         regulator-min-microvolt = <1800000>;
 338         regulator-max-microvolt = <1800000>;
 339 };
 340
 341 &vaux3 {
 342         regulator-name = "VMMC2_30";
 343         regulator-min-microvolt = <2800000>;
 344         regulator-max-microvolt = <3000000>;
 345 };
 346
 347 &vaux4 {
 348         regulator-name = "VCAM_ANA_28";
 349         regulator-min-microvolt = <2800000>;
 350         regulator-max-microvolt = <2800000>;
 351 };
 352
 353 &vmmc1 {
 354         regulator-name = "VMMC1";
 355         regulator-min-microvolt = <1850000>;
 356         regulator-max-microvolt = <3150000>;
 357 };
 358
 359 &vmmc2 {
 360         regulator-name = "V28_A";
 361         regulator-min-microvolt = <2800000>;
 362         regulator-max-microvolt = <3000000>;
 363         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 364 };
 365
 366 &vpll1 {
 367         regulator-name = "VPLL";
 368         regulator-min-microvolt = <1800000>;
 369         regulator-max-microvolt = <1800000>;
 370         regulator-always-on;
 371 };
 372
 373 &vpll2 {
 374         regulator-name = "VSDI_CSI";
 375         regulator-min-microvolt = <1800000>;
 376         regulator-max-microvolt = <1800000>;
 377         regulator-always-on;
 378 };
 379
 380 &vsim {
 381         regulator-name = "VMMC2_IO_18";
 382         regulator-min-microvolt = <1800000>;
 383         regulator-max-microvolt = <1800000>;
 384 };
 385
 386 &vio {
 387         regulator-name = "VIO";
 388         regulator-min-microvolt = <1800000>;
 389         regulator-max-microvolt = <1800000>;
 390 };
 391
 392 &vintana1 {
 393         regulator-name = "VINTANA1";
 394         /* fixed to 1500000 */
 395         regulator-always-on;
 396 };
 397
 398 &vintana2 {
 399         regulator-name = "VINTANA2";
 400         regulator-min-microvolt = <2750000>;
 401         regulator-max-microvolt = <2750000>;
 402         regulator-always-on;
 403 };
 404
 405 &vintdig {
 406         regulator-name = "VINTDIG";
 407         /* fixed to 1500000 */
 408         regulator-always-on;
 409 };
 410
 411 &twl {
 412         twl_audio: audio {
 413                 compatible = "ti,twl4030-audio";
 414                 ti,enable-vibra = <1>;
 415         };
 416
 417         twl_power: power {
 418                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 419                 ti,use_poweroff;
 420         };
 421 };
 422
 423 &twl_keypad {
 424         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 425                          MATRIX_KEY(0x00, 0x01, KEY_O)
 426                          MATRIX_KEY(0x00, 0x02, KEY_P)
 427                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 428                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 429                          MATRIX_KEY(0x00, 0x06, KEY_A)
 430                          MATRIX_KEY(0x00, 0x07, KEY_S)
 431
 432                          MATRIX_KEY(0x01, 0x00, KEY_W)
 433                          MATRIX_KEY(0x01, 0x01, KEY_D)
 434                          MATRIX_KEY(0x01, 0x02, KEY_F)
 435                          MATRIX_KEY(0x01, 0x03, KEY_G)
 436                          MATRIX_KEY(0x01, 0x04, KEY_H)
 437                          MATRIX_KEY(0x01, 0x05, KEY_J)
 438                          MATRIX_KEY(0x01, 0x06, KEY_K)
 439                          MATRIX_KEY(0x01, 0x07, KEY_L)
 440
 441                          MATRIX_KEY(0x02, 0x00, KEY_E)
 442                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 443                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 444                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 445                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 446                          MATRIX_KEY(0x02, 0x06, KEY_X)
 447                          MATRIX_KEY(0x02, 0x07, KEY_C)
 448                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 449
 450                          MATRIX_KEY(0x03, 0x00, KEY_R)
 451                          MATRIX_KEY(0x03, 0x01, KEY_V)
 452                          MATRIX_KEY(0x03, 0x02, KEY_B)
 453                          MATRIX_KEY(0x03, 0x03, KEY_N)
 454                          MATRIX_KEY(0x03, 0x04, KEY_M)
 455                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 456                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 457                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 458
 459                          MATRIX_KEY(0x04, 0x00, KEY_T)
 460                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 461                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 462                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 463                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 464                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 465                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 466
 467                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 468                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 469
 470                          MATRIX_KEY(0x06, 0x00, KEY_U)
 471
 472                          MATRIX_KEY(0x07, 0x00, KEY_I)
 473                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 474                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 475                          >;
 476 };
 477
 478 &twl_gpio {
 479         ti,pullups      = <0x0>;
 480         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 481 };
 482
 483 &i2c2 {
 484         pinctrl-names = "default";
 485         pinctrl-0 = <&i2c2_pins>;
 486
 487         clock-frequency = <100000>;
 488
 489         tlv320aic3x: tlv320aic3x@18 {
 490                 compatible = "ti,tlv320aic3x";
 491                 reg = <0x18>;
 492                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
 493                 ai3x-gpio-func = <
 494                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 495                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 496                 >;
 497
 498                 AVDD-supply = <&vmmc2>;
 499                 DRVDD-supply = <&vmmc2>;
 500                 IOVDD-supply = <&vio>;
 501                 DVDD-supply = <&vio>;
 502
 503                 ai3x-micbias-vg = <1>;
 504         };
 505
 506         tlv320aic3x_aux: tlv320aic3x@19 {
 507                 compatible = "ti,tlv320aic3x";
 508                 reg = <0x19>;
 509                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
 510
 511                 AVDD-supply = <&vmmc2>;
 512                 DRVDD-supply = <&vmmc2>;
 513                 IOVDD-supply = <&vio>;
 514                 DVDD-supply = <&vio>;
 515
 516                 ai3x-micbias-vg = <2>;
 517         };
 518
 519         tsl2563: tsl2563@29 {
 520                 compatible = "amstaos,tsl2563";
 521                 reg = <0x29>;
 522
 523                 amstaos,cover-comp-gain = <16>;
 524         };
 525
 526         adp1653: led-controller@30 {
 527                 compatible = "adi,adp1653";
 528                 reg = <0x30>;
 529                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
 530
 531                 flash {
 532                         flash-timeout-us = <500000>;
 533                         flash-max-microamp = <320000>;
 534                         led-max-microamp = <50000>;
 535                 };
 536                 indicator {
 537                         led-max-microamp = <17500>;
 538                 };
 539         };
 540
 541         lp5523: lp5523@32 {
 542                 compatible = "national,lp5523";
 543                 reg = <0x32>;
 544                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 545                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 546
 547                 chan0 {
 548                         chan-name = "lp5523:kb1";
 549                         led-cur = /bits/ 8 <50>;
 550                         max-cur = /bits/ 8 <100>;
 551                 };
 552
 553                 chan1 {
 554                         chan-name = "lp5523:kb2";
 555                         led-cur = /bits/ 8 <50>;
 556                         max-cur = /bits/ 8 <100>;
 557                 };
 558
 559                 chan2 {
 560                         chan-name = "lp5523:kb3";
 561                         led-cur = /bits/ 8 <50>;
 562                         max-cur = /bits/ 8 <100>;
 563                 };
 564
 565                 chan3 {
 566                         chan-name = "lp5523:kb4";
 567                         led-cur = /bits/ 8 <50>;
 568                         max-cur = /bits/ 8 <100>;
 569                 };
 570
 571                 chan4 {
 572                         chan-name = "lp5523:b";
 573                         led-cur = /bits/ 8 <50>;
 574                         max-cur = /bits/ 8 <100>;
 575                 };
 576
 577                 chan5 {
 578                         chan-name = "lp5523:g";
 579                         led-cur = /bits/ 8 <50>;
 580                         max-cur = /bits/ 8 <100>;
 581                 };
 582
 583                 chan6 {
 584                         chan-name = "lp5523:r";
 585                         led-cur = /bits/ 8 <50>;
 586                         max-cur = /bits/ 8 <100>;
 587                 };
 588
 589                 chan7 {
 590                         chan-name = "lp5523:kb5";
 591                         led-cur = /bits/ 8 <50>;
 592                         max-cur = /bits/ 8 <100>;
 593                 };
 594
 595                 chan8 {
 596                         chan-name = "lp5523:kb6";
 597                         led-cur = /bits/ 8 <50>;
 598                         max-cur = /bits/ 8 <100>;
 599                 };
 600         };
 601
 602         bq27200: bq27200@55 {
 603                 compatible = "ti,bq27200";
 604                 reg = <0x55>;
 605         };
 606
 607         tpa6130a2: tpa6130a2@60 {
 608                 compatible = "ti,tpa6130a2";
 609                 reg = <0x60>;
 610
 611                 Vdd-supply = <&vmmc2>;
 612
 613                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 614         };
 615
 616         si4713: si4713@63 {
 617                 compatible = "silabs,si4713";
 618                 reg = <0x63>;
 619
 620                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 621                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 622                 vio-supply = <&vio>;
 623                 vdd-supply = <&vaux1>;
 624         };
 625
 626         bq24150a: bq24150a@6b {
 627                 compatible = "ti,bq24150a";
 628                 reg = <0x6b>;
 629
 630                 ti,current-limit = <100>;
 631                 ti,weak-battery-voltage = <3400>;
 632                 ti,battery-regulation-voltage = <4200>;
 633                 ti,charge-current = <650>;
 634                 ti,termination-current = <100>;
 635                 ti,resistor-sense = <68>;
 636
 637                 ti,usb-charger-detection = <&isp1707>;
 638         };
 639 };
 640
 641 &i2c3 {
 642         pinctrl-names = "default";
 643         pinctrl-0 = <&i2c3_pins>;
 644
 645         clock-frequency = <400000>;
 646
 647         lis302dl: lis3lv02d@1d {
 648                 compatible = "st,lis3lv02d";
 649                 reg = <0x1d>;
 650
 651                 Vdd-supply = <&vaux1>;
 652                 Vdd_IO-supply = <&vio>;
 653
 654                 interrupt-parent = <&gpio6>;
 655                 interrupts = <21 20>; /* 181 and 180 */
 656
 657                 /* click flags */
 658                 st,click-single-x;
 659                 st,click-single-y;
 660                 st,click-single-z;
 661
 662                 /* Limits are 0.5g * value */
 663                 st,click-threshold-x = <8>;
 664                 st,click-threshold-y = <8>;
 665                 st,click-threshold-z = <10>;
 666
 667                 /* Click must be longer than time limit */
 668                 st,click-time-limit = <9>;
 669
 670                 /* Kind of debounce filter */
 671                 st,click-latency = <50>;
 672
 673                 /* Interrupt line 2 for click detection */
 674                 st,irq2-click;
 675
 676                 st,wakeup-x-hi;
 677                 st,wakeup-y-hi;
 678                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 679
 680                 st,wakeup2-z-hi;
 681                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 682
 683                 st,hipass1-disable;
 684                 st,hipass2-disable;
 685
 686                 st,axis-x = <1>;    /* LIS3_DEV_X */
 687                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 688                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 689
 690                 st,min-limit-x = <(-32)>;
 691                 st,min-limit-y = <3>;
 692                 st,min-limit-z = <3>;
 693
 694                 st,max-limit-x = <(-3)>;
 695                 st,max-limit-y = <32>;
 696                 st,max-limit-z = <32>;
 697         };
 698 };
 699
 700 &mmc1 {
 701         pinctrl-names = "default";
 702         pinctrl-0 = <&mmc1_pins>;
 703         vmmc-supply = <&vmmc1>;
 704         bus-width = <4>;
 705         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 706 };
 707
 708 /* most boards use vaux3, only some old versions use vmmc2 instead */
 709 &mmc2 {
 710         pinctrl-names = "default";
 711         pinctrl-0 = <&mmc2_pins>;
 712         vmmc-supply = <&vaux3>;
 713         vmmc_aux-supply = <&vsim>;
 714         bus-width = <8>;
 715         non-removable;
 716 };
 717
 718 &mmc3 {
 719         status = "disabled";
 720 };
 721
 722 &gpmc {
 723         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 724                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 725         pinctrl-names = "default";
 726         pinctrl-0 = <&gpmc_pins>;
 727
 728         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 729         onenand@0,0 {
 730                 #address-cells = <1>;
 731                 #size-cells = <1>;
 732                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 733
 734                 gpmc,sync-read;
 735                 gpmc,sync-write;
 736                 gpmc,burst-length = <16>;
 737                 gpmc,burst-read;
 738                 gpmc,burst-wrap;
 739                 gpmc,burst-write;
 740                 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
 741                 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
 742                 gpmc,cs-on-ns = <0>;
 743                 gpmc,cs-rd-off-ns = <87>;
 744                 gpmc,cs-wr-off-ns = <87>;
 745                 gpmc,adv-on-ns = <0>;
 746                 gpmc,adv-rd-off-ns = <10>;
 747                 gpmc,adv-wr-off-ns = <10>;
 748                 gpmc,oe-on-ns = <15>;
 749                 gpmc,oe-off-ns = <87>;
 750                 gpmc,we-on-ns = <0>;
 751                 gpmc,we-off-ns = <87>;
 752                 gpmc,rd-cycle-ns = <112>;
 753                 gpmc,wr-cycle-ns = <112>;
 754                 gpmc,access-ns = <81>;
 755                 gpmc,page-burst-access-ns = <15>;
 756                 gpmc,bus-turnaround-ns = <0>;
 757                 gpmc,cycle2cycle-delay-ns = <0>;
 758                 gpmc,wait-monitoring-ns = <0>;
 759                 gpmc,clk-activation-ns = <5>;
 760                 gpmc,wr-data-mux-bus-ns = <30>;
 761                 gpmc,wr-access-ns = <81>;
 762                 gpmc,sync-clk-ps = <15000>;
 763
 764                 /*
 765                  * MTD partition table corresponding to Nokia's
 766                  * Maemo 5 (Fremantle) release.
 767                  */
 768                 partition@0 {
 769                         label = "bootloader";
 770                         reg = <0x00000000 0x00020000>;
 771                         read-only;
 772                 };
 773                 partition@1 {
 774                         label = "config";
 775                         reg = <0x00020000 0x00060000>;
 776                 };
 777                 partition@2 {
 778                         label = "log";
 779                         reg = <0x00080000 0x00040000>;
 780                 };
 781                 partition@3 {
 782                         label = "kernel";
 783                         reg = <0x000c0000 0x00200000>;
 784                 };
 785                 partition@4 {
 786                         label = "initfs";
 787                         reg = <0x002c0000 0x00200000>;
 788                 };
 789                 partition@5 {
 790                         label = "rootfs";
 791                         reg = <0x004c0000 0x0fb40000>;
 792                 };
 793         };
 794
 795         /* Ethernet is on some early development boards and qemu */
 796         ethernet@gpmc {
 797                 compatible = "smsc,lan91c94";
 798                 interrupt-parent = <&gpio2>;
 799                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 800                 reg = <1 0 0xf>;                /* 16 byte IO range */
 801                 bank-width = <2>;
 802                 pinctrl-names = "default";
 803                 pinctrl-0 = <&ethernet_pins>;
 804                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 805                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 806                 gpmc,device-width = <2>;
 807                 gpmc,sync-clk-ps = <0>;
 808                 gpmc,cs-on-ns = <0>;
 809                 gpmc,cs-rd-off-ns = <48>;
 810                 gpmc,cs-wr-off-ns = <24>;
 811                 gpmc,adv-on-ns = <0>;
 812                 gpmc,adv-rd-off-ns = <0>;
 813                 gpmc,adv-wr-off-ns = <0>;
 814                 gpmc,we-on-ns = <12>;
 815                 gpmc,we-off-ns = <18>;
 816                 gpmc,oe-on-ns = <12>;
 817                 gpmc,oe-off-ns = <48>;
 818                 gpmc,page-burst-access-ns = <0>;
 819                 gpmc,access-ns = <42>;
 820                 gpmc,rd-cycle-ns = <180>;
 821                 gpmc,wr-cycle-ns = <180>;
 822                 gpmc,bus-turnaround-ns = <0>;
 823                 gpmc,cycle2cycle-delay-ns = <0>;
 824                 gpmc,wait-monitoring-ns = <0>;
 825                 gpmc,clk-activation-ns = <0>;
 826                 gpmc,wr-access-ns = <0>;
 827                 gpmc,wr-data-mux-bus-ns = <12>;
 828         };
 829 };
 830
 831 &mcspi1 {
 832         /*
 833          * For some reason, touchscreen is necessary for screen to work at
 834          * all on real hw. It works well without it on emulator.
 835          *
 836          * Also... order in the device tree actually matters here.
 837          */
 838         tsc2005@0 {
 839                 compatible = "ti,tsc2005";
 840                 spi-max-frequency = <6000000>;
 841                 reg = <0>;
 842
 843                 vio-supply = <&vio>;
 844
 845                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
 846                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
 847
 848                 touchscreen-fuzz-x = <4>;
 849                 touchscreen-fuzz-y = <7>;
 850                 touchscreen-fuzz-pressure = <2>;
 851                 touchscreen-size-x = <4096>;
 852                 touchscreen-size-y = <4096>;
 853                 touchscreen-max-pressure = <2048>;
 854
 855                 ti,x-plate-ohms = <280>;
 856                 ti,esd-recovery-timeout-ms = <8000>;
 857         };
 858
 859         acx565akm@2 {
 860                 compatible = "sony,acx565akm";
 861                 spi-max-frequency = <6000000>;
 862                 reg = <2>;
 863
 864                 pinctrl-names = "default";
 865                 pinctrl-0 = <&acx565akm_pins>;
 866
 867                 label = "lcd";
 868                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
 869
 870                 port {
 871                         lcd_in: endpoint {
 872                                 remote-endpoint = <&sdi_out>;
 873                         };
 874                 };
 875         };
 876 };
 877
 878 &mcspi4 {
 879         pinctrl-names = "default";
 880         pinctrl-0 = <&mcspi4_pins>;
 881
 882         wl1251@0 {
 883                 pinctrl-names = "default";
 884                 pinctrl-0 = <&wl1251_pins>;
 885
 886                 vio-supply = <&vio>;
 887
 888                 compatible = "ti,wl1251";
 889                 reg = <0>;
 890                 spi-max-frequency = <48000000>;
 891
 892                 spi-cpol;
 893                 spi-cpha;
 894
 895                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
 896
 897                 interrupt-parent = <&gpio2>;
 898                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
 899         };
 900 };
 901
 902 &usb_otg_hs {
 903         interface-type = <0>;
 904         usb-phy = <&usb2_phy>;
 905         phys = <&usb2_phy>;
 906         phy-names = "usb2-phy";
 907         mode = <2>;
 908         power = <50>;
 909 };
 910
 911 &uart1 {
 912         status = "disabled";
 913 };
 914
 915 &uart2 {
 916         interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
 917         pinctrl-names = "default";
 918         pinctrl-0 = <&uart2_pins>;
 919 };
 920
 921 &uart3 {
 922         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
 923         pinctrl-names = "default";
 924         pinctrl-0 = <&uart3_pins>;
 925 };
 926
 927 &dss {
 928         status = "ok";
 929
 930         pinctrl-names = "default";
 931         pinctrl-0 = <&dss_sdi_pins>;
 932
 933         vdds_sdi-supply = <&vaux1>;
 934
 935         ports {
 936                 #address-cells = <1>;
 937                 #size-cells = <0>;
 938
 939                 port@1 {
 940                         reg = <1>;
 941
 942                         sdi_out: endpoint {
 943                                 remote-endpoint = <&lcd_in>;
 944                                 datapairs = <2>;
 945                         };
 946                 };
 947         };
 948 };
 949
 950 &venc {
 951         status = "ok";
 952
 953         vdda-supply = <&vdac>;
 954
 955         port {
 956                 venc_out: endpoint {
 957                         remote-endpoint = <&tv_connector_in>;
 958                         ti,channels = <1>;
 959                 };
 960         };
 961 };
 962
 963 &mcbsp2 {
 964         status = "ok";
 965 };
 966
 967 &ssi_port1 {
 968         pinctrl-names = "default";
 969         pinctrl-0 = <&ssi_pins>;
 970
 971         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
 972
 973         modem: hsi-client {
 974                 compatible = "nokia,n900-modem";
 975
 976                 pinctrl-names = "default";
 977                 pinctrl-0 = <&modem_pins>;
 978
 979                 hsi-channel-ids = <0>, <1>, <2>, <3>;
 980                 hsi-channel-names = "mcsaab-control",
 981                                     "speech-control",
 982                                     "speech-data",
 983                                     "mcsaab-data";
 984                 hsi-speed-kbps = <55000>;
 985                 hsi-mode = "frame";
 986                 hsi-flow = "synchronized";
 987                 hsi-arb-mode = "round-robin";
 988
 989                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
 990
 991                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
 992                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
 993                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
 994                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
 995                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
 996                 gpio-names = "cmt_apeslpx",
 997                              "cmt_rst_rq",
 998                              "cmt_en",
 999                              "cmt_rst",
1000                              "cmt_bsi";
1001         };
1002 };
1003
1004 &ssi_port2 {
1005         status = "disabled";
1006 };