2 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
4 * Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include "omap36xx.dtsi"
21 device_type = "memory";
22 reg = <0x80000000 0x40000000>; /* 1 GB */
25 vemmc: fixedregulator@0 {
26 compatible = "regulator-fixed";
27 regulator-name = "VEMMC";
28 regulator-min-microvolt = <2900000>;
29 regulator-max-microvolt = <2900000>;
30 gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
31 startup-delay-us = <150>;
35 vwlan_fixed: fixedregulator@2 {
36 compatible = "regulator-fixed";
37 regulator-name = "VWLAN";
38 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
45 mmc2_pins: pinmux_mmc2_pins {
46 pinctrl-single,pins = <
47 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
48 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
49 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
50 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
51 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
52 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
56 wlan_pins: pinmux_wlan_pins {
57 pinctrl-single,pins = <
58 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */
59 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */
63 ssi_pins: pinmux_ssi_pins {
64 pinctrl-single,pins = <
65 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */
66 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */
67 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
68 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
69 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */
70 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */
71 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */
72 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */
76 ssi_pins_idle: pinmux_ssi_pins_idle {
77 pinctrl-single,pins = <
78 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7) /* ssi1_dat_tx */
79 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7) /* ssi1_flag_tx */
80 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7) /* ssi1_rdy_tx */
81 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
82 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7) /* ssi1_dat_rx */
83 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7) /* ssi1_flag_rx */
84 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4) /* ssi1_rdy_rx */
85 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7) /* ssi1_wake */
89 modem_pins1: pinmux_modem_core1_pins {
90 pinctrl-single,pins = <
91 OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio_34 (ape_rst_rq) */
92 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4) /* gpio_88 (cmt_rst_rq) */
93 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
99 modem_pins2: pinmux_modem_core2_pins {
100 pinctrl-single,pins = <
101 OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* gpio_23 (cmt_en) */
107 clock-frequency = <2900000>;
111 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
112 interrupt-parent = <&intc>;
116 /include/ "twl4030.dtsi"
119 compatible = "ti,twl5031";
122 compatible = "ti,twl4030-power";
128 ti,pullups = <0x000001>; /* BIT(0) */
129 ti,pulldowns = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
134 regulator-name = "vaux2";
135 regulator-min-microvolt = <1800000>;
136 regulator-max-microvolt = <1800000>;
141 regulator-name = "vaux3";
142 regulator-min-microvolt = <2800000>;
143 regulator-max-microvolt = <2800000>;
147 clock-frequency = <400000>;
151 clock-frequency = <400000>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&mmc2_pins>;
161 vmmc-supply = <&vemmc>;
171 interface-type = <0>;
172 usb-phy = <&usb2_phy>;
174 phy-names = "usb2-phy";
180 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
183 #address-cells = <1>;
185 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
189 gpmc,burst-length = <16>;
193 gpmc,device-width = <2>;
194 gpmc,mux-add-data = <2>;
196 gpmc,cs-rd-off-ns = <87>;
197 gpmc,cs-wr-off-ns = <87>;
198 gpmc,adv-on-ns = <0>;
199 gpmc,adv-rd-off-ns = <10>;
200 gpmc,adv-wr-off-ns = <10>;
201 gpmc,oe-on-ns = <15>;
202 gpmc,oe-off-ns = <87>;
204 gpmc,we-off-ns = <87>;
205 gpmc,rd-cycle-ns = <112>;
206 gpmc,wr-cycle-ns = <112>;
207 gpmc,access-ns = <81>;
208 gpmc,page-burst-access-ns = <15>;
209 gpmc,bus-turnaround-ns = <0>;
210 gpmc,cycle2cycle-delay-ns = <0>;
211 gpmc,wait-monitoring-ns = <0>;
212 gpmc,clk-activation-ns = <5>;
213 gpmc,wr-data-mux-bus-ns = <30>;
214 gpmc,wr-access-ns = <81>;
215 gpmc,sync-clk-ps = <15000>;
218 * MTD partition table corresponding to Nokia's MeeGo 1.2
222 label = "bootloader";
223 reg = <0x00000000 0x00100000>;
227 reg = <0x00100000 0x002c0000>;
231 reg = <0x003c0000 0x01000000>;
235 reg = <0x013c0000 0x00200000>;
239 reg = <0x015c0000 0x1ca40000>;
243 reg = <0x1e000000 0x02000000>;
246 label = "omap2-onenand";
247 reg = <0x00000000 0x20000000>;
253 pinctrl-names = "default", "idle";
254 pinctrl-0 = <&ssi_pins>;
255 pinctrl-1 = <&ssi_pins_idle>;
257 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
260 pinctrl-names = "default";
261 pinctrl-0 = <&modem_pins1 &modem_pins2>;
263 hsi-channel-ids = <0>, <1>, <2>, <3>;
264 hsi-channel-names = "mcsaab-control",
268 hsi-speed-kbps = <96000>;
270 hsi-flow = "synchronized";
271 hsi-arb-mode = "round-robin";
273 interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */
275 gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */
276 <&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */
277 <&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */
278 gpio-names = "cmt_apeslpx",