arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10
  11 / {
  12         compatible = "ti,omap4430", "ti,omap4";
  13         interrupt-parent = <&gic>;
  14
  15         aliases {
  16                 serial0 = &uart1;
  17                 serial1 = &uart2;
  18                 serial2 = &uart3;
  19                 serial3 = &uart4;
  20         };
  21
  22         cpus {
  23                 cpu@0 {
  24                         compatible = "arm,cortex-a9";
  25                         next-level-cache = <&L2>;
  26                 };
  27                 cpu@1 {
  28                         compatible = "arm,cortex-a9";
  29                         next-level-cache = <&L2>;
  30                 };
  31         };
  32
  33         gic: interrupt-controller@48241000 {
  34                 compatible = "arm,cortex-a9-gic";
  35                 interrupt-controller;
  36                 #interrupt-cells = <3>;
  37                 reg = <0x48241000 0x1000>,
  38                       <0x48240100 0x0100>;
  39         };
  40
  41         L2: l2-cache-controller@48242000 {
  42                 compatible = "arm,pl310-cache";
  43                 reg = <0x48242000 0x1000>;
  44                 cache-unified;
  45                 cache-level = <2>;
  46         };
  47
  48         local-timer@0x48240600 {
  49                 compatible = "arm,cortex-a9-twd-timer";
  50                 reg = <0x48240600 0x20>;
  51                 interrupts = <1 13 0x304>;
  52         };
  53
  54         /*
  55          * The soc node represents the soc top level view. It is uses for IPs
  56          * that are not memory mapped in the MPU view or for the MPU itself.
  57          */
  58         soc {
  59                 compatible = "ti,omap-infra";
  60                 mpu {
  61                         compatible = "ti,omap4-mpu";
  62                         ti,hwmods = "mpu";
  63                 };
  64
  65                 dsp {
  66                         compatible = "ti,omap3-c64";
  67                         ti,hwmods = "dsp";
  68                 };
  69
  70                 iva {
  71                         compatible = "ti,ivahd";
  72                         ti,hwmods = "iva";
  73                 };
  74         };
  75
  76         /*
  77          * XXX: Use a flat representation of the OMAP4 interconnect.
  78          * The real OMAP interconnect network is quite complex.
  79          * Since that will not bring real advantage to represent that in DT for
  80          * the moment, just use a fake OCP bus entry to represent the whole bus
  81          * hierarchy.
  82          */
  83         ocp {
  84                 compatible = "ti,omap4-l3-noc", "simple-bus";
  85                 #address-cells = <1>;
  86                 #size-cells = <1>;
  87                 ranges;
  88                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
  89                 reg = <0x44000000 0x1000>,
  90                       <0x44800000 0x2000>,
  91                       <0x45000000 0x1000>;
  92                 interrupts = <0 9 0x4>,
  93                              <0 10 0x4>;
  94
  95                 counter32k: counter@4a304000 {
  96                         compatible = "ti,omap-counter32k";
  97                         reg = <0x4a304000 0x20>;
  98                         ti,hwmods = "counter_32k";
  99                 };
 100
 101                 omap4_pmx_core: pinmux@4a100040 {
 102                         compatible = "ti,omap4-padconf", "pinctrl-single";
 103                         reg = <0x4a100040 0x0196>;
 104                         #address-cells = <1>;
 105                         #size-cells = <0>;
 106                         pinctrl-single,register-width = <16>;
 107                         pinctrl-single,function-mask = <0x7fff>;
 108                 };
 109                 omap4_pmx_wkup: pinmux@4a31e040 {
 110                         compatible = "ti,omap4-padconf", "pinctrl-single";
 111                         reg = <0x4a31e040 0x0038>;
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114                         pinctrl-single,register-width = <16>;
 115                         pinctrl-single,function-mask = <0x7fff>;
 116                 };
 117
 118                 sdma: dma-controller@4a056000 {
 119                         compatible = "ti,omap4430-sdma";
 120                         reg = <0x4a056000 0x1000>;
 121                         interrupts = <0 12 0x4>,
 122                                      <0 13 0x4>,
 123                                      <0 14 0x4>,
 124                                      <0 15 0x4>;
 125                         #dma-cells = <1>;
 126                         #dma-channels = <32>;
 127                         #dma-requests = <127>;
 128                 };
 129
 130                 gpio1: gpio@4a310000 {
 131                         compatible = "ti,omap4-gpio";
 132                         reg = <0x4a310000 0x200>;
 133                         interrupts = <0 29 0x4>;
 134                         ti,hwmods = "gpio1";
 135                         ti,gpio-always-on;
 136                         gpio-controller;
 137                         #gpio-cells = <2>;
 138                         interrupt-controller;
 139                         #interrupt-cells = <2>;
 140                 };
 141
 142                 gpio2: gpio@48055000 {
 143                         compatible = "ti,omap4-gpio";
 144                         reg = <0x48055000 0x200>;
 145                         interrupts = <0 30 0x4>;
 146                         ti,hwmods = "gpio2";
 147                         gpio-controller;
 148                         #gpio-cells = <2>;
 149                         interrupt-controller;
 150                         #interrupt-cells = <2>;
 151                 };
 152
 153                 gpio3: gpio@48057000 {
 154                         compatible = "ti,omap4-gpio";
 155                         reg = <0x48057000 0x200>;
 156                         interrupts = <0 31 0x4>;
 157                         ti,hwmods = "gpio3";
 158                         gpio-controller;
 159                         #gpio-cells = <2>;
 160                         interrupt-controller;
 161                         #interrupt-cells = <2>;
 162                 };
 163
 164                 gpio4: gpio@48059000 {
 165                         compatible = "ti,omap4-gpio";
 166                         reg = <0x48059000 0x200>;
 167                         interrupts = <0 32 0x4>;
 168                         ti,hwmods = "gpio4";
 169                         gpio-controller;
 170                         #gpio-cells = <2>;
 171                         interrupt-controller;
 172                         #interrupt-cells = <2>;
 173                 };
 174
 175                 gpio5: gpio@4805b000 {
 176                         compatible = "ti,omap4-gpio";
 177                         reg = <0x4805b000 0x200>;
 178                         interrupts = <0 33 0x4>;
 179                         ti,hwmods = "gpio5";
 180                         gpio-controller;
 181                         #gpio-cells = <2>;
 182                         interrupt-controller;
 183                         #interrupt-cells = <2>;
 184                 };
 185
 186                 gpio6: gpio@4805d000 {
 187                         compatible = "ti,omap4-gpio";
 188                         reg = <0x4805d000 0x200>;
 189                         interrupts = <0 34 0x4>;
 190                         ti,hwmods = "gpio6";
 191                         gpio-controller;
 192                         #gpio-cells = <2>;
 193                         interrupt-controller;
 194                         #interrupt-cells = <2>;
 195                 };
 196
 197                 gpmc: gpmc@50000000 {
 198                         compatible = "ti,omap4430-gpmc";
 199                         reg = <0x50000000 0x1000>;
 200                         #address-cells = <2>;
 201                         #size-cells = <1>;
 202                         interrupts = <0 20 0x4>;
 203                         gpmc,num-cs = <8>;
 204                         gpmc,num-waitpins = <4>;
 205                         ti,hwmods = "gpmc";
 206                 };
 207
 208                 uart1: serial@4806a000 {
 209                         compatible = "ti,omap4-uart";
 210                         reg = <0x4806a000 0x100>;
 211                         interrupts = <0 72 0x4>;
 212                         ti,hwmods = "uart1";
 213                         clock-frequency = <48000000>;
 214                 };
 215
 216                 uart2: serial@4806c000 {
 217                         compatible = "ti,omap4-uart";
 218                         reg = <0x4806c000 0x100>;
 219                         interrupts = <0 73 0x4>;
 220                         ti,hwmods = "uart2";
 221                         clock-frequency = <48000000>;
 222                 };
 223
 224                 uart3: serial@48020000 {
 225                         compatible = "ti,omap4-uart";
 226                         reg = <0x48020000 0x100>;
 227                         interrupts = <0 74 0x4>;
 228                         ti,hwmods = "uart3";
 229                         clock-frequency = <48000000>;
 230                 };
 231
 232                 uart4: serial@4806e000 {
 233                         compatible = "ti,omap4-uart";
 234                         reg = <0x4806e000 0x100>;
 235                         interrupts = <0 70 0x4>;
 236                         ti,hwmods = "uart4";
 237                         clock-frequency = <48000000>;
 238                 };
 239
 240                 i2c1: i2c@48070000 {
 241                         compatible = "ti,omap4-i2c";
 242                         reg = <0x48070000 0x100>;
 243                         interrupts = <0 56 0x4>;
 244                         #address-cells = <1>;
 245                         #size-cells = <0>;
 246                         ti,hwmods = "i2c1";
 247                 };
 248
 249                 i2c2: i2c@48072000 {
 250                         compatible = "ti,omap4-i2c";
 251                         reg = <0x48072000 0x100>;
 252                         interrupts = <0 57 0x4>;
 253                         #address-cells = <1>;
 254                         #size-cells = <0>;
 255                         ti,hwmods = "i2c2";
 256                 };
 257
 258                 i2c3: i2c@48060000 {
 259                         compatible = "ti,omap4-i2c";
 260                         reg = <0x48060000 0x100>;
 261                         interrupts = <0 61 0x4>;
 262                         #address-cells = <1>;
 263                         #size-cells = <0>;
 264                         ti,hwmods = "i2c3";
 265                 };
 266
 267                 i2c4: i2c@48350000 {
 268                         compatible = "ti,omap4-i2c";
 269                         reg = <0x48350000 0x100>;
 270                         interrupts = <0 62 0x4>;
 271                         #address-cells = <1>;
 272                         #size-cells = <0>;
 273                         ti,hwmods = "i2c4";
 274                 };
 275
 276                 mcspi1: spi@48098000 {
 277                         compatible = "ti,omap4-mcspi";
 278                         reg = <0x48098000 0x200>;
 279                         interrupts = <0 65 0x4>;
 280                         #address-cells = <1>;
 281                         #size-cells = <0>;
 282                         ti,hwmods = "mcspi1";
 283                         ti,spi-num-cs = <4>;
 284                         dmas = <&sdma 35>,
 285                                <&sdma 36>,
 286                                <&sdma 37>,
 287                                <&sdma 38>,
 288                                <&sdma 39>,
 289                                <&sdma 40>,
 290                                <&sdma 41>,
 291                                <&sdma 42>;
 292                         dma-names = "tx0", "rx0", "tx1", "rx1",
 293                                     "tx2", "rx2", "tx3", "rx3";
 294                 };
 295
 296                 mcspi2: spi@4809a000 {
 297                         compatible = "ti,omap4-mcspi";
 298                         reg = <0x4809a000 0x200>;
 299                         interrupts = <0 66 0x4>;
 300                         #address-cells = <1>;
 301                         #size-cells = <0>;
 302                         ti,hwmods = "mcspi2";
 303                         ti,spi-num-cs = <2>;
 304                         dmas = <&sdma 43>,
 305                                <&sdma 44>,
 306                                <&sdma 45>,
 307                                <&sdma 46>;
 308                         dma-names = "tx0", "rx0", "tx1", "rx1";
 309                 };
 310
 311                 mcspi3: spi@480b8000 {
 312                         compatible = "ti,omap4-mcspi";
 313                         reg = <0x480b8000 0x200>;
 314                         interrupts = <0 91 0x4>;
 315                         #address-cells = <1>;
 316                         #size-cells = <0>;
 317                         ti,hwmods = "mcspi3";
 318                         ti,spi-num-cs = <2>;
 319                         dmas = <&sdma 15>, <&sdma 16>;
 320                         dma-names = "tx0", "rx0";
 321                 };
 322
 323                 mcspi4: spi@480ba000 {
 324                         compatible = "ti,omap4-mcspi";
 325                         reg = <0x480ba000 0x200>;
 326                         interrupts = <0 48 0x4>;
 327                         #address-cells = <1>;
 328                         #size-cells = <0>;
 329                         ti,hwmods = "mcspi4";
 330                         ti,spi-num-cs = <1>;
 331                         dmas = <&sdma 70>, <&sdma 71>;
 332                         dma-names = "tx0", "rx0";
 333                 };
 334
 335                 mmc1: mmc@4809c000 {
 336                         compatible = "ti,omap4-hsmmc";
 337                         reg = <0x4809c000 0x400>;
 338                         interrupts = <0 83 0x4>;
 339                         ti,hwmods = "mmc1";
 340                         ti,dual-volt;
 341                         ti,needs-special-reset;
 342                         dmas = <&sdma 61>, <&sdma 62>;
 343                         dma-names = "tx", "rx";
 344                 };
 345
 346                 mmc2: mmc@480b4000 {
 347                         compatible = "ti,omap4-hsmmc";
 348                         reg = <0x480b4000 0x400>;
 349                         interrupts = <0 86 0x4>;
 350                         ti,hwmods = "mmc2";
 351                         ti,needs-special-reset;
 352                         dmas = <&sdma 47>, <&sdma 48>;
 353                         dma-names = "tx", "rx";
 354                 };
 355
 356                 mmc3: mmc@480ad000 {
 357                         compatible = "ti,omap4-hsmmc";
 358                         reg = <0x480ad000 0x400>;
 359                         interrupts = <0 94 0x4>;
 360                         ti,hwmods = "mmc3";
 361                         ti,needs-special-reset;
 362                         dmas = <&sdma 77>, <&sdma 78>;
 363                         dma-names = "tx", "rx";
 364                 };
 365
 366                 mmc4: mmc@480d1000 {
 367                         compatible = "ti,omap4-hsmmc";
 368                         reg = <0x480d1000 0x400>;
 369                         interrupts = <0 96 0x4>;
 370                         ti,hwmods = "mmc4";
 371                         ti,needs-special-reset;
 372                         dmas = <&sdma 57>, <&sdma 58>;
 373                         dma-names = "tx", "rx";
 374                 };
 375
 376                 mmc5: mmc@480d5000 {
 377                         compatible = "ti,omap4-hsmmc";
 378                         reg = <0x480d5000 0x400>;
 379                         interrupts = <0 59 0x4>;
 380                         ti,hwmods = "mmc5";
 381                         ti,needs-special-reset;
 382                         dmas = <&sdma 59>, <&sdma 60>;
 383                         dma-names = "tx", "rx";
 384                 };
 385
 386                 wdt2: wdt@4a314000 {
 387                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 388                         reg = <0x4a314000 0x80>;
 389                         interrupts = <0 80 0x4>;
 390                         ti,hwmods = "wd_timer2";
 391                 };
 392
 393                 mcpdm: mcpdm@40132000 {
 394                         compatible = "ti,omap4-mcpdm";
 395                         reg = <0x40132000 0x7f>, /* MPU private access */
 396                               <0x49032000 0x7f>; /* L3 Interconnect */
 397                         reg-names = "mpu", "dma";
 398                         interrupts = <0 112 0x4>;
 399                         ti,hwmods = "mcpdm";
 400                         dmas = <&sdma 65>,
 401                                <&sdma 66>;
 402                         dma-names = "up_link", "dn_link";
 403                 };
 404
 405                 dmic: dmic@4012e000 {
 406                         compatible = "ti,omap4-dmic";
 407                         reg = <0x4012e000 0x7f>, /* MPU private access */
 408                               <0x4902e000 0x7f>; /* L3 Interconnect */
 409                         reg-names = "mpu", "dma";
 410                         interrupts = <0 114 0x4>;
 411                         ti,hwmods = "dmic";
 412                         dmas = <&sdma 67>;
 413                         dma-names = "up_link";
 414                 };
 415
 416                 mcbsp1: mcbsp@40122000 {
 417                         compatible = "ti,omap4-mcbsp";
 418                         reg = <0x40122000 0xff>, /* MPU private access */
 419                               <0x49022000 0xff>; /* L3 Interconnect */
 420                         reg-names = "mpu", "dma";
 421                         interrupts = <0 17 0x4>;
 422                         interrupt-names = "common";
 423                         ti,buffer-size = <128>;
 424                         ti,hwmods = "mcbsp1";
 425                         dmas = <&sdma 33>,
 426                                <&sdma 34>;
 427                         dma-names = "tx", "rx";
 428                 };
 429
 430                 mcbsp2: mcbsp@40124000 {
 431                         compatible = "ti,omap4-mcbsp";
 432                         reg = <0x40124000 0xff>, /* MPU private access */
 433                               <0x49024000 0xff>; /* L3 Interconnect */
 434                         reg-names = "mpu", "dma";
 435                         interrupts = <0 22 0x4>;
 436                         interrupt-names = "common";
 437                         ti,buffer-size = <128>;
 438                         ti,hwmods = "mcbsp2";
 439                         dmas = <&sdma 17>,
 440                                <&sdma 18>;
 441                         dma-names = "tx", "rx";
 442                 };
 443
 444                 mcbsp3: mcbsp@40126000 {
 445                         compatible = "ti,omap4-mcbsp";
 446                         reg = <0x40126000 0xff>, /* MPU private access */
 447                               <0x49026000 0xff>; /* L3 Interconnect */
 448                         reg-names = "mpu", "dma";
 449                         interrupts = <0 23 0x4>;
 450                         interrupt-names = "common";
 451                         ti,buffer-size = <128>;
 452                         ti,hwmods = "mcbsp3";
 453                         dmas = <&sdma 19>,
 454                                <&sdma 20>;
 455                         dma-names = "tx", "rx";
 456                 };
 457
 458                 mcbsp4: mcbsp@48096000 {
 459                         compatible = "ti,omap4-mcbsp";
 460                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 461                         reg-names = "mpu";
 462                         interrupts = <0 16 0x4>;
 463                         interrupt-names = "common";
 464                         ti,buffer-size = <128>;
 465                         ti,hwmods = "mcbsp4";
 466                         dmas = <&sdma 31>,
 467                                <&sdma 32>;
 468                         dma-names = "tx", "rx";
 469                 };
 470
 471                 keypad: keypad@4a31c000 {
 472                         compatible = "ti,omap4-keypad";
 473                         reg = <0x4a31c000 0x80>;
 474                         interrupts = <0 120 0x4>;
 475                         reg-names = "mpu";
 476                         ti,hwmods = "kbd";
 477                 };
 478
 479                 emif1: emif@4c000000 {
 480                         compatible = "ti,emif-4d";
 481                         reg = <0x4c000000 0x100>;
 482                         interrupts = <0 110 0x4>;
 483                         ti,hwmods = "emif1";
 484                         phy-type = <1>;
 485                         hw-caps-read-idle-ctrl;
 486                         hw-caps-ll-interface;
 487                         hw-caps-temp-alert;
 488                 };
 489
 490                 emif2: emif@4d000000 {
 491                         compatible = "ti,emif-4d";
 492                         reg = <0x4d000000 0x100>;
 493                         interrupts = <0 111 0x4>;
 494                         ti,hwmods = "emif2";
 495                         phy-type = <1>;
 496                         hw-caps-read-idle-ctrl;
 497                         hw-caps-ll-interface;
 498                         hw-caps-temp-alert;
 499                 };
 500
 501                 ocp2scp@4a0ad000 {
 502                         compatible = "ti,omap-ocp2scp";
 503                         reg = <0x4a0ad000 0x1f>;
 504                         #address-cells = <1>;
 505                         #size-cells = <1>;
 506                         ranges;
 507                         ti,hwmods = "ocp2scp_usb_phy";
 508                         usb2_phy: usb2phy@4a0ad080 {
 509                                 compatible = "ti,omap-usb2";
 510                                 reg = <0x4a0ad080 0x58>;
 511                                 ctrl-module = <&omap_control_usb>;
 512                         };
 513                 };
 514
 515                 timer1: timer@4a318000 {
 516                         compatible = "ti,omap3430-timer";
 517                         reg = <0x4a318000 0x80>;
 518                         interrupts = <0 37 0x4>;
 519                         ti,hwmods = "timer1";
 520                         ti,timer-alwon;
 521                 };
 522
 523                 timer2: timer@48032000 {
 524                         compatible = "ti,omap3430-timer";
 525                         reg = <0x48032000 0x80>;
 526                         interrupts = <0 38 0x4>;
 527                         ti,hwmods = "timer2";
 528                 };
 529
 530                 timer3: timer@48034000 {
 531                         compatible = "ti,omap4430-timer";
 532                         reg = <0x48034000 0x80>;
 533                         interrupts = <0 39 0x4>;
 534                         ti,hwmods = "timer3";
 535                 };
 536
 537                 timer4: timer@48036000 {
 538                         compatible = "ti,omap4430-timer";
 539                         reg = <0x48036000 0x80>;
 540                         interrupts = <0 40 0x4>;
 541                         ti,hwmods = "timer4";
 542                 };
 543
 544                 timer5: timer@40138000 {
 545                         compatible = "ti,omap4430-timer";
 546                         reg = <0x40138000 0x80>,
 547                               <0x49038000 0x80>;
 548                         interrupts = <0 41 0x4>;
 549                         ti,hwmods = "timer5";
 550                         ti,timer-dsp;
 551                 };
 552
 553                 timer6: timer@4013a000 {
 554                         compatible = "ti,omap4430-timer";
 555                         reg = <0x4013a000 0x80>,
 556                               <0x4903a000 0x80>;
 557                         interrupts = <0 42 0x4>;
 558                         ti,hwmods = "timer6";
 559                         ti,timer-dsp;
 560                 };
 561
 562                 timer7: timer@4013c000 {
 563                         compatible = "ti,omap4430-timer";
 564                         reg = <0x4013c000 0x80>,
 565                               <0x4903c000 0x80>;
 566                         interrupts = <0 43 0x4>;
 567                         ti,hwmods = "timer7";
 568                         ti,timer-dsp;
 569                 };
 570
 571                 timer8: timer@4013e000 {
 572                         compatible = "ti,omap4430-timer";
 573                         reg = <0x4013e000 0x80>,
 574                               <0x4903e000 0x80>;
 575                         interrupts = <0 44 0x4>;
 576                         ti,hwmods = "timer8";
 577                         ti,timer-pwm;
 578                         ti,timer-dsp;
 579                 };
 580
 581                 timer9: timer@4803e000 {
 582                         compatible = "ti,omap4430-timer";
 583                         reg = <0x4803e000 0x80>;
 584                         interrupts = <0 45 0x4>;
 585                         ti,hwmods = "timer9";
 586                         ti,timer-pwm;
 587                 };
 588
 589                 timer10: timer@48086000 {
 590                         compatible = "ti,omap3430-timer";
 591                         reg = <0x48086000 0x80>;
 592                         interrupts = <0 46 0x4>;
 593                         ti,hwmods = "timer10";
 594                         ti,timer-pwm;
 595                 };
 596
 597                 timer11: timer@48088000 {
 598                         compatible = "ti,omap4430-timer";
 599                         reg = <0x48088000 0x80>;
 600                         interrupts = <0 47 0x4>;
 601                         ti,hwmods = "timer11";
 602                         ti,timer-pwm;
 603                 };
 604
 605                 usbhstll: usbhstll@4a062000 {
 606                         compatible = "ti,usbhs-tll";
 607                         reg = <0x4a062000 0x1000>;
 608                         interrupts = <0 78 0x4>;
 609                         ti,hwmods = "usb_tll_hs";
 610                 };
 611
 612                 usbhshost: usbhshost@4a064000 {
 613                         compatible = "ti,usbhs-host";
 614                         reg = <0x4a064000 0x800>;
 615                         ti,hwmods = "usb_host_hs";
 616                         #address-cells = <1>;
 617                         #size-cells = <1>;
 618                         ranges;
 619
 620                         usbhsohci: ohci@4a064800 {
 621                                 compatible = "ti,ohci-omap3", "usb-ohci";
 622                                 reg = <0x4a064800 0x400>;
 623                                 interrupt-parent = <&gic>;
 624                                 interrupts = <0 76 0x4>;
 625                         };
 626
 627                         usbhsehci: ehci@4a064c00 {
 628                                 compatible = "ti,ehci-omap", "usb-ehci";
 629                                 reg = <0x4a064c00 0x400>;
 630                                 interrupt-parent = <&gic>;
 631                                 interrupts = <0 77 0x4>;
 632                         };
 633                 };
 634
 635                 omap_control_usb: omap-control-usb@4a002300 {
 636                         compatible = "ti,omap-control-usb";
 637                         reg = <0x4a002300 0x4>,
 638                               <0x4a00233c 0x4>;
 639                         reg-names = "control_dev_conf", "otghs_control";
 640                         ti,type = <1>;
 641                 };
 642
 643                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 644                         compatible = "ti,omap4-musb";
 645                         reg = <0x4a0ab000 0x7ff>;
 646                         interrupts = <0 92 0x4>, <0 93 0x4>;
 647                         interrupt-names = "mc", "dma";
 648                         ti,hwmods = "usb_otg_hs";
 649                         usb-phy = <&usb2_phy>;
 650                         multipoint = <1>;
 651                         num-eps = <16>;
 652                         ram-bits = <12>;
 653                         ti,has-mailbox;
 654                 };
 655         };
 656 };