arch/arm/boot/dts/pxa27x.dtsi

   1 /* The pxa3xx skeleton simply augments the 2xx version */
   2 #include "pxa2xx.dtsi"
   3 #include "dt-bindings/clock/pxa-clock.h"
   4
   5 / {
   6         model = "Marvell PXA27x familiy SoC";
   7         compatible = "marvell,pxa27x";
   8
   9         pxabus {
  10                 pxairq: interrupt-controller@40d00000 {
  11                         marvell,intc-priority;
  12                         marvell,intc-nr-irqs = <34>;
  13                 };
  14
  15                 gpio: gpio@40e00000 {
  16                         compatible = "intel,pxa27x-gpio";
  17                         clocks = <&clks CLK_NONE>;
  18                 };
  19
  20                 pwm0: pwm@40b00000 {
  21                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  22                         reg = <0x40b00000 0x10>;
  23                         #pwm-cells = <1>;
  24                         clocks = <&clks CLK_PWM0>;
  25                 };
  26
  27                 pwm1: pwm@40b00010 {
  28                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  29                         reg = <0x40b00010 0x10>;
  30                         #pwm-cells = <1>;
  31                         clocks = <&clks CLK_PWM1>;
  32                 };
  33
  34                 pwm2: pwm@40c00000 {
  35                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  36                         reg = <0x40c00000 0x10>;
  37                         #pwm-cells = <1>;
  38                         clocks = <&clks CLK_PWM0>;
  39                 };
  40
  41                 pwm3: pwm@40c00010 {
  42                         compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
  43                         reg = <0x40c00010 0x10>;
  44                         #pwm-cells = <1>;
  45                         clocks = <&clks CLK_PWM1>;
  46                 };
  47
  48                 pwri2c: i2c@40f000180 {
  49                         compatible = "mrvl,pxa-i2c";
  50                         reg = <0x40f00180 0x24>;
  51                         interrupts = <6>;
  52                         clocks = <&clks CLK_PWRI2C>;
  53                         status = "disabled";
  54                 };
  55
  56                 pxa27x_udc: udc@40600000 {
  57                         compatible = "marvell,pxa270-udc";
  58                         reg = <0x40600000 0x10000>;
  59                         interrupts = <11>;
  60                         clocks = <&clks CLK_USB>;
  61                         status = "disabled";
  62                 };
  63         };
  64
  65         clocks {
  66                /*
  67                 * The muxing of external clocks/internal dividers for osc* clock
  68                 * sources has been hidden under the carpet by now.
  69                 */
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72                 ranges;
  73
  74                 clks: pxa2xx_clks@41300004 {
  75                         compatible = "marvell,pxa270-clocks";
  76                         #clock-cells = <1>;
  77                         status = "okay";
  78                 };
  79         };
  80 };