arch/arm/boot/dts/r8a7779.dtsi

   1 /*
   2  * Device Tree Source for Renesas r8a7779
   3  *
   4  * Copyright (C) 2013 Renesas Solutions Corp.
   5  * Copyright (C) 2013 Simon Horman
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /include/ "skeleton.dtsi"
  13
  14 / {
  15         compatible = "renesas,r8a7779";
  16
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 cpu@0 {
  22                         device_type = "cpu";
  23                         compatible = "arm,cortex-a9";
  24                         reg = <0>;
  25                 };
  26                 cpu@1 {
  27                         device_type = "cpu";
  28                         compatible = "arm,cortex-a9";
  29                         reg = <1>;
  30                 };
  31                 cpu@2 {
  32                         device_type = "cpu";
  33                         compatible = "arm,cortex-a9";
  34                         reg = <2>;
  35                 };
  36                 cpu@3 {
  37                         device_type = "cpu";
  38                         compatible = "arm,cortex-a9";
  39                         reg = <3>;
  40                 };
  41         };
  42
  43         gic: interrupt-controller@f0001000 {
  44                 compatible = "arm,cortex-a9-gic";
  45                 #interrupt-cells = <3>;
  46                 interrupt-controller;
  47                 reg = <0xf0001000 0x1000>,
  48                       <0xf0000100 0x100>;
  49         };
  50
  51         irqpin0: irqpin@fe780010 {
  52                 compatible = "renesas,intc-irqpin";
  53                 #interrupt-cells = <2>;
  54                 interrupt-controller;
  55                 reg = <0xfe78001c 4>,
  56                         <0xfe780010 4>,
  57                         <0xfe780024 4>,
  58                         <0xfe780044 4>,
  59                         <0xfe780064 4>;
  60                 interrupt-parent = <&gic>;
  61                 interrupts = <0 27 0x4
  62                                 0 28 0x4
  63                                 0 29 0x4
  64                                 0 30 0x4>;
  65                 sense-bitfield-width = <2>;
  66         };
  67
  68         i2c0: i2c@0xffc70000 {
  69                 #address-cells = <1>;
  70                 #size-cells = <0>;
  71                 compatible = "renesas,rmobile-iic";
  72                 reg = <0xffc70000 0x1000>;
  73                 interrupt-parent = <&gic>;
  74                 interrupts = <0 79 0x4>;
  75         };
  76
  77         i2c1: i2c@0xffc71000 {
  78                 #address-cells = <1>;
  79                 #size-cells = <0>;
  80                 compatible = "renesas,rmobile-iic";
  81                 reg = <0xffc71000 0x1000>;
  82                 interrupt-parent = <&gic>;
  83                 interrupts = <0 82 0x4>;
  84         };
  85
  86         i2c2: i2c@0xffc72000 {
  87                 #address-cells = <1>;
  88                 #size-cells = <0>;
  89                 compatible = "renesas,rmobile-iic";
  90                 reg = <0xffc72000 0x1000>;
  91                 interrupt-parent = <&gic>;
  92                 interrupts = <0 80 0x4>;
  93         };
  94
  95         i2c3: i2c@0xffc73000 {
  96                 #address-cells = <1>;
  97                 #size-cells = <0>;
  98                 compatible = "renesas,rmobile-iic";
  99                 reg = <0xffc73000 0x1000>;
 100                 interrupt-parent = <&gic>;
 101                 interrupts = <0 81 0x4>;
 102         };
 103
 104         thermal@ffc48000 {
 105                 compatible = "renesas,rcar-thermal";
 106                 reg = <0xffc48000 0x38>;
 107         };
 108
 109         sata: sata@fc600000 {
 110                 compatible = "renesas,rcar-sata";
 111                 reg = <0xfc600000 0x2000>;
 112                 interrupt-parent = <&gic>;
 113                 interrupts = <0 100 0x4>;
 114         };
 115 };