ARM: shmobile: lager: enable HS-USB
[deliverable/linux.git] / arch / arm / boot / dts / r8a7790-lager.dts
1 /*
2 * Device Tree Source for the Lager board
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12 /dts-v1/;
13 #include "r8a7790.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16
17 / {
18 model = "Lager";
19 compatible = "renesas,lager", "renesas,r8a7790";
20
21 aliases {
22 serial6 = &scifa0;
23 serial7 = &scifa1;
24 };
25
26 chosen {
27 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
28 stdout-path = &scifa0;
29 };
30
31 memory@40000000 {
32 device_type = "memory";
33 reg = <0 0x40000000 0 0x40000000>;
34 };
35
36 memory@140000000 {
37 device_type = "memory";
38 reg = <1 0x40000000 0 0xc0000000>;
39 };
40
41 lbsc {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 };
45
46 gpio_keys {
47 compatible = "gpio-keys";
48
49 button@1 {
50 linux,code = <KEY_1>;
51 label = "SW2-1";
52 gpio-key,wakeup;
53 debounce-interval = <20>;
54 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
55 };
56 button@2 {
57 linux,code = <KEY_2>;
58 label = "SW2-2";
59 gpio-key,wakeup;
60 debounce-interval = <20>;
61 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
62 };
63 button@3 {
64 linux,code = <KEY_3>;
65 label = "SW2-3";
66 gpio-key,wakeup;
67 debounce-interval = <20>;
68 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
69 };
70 button@4 {
71 linux,code = <KEY_4>;
72 label = "SW2-4";
73 gpio-key,wakeup;
74 debounce-interval = <20>;
75 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
76 };
77 };
78
79 leds {
80 compatible = "gpio-leds";
81 led6 {
82 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
83 };
84 led7 {
85 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
86 };
87 led8 {
88 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
89 };
90 };
91
92 fixedregulator3v3: fixedregulator@0 {
93 compatible = "regulator-fixed";
94 regulator-name = "fixed-3.3V";
95 regulator-min-microvolt = <3300000>;
96 regulator-max-microvolt = <3300000>;
97 regulator-boot-on;
98 regulator-always-on;
99 };
100
101 vcc_sdhi0: regulator@1 {
102 compatible = "regulator-fixed";
103
104 regulator-name = "SDHI0 Vcc";
105 regulator-min-microvolt = <3300000>;
106 regulator-max-microvolt = <3300000>;
107
108 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
109 enable-active-high;
110 };
111
112 vccq_sdhi0: regulator@2 {
113 compatible = "regulator-gpio";
114
115 regulator-name = "SDHI0 VccQ";
116 regulator-min-microvolt = <1800000>;
117 regulator-max-microvolt = <3300000>;
118
119 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
120 gpios-states = <1>;
121 states = <3300000 1
122 1800000 0>;
123 };
124
125 vcc_sdhi2: regulator@3 {
126 compatible = "regulator-fixed";
127
128 regulator-name = "SDHI2 Vcc";
129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <3300000>;
131
132 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
133 enable-active-high;
134 };
135
136 vccq_sdhi2: regulator@4 {
137 compatible = "regulator-gpio";
138
139 regulator-name = "SDHI2 VccQ";
140 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <3300000>;
142
143 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
144 gpios-states = <1>;
145 states = <3300000 1
146 1800000 0>;
147 };
148
149 vga-encoder {
150 compatible = "adi,adv7123";
151
152 ports {
153 #address-cells = <1>;
154 #size-cells = <0>;
155
156 port@0 {
157 reg = <0>;
158 adv7123_in: endpoint {
159 remote-endpoint = <&du_out_rgb>;
160 };
161 };
162 port@1 {
163 reg = <1>;
164 adv7123_out: endpoint {
165 remote-endpoint = <&vga_in>;
166 };
167 };
168 };
169 };
170
171 vga {
172 compatible = "vga-connector";
173
174 port {
175 vga_in: endpoint {
176 remote-endpoint = <&adv7123_out>;
177 };
178 };
179 };
180 };
181
182 &du {
183 pinctrl-0 = <&du_pins>;
184 pinctrl-names = "default";
185 status = "okay";
186
187 ports {
188 port@0 {
189 endpoint {
190 remote-endpoint = <&adv7123_in>;
191 };
192 };
193 port@2 {
194 lvds_connector: endpoint {
195 };
196 };
197 };
198 };
199
200 &extal_clk {
201 clock-frequency = <20000000>;
202 };
203
204 &pfc {
205 du_pins: du {
206 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
207 renesas,function = "du";
208 };
209
210 scifa0_pins: serial0 {
211 renesas,groups = "scifa0_data";
212 renesas,function = "scifa0";
213 };
214
215 ether_pins: ether {
216 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
217 renesas,function = "eth";
218 };
219
220 phy1_pins: phy1 {
221 renesas,groups = "intc_irq0";
222 renesas,function = "intc";
223 };
224
225 scifa1_pins: serial1 {
226 renesas,groups = "scifa1_data";
227 renesas,function = "scifa1";
228 };
229
230 sdhi0_pins: sd0 {
231 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
232 renesas,function = "sdhi0";
233 };
234
235 sdhi2_pins: sd2 {
236 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
237 renesas,function = "sdhi2";
238 };
239
240 mmc1_pins: mmc1 {
241 renesas,groups = "mmc1_data8", "mmc1_ctrl";
242 renesas,function = "mmc1";
243 };
244
245 qspi_pins: spi0 {
246 renesas,groups = "qspi_ctrl", "qspi_data4";
247 renesas,function = "qspi";
248 };
249
250 msiof1_pins: spi2 {
251 renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
252 "msiof1_tx";
253 renesas,function = "msiof1";
254 };
255
256 iic1_pins: iic1 {
257 renesas,groups = "iic1";
258 renesas,function = "iic1";
259 };
260
261 iic2_pins: iic2 {
262 renesas,groups = "iic2";
263 renesas,function = "iic2";
264 };
265
266 iic3_pins: iic3 {
267 renesas,groups = "iic3";
268 renesas,function = "iic3";
269 };
270
271 hsusb_pins: hsusb {
272 renesas,groups = "usb0_ovc_vbus";
273 renesas,function = "usb0";
274 };
275
276 usb0_pins: usb0 {
277 renesas,groups = "usb0";
278 renesas,function = "usb0";
279 };
280
281 usb1_pins: usb1 {
282 renesas,groups = "usb1";
283 renesas,function = "usb1";
284 };
285
286 usb2_pins: usb2 {
287 renesas,groups = "usb2";
288 renesas,function = "usb2";
289 };
290
291 vin1_pins: vin {
292 renesas,groups = "vin1_data8", "vin1_clk";
293 renesas,function = "vin1";
294 };
295 };
296
297 &ether {
298 pinctrl-0 = <&ether_pins &phy1_pins>;
299 pinctrl-names = "default";
300
301 phy-handle = <&phy1>;
302 renesas,ether-link-active-low;
303 status = "ok";
304
305 phy1: ethernet-phy@1 {
306 reg = <1>;
307 interrupt-parent = <&irqc0>;
308 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
309 micrel,led-mode = <1>;
310 };
311 };
312
313 &cmt0 {
314 status = "ok";
315 };
316
317 &mmcif1 {
318 pinctrl-0 = <&mmc1_pins>;
319 pinctrl-names = "default";
320
321 vmmc-supply = <&fixedregulator3v3>;
322 bus-width = <8>;
323 non-removable;
324 status = "okay";
325 };
326
327 &sata1 {
328 status = "okay";
329 };
330
331 &qspi {
332 pinctrl-0 = <&qspi_pins>;
333 pinctrl-names = "default";
334
335 status = "okay";
336
337 flash: flash@0 {
338 #address-cells = <1>;
339 #size-cells = <1>;
340 compatible = "spansion,s25fl512s";
341 reg = <0>;
342 spi-max-frequency = <30000000>;
343 spi-tx-bus-width = <4>;
344 spi-rx-bus-width = <4>;
345 m25p,fast-read;
346
347 partition@0 {
348 label = "loader";
349 reg = <0x00000000 0x00040000>;
350 read-only;
351 };
352 partition@40000 {
353 label = "user";
354 reg = <0x00040000 0x00400000>;
355 read-only;
356 };
357 partition@440000 {
358 label = "flash";
359 reg = <0x00440000 0x03bc0000>;
360 };
361 };
362 };
363
364 &scifa0 {
365 pinctrl-0 = <&scifa0_pins>;
366 pinctrl-names = "default";
367
368 status = "okay";
369 };
370
371 &scifa1 {
372 pinctrl-0 = <&scifa1_pins>;
373 pinctrl-names = "default";
374
375 status = "okay";
376 };
377
378 &msiof1 {
379 pinctrl-0 = <&msiof1_pins>;
380 pinctrl-names = "default";
381
382 status = "okay";
383
384 pmic: pmic@0 {
385 compatible = "renesas,r2a11302ft";
386 reg = <0>;
387 spi-max-frequency = <6000000>;
388 spi-cpol;
389 spi-cpha;
390 };
391 };
392
393 &sdhi0 {
394 pinctrl-0 = <&sdhi0_pins>;
395 pinctrl-names = "default";
396
397 vmmc-supply = <&vcc_sdhi0>;
398 vqmmc-supply = <&vccq_sdhi0>;
399 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
400 status = "okay";
401 };
402
403 &sdhi2 {
404 pinctrl-0 = <&sdhi2_pins>;
405 pinctrl-names = "default";
406
407 vmmc-supply = <&vcc_sdhi2>;
408 vqmmc-supply = <&vccq_sdhi2>;
409 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
410 status = "okay";
411 };
412
413 &cpu0 {
414 cpu0-supply = <&vdd_dvfs>;
415 };
416
417 &iic0 {
418 status = "ok";
419 };
420
421 &iic1 {
422 status = "ok";
423 pinctrl-0 = <&iic1_pins>;
424 pinctrl-names = "default";
425 };
426
427 &iic2 {
428 status = "ok";
429 pinctrl-0 = <&iic2_pins>;
430 pinctrl-names = "default";
431
432 composite-in@20 {
433 compatible = "adi,adv7180";
434 reg = <0x20>;
435 remote = <&vin1>;
436
437 port {
438 adv7180: endpoint {
439 bus-width = <8>;
440 remote-endpoint = <&vin1ep0>;
441 };
442 };
443 };
444 };
445
446 &iic3 {
447 pinctrl-names = "default";
448 pinctrl-0 = <&iic3_pins>;
449 status = "okay";
450
451 vdd_dvfs: regulator@68 {
452 compatible = "dlg,da9210";
453 reg = <0x68>;
454
455 regulator-min-microvolt = <1000000>;
456 regulator-max-microvolt = <1000000>;
457 regulator-boot-on;
458 regulator-always-on;
459 };
460 };
461
462 &pci0 {
463 status = "okay";
464 pinctrl-0 = <&usb0_pins>;
465 pinctrl-names = "default";
466 };
467
468 &pci1 {
469 status = "okay";
470 pinctrl-0 = <&usb1_pins>;
471 pinctrl-names = "default";
472 };
473
474 &xhci {
475 status = "okay";
476 pinctrl-0 = <&usb2_pins>;
477 pinctrl-names = "default";
478 };
479
480 &pci2 {
481 status = "okay";
482 pinctrl-0 = <&usb2_pins>;
483 pinctrl-names = "default";
484 };
485
486 &hsusb {
487 status = "okay";
488 pinctrl-0 = <&hsusb_pins>;
489 pinctrl-names = "default";
490 renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
491 };
492
493 &usbphy {
494 status = "okay";
495 };
496
497 /* composite video input */
498 &vin1 {
499 pinctrl-0 = <&vin1_pins>;
500 pinctrl-names = "default";
501
502 status = "ok";
503
504 port {
505 #address-cells = <1>;
506 #size-cells = <0>;
507
508 vin1ep0: endpoint {
509 remote-endpoint = <&adv7180>;
510 bus-width = <8>;
511 };
512 };
513 };
This page took 0.056643 seconds and 5 git commands to generate.