arch/arm/boot/dts/r8a7790-lager.dts

   1 /*
   2  * Device Tree Source for the Lager board
   3  *
   4  * Copyright (C) 2013-2014 Renesas Solutions Corp.
   5  * Copyright (C) 2014 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /*
  13  * SSI-AK4643
  14  *
  15  * SW1: 1: AK4643
  16  *      2: CN22
  17  *      3: ADV7511
  18  *
  19  * This command is required when Playback/Capture
  20  *
  21  *      amixer set "LINEOUT Mixer DACL" on
  22  *      amixer set "DVC Out" 100%
  23  *      amixer set "DVC In" 100%
  24  *
  25  * You can use Mute
  26  *
  27  *      amixer set "DVC Out Mute" on
  28  *      amixer set "DVC In Mute" on
  29  *
  30  * You can use Volume Ramp
  31  *
  32  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  33  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  34  *      amixer set "DVC Out Ramp" on
  35  *      aplay xxx.wav &
  36  *      amixer set "DVC Out"  80%  // Volume Down
  37  *      amixer set "DVC Out" 100%  // Volume Up
  38  */
  39
  40 /dts-v1/;
  41 #include "r8a7790.dtsi"
  42 #include <dt-bindings/gpio/gpio.h>
  43 #include <dt-bindings/input/input.h>
  44
  45 / {
  46         model = "Lager";
  47         compatible = "renesas,lager", "renesas,r8a7790";
  48
  49         aliases {
  50                 serial0 = &scif0;
  51                 serial1 = &scifa1;
  52         };
  53
  54         chosen {
  55                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  56                 stdout-path = "serial0:115200n8";
  57         };
  58
  59         memory@40000000 {
  60                 device_type = "memory";
  61                 reg = <0 0x40000000 0 0x40000000>;
  62         };
  63
  64         memory@140000000 {
  65                 device_type = "memory";
  66                 reg = <1 0x40000000 0 0xc0000000>;
  67         };
  68
  69         lbsc {
  70                 #address-cells = <1>;
  71                 #size-cells = <1>;
  72         };
  73
  74         keyboard {
  75                 compatible = "gpio-keys";
  76
  77                 button@1 {
  78                         linux,code = <KEY_1>;
  79                         label = "SW2-1";
  80                         wakeup-source;
  81                         debounce-interval = <20>;
  82                         gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  83                 };
  84                 button@2 {
  85                         linux,code = <KEY_2>;
  86                         label = "SW2-2";
  87                         wakeup-source;
  88                         debounce-interval = <20>;
  89                         gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
  90                 };
  91                 button@3 {
  92                         linux,code = <KEY_3>;
  93                         label = "SW2-3";
  94                         wakeup-source;
  95                         debounce-interval = <20>;
  96                         gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
  97                 };
  98                 button@4 {
  99                         linux,code = <KEY_4>;
 100                         label = "SW2-4";
 101                         wakeup-source;
 102                         debounce-interval = <20>;
 103                         gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
 104                 };
 105         };
 106
 107         leds {
 108                 compatible = "gpio-leds";
 109                 led6 {
 110                         gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
 111                 };
 112                 led7 {
 113                         gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
 114                 };
 115                 led8 {
 116                         gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
 117                 };
 118         };
 119
 120         fixedregulator3v3: fixedregulator@0 {
 121                 compatible = "regulator-fixed";
 122                 regulator-name = "fixed-3.3V";
 123                 regulator-min-microvolt = <3300000>;
 124                 regulator-max-microvolt = <3300000>;
 125                 regulator-boot-on;
 126                 regulator-always-on;
 127         };
 128
 129         vcc_sdhi0: regulator@1 {
 130                 compatible = "regulator-fixed";
 131
 132                 regulator-name = "SDHI0 Vcc";
 133                 regulator-min-microvolt = <3300000>;
 134                 regulator-max-microvolt = <3300000>;
 135
 136                 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
 137                 enable-active-high;
 138         };
 139
 140         vccq_sdhi0: regulator@2 {
 141                 compatible = "regulator-gpio";
 142
 143                 regulator-name = "SDHI0 VccQ";
 144                 regulator-min-microvolt = <1800000>;
 145                 regulator-max-microvolt = <3300000>;
 146
 147                 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
 148                 gpios-states = <1>;
 149                 states = <3300000 1
 150                           1800000 0>;
 151         };
 152
 153         vcc_sdhi2: regulator@3 {
 154                 compatible = "regulator-fixed";
 155
 156                 regulator-name = "SDHI2 Vcc";
 157                 regulator-min-microvolt = <3300000>;
 158                 regulator-max-microvolt = <3300000>;
 159
 160                 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
 161                 enable-active-high;
 162         };
 163
 164         vccq_sdhi2: regulator@4 {
 165                 compatible = "regulator-gpio";
 166
 167                 regulator-name = "SDHI2 VccQ";
 168                 regulator-min-microvolt = <1800000>;
 169                 regulator-max-microvolt = <3300000>;
 170
 171                 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
 172                 gpios-states = <1>;
 173                 states = <3300000 1
 174                           1800000 0>;
 175         };
 176
 177         audio_clock: clock {
 178                 compatible = "fixed-clock";
 179                 #clock-cells = <0>;
 180                 clock-frequency = <11289600>;
 181                 clock-output-names = "audio_clock";
 182         };
 183
 184         rsnd_ak4643: sound {
 185                 compatible = "simple-audio-card";
 186
 187                 simple-audio-card,format = "left_j";
 188                 simple-audio-card,bitclock-master = <&sndcodec>;
 189                 simple-audio-card,frame-master = <&sndcodec>;
 190
 191                 sndcpu: simple-audio-card,cpu {
 192                         sound-dai = <&rcar_sound>;
 193                 };
 194
 195                 sndcodec: simple-audio-card,codec {
 196                         sound-dai = <&ak4643>;
 197                         clocks = <&audio_clock>;
 198                 };
 199         };
 200
 201         vga-encoder {
 202                 compatible = "adi,adv7123";
 203
 204                 ports {
 205                         #address-cells = <1>;
 206                         #size-cells = <0>;
 207
 208                         port@0 {
 209                                 reg = <0>;
 210                                 adv7123_in: endpoint {
 211                                         remote-endpoint = <&du_out_rgb>;
 212                                 };
 213                         };
 214                         port@1 {
 215                                 reg = <1>;
 216                                 adv7123_out: endpoint {
 217                                         remote-endpoint = <&vga_in>;
 218                                 };
 219                         };
 220                 };
 221         };
 222
 223         vga {
 224                 compatible = "vga-connector";
 225
 226                 port {
 227                         vga_in: endpoint {
 228                                 remote-endpoint = <&adv7123_out>;
 229                         };
 230                 };
 231         };
 232
 233         hdmi-out {
 234                 compatible = "hdmi-connector";
 235                 type = "a";
 236
 237                 port {
 238                         hdmi_con: endpoint {
 239                                 remote-endpoint = <&adv7511_out>;
 240                         };
 241                 };
 242         };
 243
 244         x2_clk: x2-clock {
 245                 compatible = "fixed-clock";
 246                 #clock-cells = <0>;
 247                 clock-frequency = <148500000>;
 248         };
 249
 250         x13_clk: x13-clock {
 251                 compatible = "fixed-clock";
 252                 #clock-cells = <0>;
 253                 clock-frequency = <148500000>;
 254         };
 255 };
 256
 257 &du {
 258         pinctrl-0 = <&du_pins>;
 259         pinctrl-names = "default";
 260         status = "okay";
 261
 262         clocks = <&mstp7_clks R8A7790_CLK_DU0>,
 263                  <&mstp7_clks R8A7790_CLK_DU1>,
 264                  <&mstp7_clks R8A7790_CLK_DU2>,
 265                  <&mstp7_clks R8A7790_CLK_LVDS0>,
 266                  <&mstp7_clks R8A7790_CLK_LVDS1>,
 267                  <&x13_clk>, <&x2_clk>;
 268         clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",
 269                       "dclkin.0", "dclkin.1";
 270
 271         ports {
 272                 port@0 {
 273                         endpoint {
 274                                 remote-endpoint = <&adv7123_in>;
 275                         };
 276                 };
 277                 port@1 {
 278                         endpoint {
 279                                 remote-endpoint = <&adv7511_in>;
 280                         };
 281                 };
 282                 port@2 {
 283                         lvds_connector: endpoint {
 284                         };
 285                 };
 286         };
 287 };
 288
 289 &extal_clk {
 290         clock-frequency = <20000000>;
 291 };
 292
 293 &pfc {
 294         pinctrl-0 = <&scif_clk_pins>;
 295         pinctrl-names = "default";
 296
 297         du_pins: du {
 298                 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
 299                 renesas,function = "du";
 300         };
 301
 302         scif0_pins: serial0 {
 303                 renesas,groups = "scif0_data";
 304                 renesas,function = "scif0";
 305         };
 306
 307         scif_clk_pins: scif_clk {
 308                 renesas,groups = "scif_clk";
 309                 renesas,function = "scif_clk";
 310         };
 311
 312         ether_pins: ether {
 313                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
 314                 renesas,function = "eth";
 315         };
 316
 317         phy1_pins: phy1 {
 318                 renesas,groups = "intc_irq0";
 319                 renesas,function = "intc";
 320         };
 321
 322         scifa1_pins: serial1 {
 323                 renesas,groups = "scifa1_data";
 324                 renesas,function = "scifa1";
 325         };
 326
 327         sdhi0_pins: sd0 {
 328                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
 329                 renesas,function = "sdhi0";
 330         };
 331
 332         sdhi2_pins: sd2 {
 333                 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
 334                 renesas,function = "sdhi2";
 335         };
 336
 337         mmc1_pins: mmc1 {
 338                 renesas,groups = "mmc1_data8", "mmc1_ctrl";
 339                 renesas,function = "mmc1";
 340         };
 341
 342         qspi_pins: spi0 {
 343                 renesas,groups = "qspi_ctrl", "qspi_data4";
 344                 renesas,function = "qspi";
 345         };
 346
 347         msiof1_pins: spi2 {
 348                 renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
 349                                  "msiof1_tx";
 350                 renesas,function = "msiof1";
 351         };
 352
 353         iic0_pins: iic0 {
 354                 renesas,groups = "iic0";
 355                 renesas,function = "iic0";
 356         };
 357
 358         iic1_pins: iic1 {
 359                 renesas,groups = "iic1";
 360                 renesas,function = "iic1";
 361         };
 362
 363         iic2_pins: iic2 {
 364                 renesas,groups = "iic2";
 365                 renesas,function = "iic2";
 366         };
 367
 368         iic3_pins: iic3 {
 369                 renesas,groups = "iic3";
 370                 renesas,function = "iic3";
 371         };
 372
 373         hsusb_pins: hsusb {
 374                 renesas,groups = "usb0_ovc_vbus";
 375                 renesas,function = "usb0";
 376         };
 377
 378         usb0_pins: usb0 {
 379                 renesas,groups = "usb0";
 380                 renesas,function = "usb0";
 381         };
 382
 383         usb1_pins: usb1 {
 384                 renesas,groups = "usb1";
 385                 renesas,function = "usb1";
 386         };
 387
 388         usb2_pins: usb2 {
 389                 renesas,groups = "usb2";
 390                 renesas,function = "usb2";
 391         };
 392
 393         vin1_pins: vin {
 394                 renesas,groups = "vin1_data8", "vin1_clk";
 395                 renesas,function = "vin1";
 396         };
 397
 398         sound_pins: sound {
 399                 renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
 400                 renesas,function = "ssi";
 401         };
 402
 403         sound_clk_pins: sound_clk {
 404                 renesas,groups = "audio_clk_a";
 405                 renesas,function = "audio_clk";
 406         };
 407 };
 408
 409 &ether {
 410         pinctrl-0 = <&ether_pins &phy1_pins>;
 411         pinctrl-names = "default";
 412
 413         phy-handle = <&phy1>;
 414         renesas,ether-link-active-low;
 415         status = "okay";
 416
 417         phy1: ethernet-phy@1 {
 418                 reg = <1>;
 419                 interrupt-parent = <&irqc0>;
 420                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 421                 micrel,led-mode = <1>;
 422         };
 423 };
 424
 425 &cmt0 {
 426         status = "okay";
 427 };
 428
 429 &mmcif1 {
 430         pinctrl-0 = <&mmc1_pins>;
 431         pinctrl-names = "default";
 432
 433         vmmc-supply = <&fixedregulator3v3>;
 434         bus-width = <8>;
 435         non-removable;
 436         status = "okay";
 437 };
 438
 439 &sata1 {
 440         status = "okay";
 441 };
 442
 443 &qspi {
 444         pinctrl-0 = <&qspi_pins>;
 445         pinctrl-names = "default";
 446
 447         status = "okay";
 448
 449         flash: flash@0 {
 450                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 451                 reg = <0>;
 452                 spi-max-frequency = <30000000>;
 453                 spi-tx-bus-width = <4>;
 454                 spi-rx-bus-width = <4>;
 455                 spi-cpha;
 456                 spi-cpol;
 457                 m25p,fast-read;
 458
 459                 partitions {
 460                         compatible = "fixed-partitions";
 461                         #address-cells = <1>;
 462                         #size-cells = <1>;
 463
 464                         partition@0 {
 465                                 label = "loader";
 466                                 reg = <0x00000000 0x00040000>;
 467                                 read-only;
 468                         };
 469                         partition@40000 {
 470                                 label = "user";
 471                                 reg = <0x00040000 0x00400000>;
 472                                 read-only;
 473                         };
 474                         partition@440000 {
 475                                 label = "flash";
 476                                 reg = <0x00440000 0x03bc0000>;
 477                         };
 478                 };
 479         };
 480 };
 481
 482 &scif0 {
 483         pinctrl-0 = <&scif0_pins>;
 484         pinctrl-names = "default";
 485
 486         status = "okay";
 487 };
 488
 489 &scifa1 {
 490         pinctrl-0 = <&scifa1_pins>;
 491         pinctrl-names = "default";
 492
 493         status = "okay";
 494 };
 495
 496 &scif_clk {
 497         clock-frequency = <14745600>;
 498         status = "okay";
 499 };
 500
 501 &msiof1 {
 502         pinctrl-0 = <&msiof1_pins>;
 503         pinctrl-names = "default";
 504
 505         status = "okay";
 506
 507         pmic: pmic@0 {
 508                 compatible = "renesas,r2a11302ft";
 509                 reg = <0>;
 510                 spi-max-frequency = <6000000>;
 511                 spi-cpol;
 512                 spi-cpha;
 513         };
 514 };
 515
 516 &sdhi0 {
 517         pinctrl-0 = <&sdhi0_pins>;
 518         pinctrl-names = "default";
 519
 520         vmmc-supply = <&vcc_sdhi0>;
 521         vqmmc-supply = <&vccq_sdhi0>;
 522         cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
 523         status = "okay";
 524 };
 525
 526 &sdhi2 {
 527         pinctrl-0 = <&sdhi2_pins>;
 528         pinctrl-names = "default";
 529
 530         vmmc-supply = <&vcc_sdhi2>;
 531         vqmmc-supply = <&vccq_sdhi2>;
 532         cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
 533         status = "okay";
 534 };
 535
 536 &cpu0 {
 537         cpu0-supply = <&vdd_dvfs>;
 538 };
 539
 540 &iic0   {
 541         status = "okay";
 542         pinctrl-0 = <&iic0_pins>;
 543         pinctrl-names = "default";
 544 };
 545
 546 &iic1   {
 547         status = "okay";
 548         pinctrl-0 = <&iic1_pins>;
 549         pinctrl-names = "default";
 550 };
 551
 552 &iic2   {
 553         status = "okay";
 554         pinctrl-0 = <&iic2_pins>;
 555         pinctrl-names = "default";
 556
 557         clock-frequency = <100000>;
 558
 559         ak4643: codec@12 {
 560                 compatible = "asahi-kasei,ak4643";
 561                 #sound-dai-cells = <0>;
 562                 reg = <0x12>;
 563         };
 564
 565         composite-in@20 {
 566                 compatible = "adi,adv7180";
 567                 reg = <0x20>;
 568                 remote = <&vin1>;
 569
 570                 port {
 571                         adv7180: endpoint {
 572                                 bus-width = <8>;
 573                                 remote-endpoint = <&vin1ep0>;
 574                         };
 575                 };
 576         };
 577
 578         hdmi@39 {
 579                 compatible = "adi,adv7511w";
 580                 reg = <0x39>;
 581                 interrupt-parent = <&gpio1>;
 582                 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
 583
 584                 adi,input-depth = <8>;
 585                 adi,input-colorspace = "rgb";
 586                 adi,input-clock = "1x";
 587                 adi,input-style = <1>;
 588                 adi,input-justification = "evenly";
 589
 590                 ports {
 591                         #address-cells = <1>;
 592                         #size-cells = <0>;
 593
 594                         port@0 {
 595                                 reg = <0>;
 596                                 adv7511_in: endpoint {
 597                                         remote-endpoint = <&du_out_lvds0>;
 598                                 };
 599                         };
 600
 601                         port@1 {
 602                                 reg = <1>;
 603                                 adv7511_out: endpoint {
 604                                         remote-endpoint = <&hdmi_con>;
 605                                 };
 606                         };
 607                 };
 608         };
 609 };
 610
 611 &iic3 {
 612         pinctrl-names = "default";
 613         pinctrl-0 = <&iic3_pins>;
 614         status = "okay";
 615
 616         pmic@58 {
 617                 compatible = "dlg,da9063";
 618                 reg = <0x58>;
 619                 interrupt-parent = <&irqc0>;
 620                 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 621                 interrupt-controller;
 622
 623                 rtc {
 624                         compatible = "dlg,da9063-rtc";
 625                 };
 626
 627                 wdt {
 628                         compatible = "dlg,da9063-watchdog";
 629                 };
 630         };
 631
 632         vdd_dvfs: regulator@68 {
 633                 compatible = "dlg,da9210";
 634                 reg = <0x68>;
 635                 interrupt-parent = <&irqc0>;
 636                 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 637
 638                 regulator-min-microvolt = <1000000>;
 639                 regulator-max-microvolt = <1000000>;
 640                 regulator-boot-on;
 641                 regulator-always-on;
 642         };
 643 };
 644
 645 &pci0 {
 646         status = "okay";
 647         pinctrl-0 = <&usb0_pins>;
 648         pinctrl-names = "default";
 649 };
 650
 651 &pci1 {
 652         status = "okay";
 653         pinctrl-0 = <&usb1_pins>;
 654         pinctrl-names = "default";
 655 };
 656
 657 &xhci {
 658         status = "okay";
 659         pinctrl-0 = <&usb2_pins>;
 660         pinctrl-names = "default";
 661 };
 662
 663 &pci2 {
 664         status = "okay";
 665         pinctrl-0 = <&usb2_pins>;
 666         pinctrl-names = "default";
 667 };
 668
 669 &hsusb {
 670         status = "okay";
 671         pinctrl-0 = <&hsusb_pins>;
 672         pinctrl-names = "default";
 673         renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
 674 };
 675
 676 &usbphy {
 677         status = "okay";
 678 };
 679
 680 /* composite video input */
 681 &vin1 {
 682         pinctrl-0 = <&vin1_pins>;
 683         pinctrl-names = "default";
 684
 685         status = "okay";
 686
 687         port {
 688                 #address-cells = <1>;
 689                 #size-cells = <0>;
 690
 691                 vin1ep0: endpoint {
 692                         remote-endpoint = <&adv7180>;
 693                         bus-width = <8>;
 694                 };
 695         };
 696 };
 697
 698 &rcar_sound {
 699         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 700         pinctrl-names = "default";
 701
 702         /* Single DAI */
 703         #sound-dai-cells = <0>;
 704
 705         status = "okay";
 706
 707         rcar_sound,dai {
 708                 dai0 {
 709                         playback = <&ssi0 &src2 &dvc0>;
 710                         capture  = <&ssi1 &src3 &dvc1>;
 711                 };
 712         };
 713 };
 714
 715 &ssi1 {
 716         shared-pin;
 717 };