Merge tag 'v3.18-rockchip-dts2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / boot / dts / r8a7790-lager.dts
1 /*
2 * Device Tree Source for the Lager board
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12 /dts-v1/;
13 #include "r8a7790.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16
17 / {
18 model = "Lager";
19 compatible = "renesas,lager", "renesas,r8a7790";
20
21 aliases {
22 serial6 = &scif0;
23 serial7 = &scif1;
24 };
25
26 chosen {
27 bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
28 };
29
30 memory@40000000 {
31 device_type = "memory";
32 reg = <0 0x40000000 0 0x40000000>;
33 };
34
35 memory@140000000 {
36 device_type = "memory";
37 reg = <1 0x40000000 0 0xc0000000>;
38 };
39
40 lbsc {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 };
44
45 gpio_keys {
46 compatible = "gpio-keys";
47
48 button@1 {
49 linux,code = <KEY_1>;
50 label = "SW2-1";
51 gpio-key,wakeup;
52 debounce-interval = <20>;
53 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
54 };
55 button@2 {
56 linux,code = <KEY_2>;
57 label = "SW2-2";
58 gpio-key,wakeup;
59 debounce-interval = <20>;
60 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
61 };
62 button@3 {
63 linux,code = <KEY_3>;
64 label = "SW2-3";
65 gpio-key,wakeup;
66 debounce-interval = <20>;
67 gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
68 };
69 button@4 {
70 linux,code = <KEY_4>;
71 label = "SW2-4";
72 gpio-key,wakeup;
73 debounce-interval = <20>;
74 gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
75 };
76 };
77
78 leds {
79 compatible = "gpio-leds";
80 led6 {
81 gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
82 };
83 led7 {
84 gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
85 };
86 led8 {
87 gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
88 };
89 };
90
91 fixedregulator3v3: fixedregulator@0 {
92 compatible = "regulator-fixed";
93 regulator-name = "fixed-3.3V";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96 regulator-boot-on;
97 regulator-always-on;
98 };
99
100 vcc_sdhi0: regulator@1 {
101 compatible = "regulator-fixed";
102
103 regulator-name = "SDHI0 Vcc";
104 regulator-min-microvolt = <3300000>;
105 regulator-max-microvolt = <3300000>;
106
107 gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
108 enable-active-high;
109 };
110
111 vccq_sdhi0: regulator@2 {
112 compatible = "regulator-gpio";
113
114 regulator-name = "SDHI0 VccQ";
115 regulator-min-microvolt = <1800000>;
116 regulator-max-microvolt = <3300000>;
117
118 gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
119 gpios-states = <1>;
120 states = <3300000 1
121 1800000 0>;
122 };
123
124 vcc_sdhi2: regulator@3 {
125 compatible = "regulator-fixed";
126
127 regulator-name = "SDHI2 Vcc";
128 regulator-min-microvolt = <3300000>;
129 regulator-max-microvolt = <3300000>;
130
131 gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>;
132 enable-active-high;
133 };
134
135 vccq_sdhi2: regulator@4 {
136 compatible = "regulator-gpio";
137
138 regulator-name = "SDHI2 VccQ";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <3300000>;
141
142 gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
143 gpios-states = <1>;
144 states = <3300000 1
145 1800000 0>;
146 };
147 };
148
149 &extal_clk {
150 clock-frequency = <20000000>;
151 };
152
153 &pfc {
154 pinctrl-0 = <&du_pins>;
155 pinctrl-names = "default";
156
157 du_pins: du {
158 renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
159 renesas,function = "du";
160 };
161
162 scif0_pins: serial0 {
163 renesas,groups = "scif0_data";
164 renesas,function = "scif0";
165 };
166
167 ether_pins: ether {
168 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
169 renesas,function = "eth";
170 };
171
172 phy1_pins: phy1 {
173 renesas,groups = "intc_irq0";
174 renesas,function = "intc";
175 };
176
177 scif1_pins: serial1 {
178 renesas,groups = "scif1_data";
179 renesas,function = "scif1";
180 };
181
182 sdhi0_pins: sd0 {
183 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
184 renesas,function = "sdhi0";
185 };
186
187 sdhi2_pins: sd2 {
188 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
189 renesas,function = "sdhi2";
190 };
191
192 mmc1_pins: mmc1 {
193 renesas,groups = "mmc1_data8", "mmc1_ctrl";
194 renesas,function = "mmc1";
195 };
196
197 qspi_pins: spi0 {
198 renesas,groups = "qspi_ctrl", "qspi_data4";
199 renesas,function = "qspi";
200 };
201
202 msiof1_pins: spi2 {
203 renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
204 "msiof1_tx";
205 renesas,function = "msiof1";
206 };
207
208 iic1_pins: iic1 {
209 renesas,groups = "iic1";
210 renesas,function = "iic1";
211 };
212
213 iic2_pins: iic2 {
214 renesas,groups = "iic2";
215 renesas,function = "iic2";
216 };
217
218 iic3_pins: iic3 {
219 renesas,groups = "iic3";
220 renesas,function = "iic3";
221 };
222
223 usb0_pins: usb0 {
224 renesas,groups = "usb0";
225 renesas,function = "usb0";
226 };
227
228 usb1_pins: usb1 {
229 renesas,groups = "usb1";
230 renesas,function = "usb1";
231 };
232
233 usb2_pins: usb2 {
234 renesas,groups = "usb2";
235 renesas,function = "usb2";
236 };
237
238 vin1_pins: vin {
239 renesas,groups = "vin1_data8", "vin1_clk";
240 renesas,function = "vin1";
241 };
242 };
243
244 &ether {
245 pinctrl-0 = <&ether_pins &phy1_pins>;
246 pinctrl-names = "default";
247
248 phy-handle = <&phy1>;
249 renesas,ether-link-active-low;
250 status = "ok";
251
252 phy1: ethernet-phy@1 {
253 reg = <1>;
254 interrupt-parent = <&irqc0>;
255 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
256 micrel,led-mode = <1>;
257 };
258 };
259
260 &mmcif1 {
261 pinctrl-0 = <&mmc1_pins>;
262 pinctrl-names = "default";
263
264 vmmc-supply = <&fixedregulator3v3>;
265 bus-width = <8>;
266 non-removable;
267 status = "okay";
268 };
269
270 &sata1 {
271 status = "okay";
272 };
273
274 &qspi {
275 pinctrl-0 = <&qspi_pins>;
276 pinctrl-names = "default";
277
278 status = "okay";
279
280 flash: flash@0 {
281 #address-cells = <1>;
282 #size-cells = <1>;
283 compatible = "spansion,s25fl512s";
284 reg = <0>;
285 spi-max-frequency = <30000000>;
286 spi-tx-bus-width = <4>;
287 spi-rx-bus-width = <4>;
288 m25p,fast-read;
289
290 partition@0 {
291 label = "loader";
292 reg = <0x00000000 0x00040000>;
293 read-only;
294 };
295 partition@40000 {
296 label = "user";
297 reg = <0x00040000 0x00400000>;
298 read-only;
299 };
300 partition@440000 {
301 label = "flash";
302 reg = <0x00440000 0x03bc0000>;
303 };
304 };
305 };
306
307 &scif0 {
308 pinctrl-0 = <&scif0_pins>;
309 pinctrl-names = "default";
310
311 status = "okay";
312 };
313
314 &scif1 {
315 pinctrl-0 = <&scif1_pins>;
316 pinctrl-names = "default";
317
318 status = "okay";
319 };
320
321 &msiof1 {
322 pinctrl-0 = <&msiof1_pins>;
323 pinctrl-names = "default";
324
325 status = "okay";
326
327 pmic: pmic@0 {
328 compatible = "renesas,r2a11302ft";
329 reg = <0>;
330 spi-max-frequency = <6000000>;
331 spi-cpol;
332 spi-cpha;
333 };
334 };
335
336 &sdhi0 {
337 pinctrl-0 = <&sdhi0_pins>;
338 pinctrl-names = "default";
339
340 vmmc-supply = <&vcc_sdhi0>;
341 vqmmc-supply = <&vccq_sdhi0>;
342 cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
343 status = "okay";
344 };
345
346 &sdhi2 {
347 pinctrl-0 = <&sdhi2_pins>;
348 pinctrl-names = "default";
349
350 vmmc-supply = <&vcc_sdhi2>;
351 vqmmc-supply = <&vccq_sdhi2>;
352 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
353 status = "okay";
354 };
355
356 &cpu0 {
357 cpu0-supply = <&vdd_dvfs>;
358 };
359
360 &iic0 {
361 status = "ok";
362 };
363
364 &iic1 {
365 status = "ok";
366 pinctrl-0 = <&iic1_pins>;
367 pinctrl-names = "default";
368 };
369
370 &iic2 {
371 status = "ok";
372 pinctrl-0 = <&iic2_pins>;
373 pinctrl-names = "default";
374
375 composite-in@20 {
376 compatible = "adi,adv7180";
377 reg = <0x20>;
378 remote = <&vin1>;
379
380 port {
381 adv7180: endpoint {
382 bus-width = <8>;
383 remote-endpoint = <&vin1ep0>;
384 };
385 };
386 };
387 };
388
389 &iic3 {
390 pinctrl-names = "default";
391 pinctrl-0 = <&iic3_pins>;
392 status = "okay";
393
394 vdd_dvfs: regulator@68 {
395 compatible = "diasemi,da9210";
396 reg = <0x68>;
397
398 regulator-min-microvolt = <1000000>;
399 regulator-max-microvolt = <1000000>;
400 regulator-boot-on;
401 regulator-always-on;
402 };
403 };
404
405 &pci0 {
406 status = "okay";
407 pinctrl-0 = <&usb0_pins>;
408 pinctrl-names = "default";
409 };
410
411 &pci1 {
412 status = "okay";
413 pinctrl-0 = <&usb1_pins>;
414 pinctrl-names = "default";
415 };
416
417 &pci2 {
418 status = "okay";
419 pinctrl-0 = <&usb2_pins>;
420 pinctrl-names = "default";
421 };
422
423 /* composite video input */
424 &vin1 {
425 pinctrl-0 = <&vin1_pins>;
426 pinctrl-names = "default";
427
428 status = "ok";
429
430 port {
431 #address-cells = <1>;
432 #size-cells = <0>;
433
434 vin1ep0: endpoint {
435 remote-endpoint = <&adv7180>;
436 bus-width = <8>;
437 };
438 };
439 };
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