2 * Device Tree Source for the r8a7790 SoC
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
13 #include <dt-bindings/clock/r8a7790-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 compatible = "renesas,r8a7790";
19 interrupt-parent = <&gic>;
49 compatible = "arm,cortex-a15";
51 clock-frequency = <1300000000>;
52 voltage-tolerance = <1>; /* 1% */
53 clocks = <&cpg_clocks R8A7790_CLK_Z>;
54 clock-latency = <300000>; /* 300 us */
55 next-level-cache = <&L2_CA15>;
57 /* kHz - uV - OPPs unknown yet */
58 operating-points = <1400000 1000000>,
68 compatible = "arm,cortex-a15";
70 clock-frequency = <1300000000>;
71 next-level-cache = <&L2_CA15>;
76 compatible = "arm,cortex-a15";
78 clock-frequency = <1300000000>;
79 next-level-cache = <&L2_CA15>;
84 compatible = "arm,cortex-a15";
86 clock-frequency = <1300000000>;
87 next-level-cache = <&L2_CA15>;
92 compatible = "arm,cortex-a7";
94 clock-frequency = <780000000>;
95 next-level-cache = <&L2_CA7>;
100 compatible = "arm,cortex-a7";
102 clock-frequency = <780000000>;
103 next-level-cache = <&L2_CA7>;
108 compatible = "arm,cortex-a7";
110 clock-frequency = <780000000>;
111 next-level-cache = <&L2_CA7>;
116 compatible = "arm,cortex-a7";
118 clock-frequency = <780000000>;
119 next-level-cache = <&L2_CA7>;
124 cpu_thermal: cpu-thermal {
125 polling-delay-passive = <0>;
128 thermal-sensors = <&thermal>;
132 temperature = <115000>;
142 L2_CA15: cache-controller@0 {
143 compatible = "cache";
148 L2_CA7: cache-controller@1 {
149 compatible = "cache";
154 gic: interrupt-controller@f1001000 {
155 compatible = "arm,gic-400";
156 #interrupt-cells = <3>;
157 #address-cells = <0>;
158 interrupt-controller;
159 reg = <0 0xf1001000 0 0x1000>,
160 <0 0xf1002000 0 0x1000>,
161 <0 0xf1004000 0 0x2000>,
162 <0 0xf1006000 0 0x2000>;
163 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
166 gpio0: gpio@e6050000 {
167 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
168 reg = <0 0xe6050000 0 0x50>;
169 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
172 gpio-ranges = <&pfc 0 0 32>;
173 #interrupt-cells = <2>;
174 interrupt-controller;
175 clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
176 power-domains = <&cpg_clocks>;
179 gpio1: gpio@e6051000 {
180 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
181 reg = <0 0xe6051000 0 0x50>;
182 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
185 gpio-ranges = <&pfc 0 32 30>;
186 #interrupt-cells = <2>;
187 interrupt-controller;
188 clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
189 power-domains = <&cpg_clocks>;
192 gpio2: gpio@e6052000 {
193 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
194 reg = <0 0xe6052000 0 0x50>;
195 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
198 gpio-ranges = <&pfc 0 64 30>;
199 #interrupt-cells = <2>;
200 interrupt-controller;
201 clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
202 power-domains = <&cpg_clocks>;
205 gpio3: gpio@e6053000 {
206 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
207 reg = <0 0xe6053000 0 0x50>;
208 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
211 gpio-ranges = <&pfc 0 96 32>;
212 #interrupt-cells = <2>;
213 interrupt-controller;
214 clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
215 power-domains = <&cpg_clocks>;
218 gpio4: gpio@e6054000 {
219 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
220 reg = <0 0xe6054000 0 0x50>;
221 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
224 gpio-ranges = <&pfc 0 128 32>;
225 #interrupt-cells = <2>;
226 interrupt-controller;
227 clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
228 power-domains = <&cpg_clocks>;
231 gpio5: gpio@e6055000 {
232 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
233 reg = <0 0xe6055000 0 0x50>;
234 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
237 gpio-ranges = <&pfc 0 160 32>;
238 #interrupt-cells = <2>;
239 interrupt-controller;
240 clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
241 power-domains = <&cpg_clocks>;
244 thermal: thermal@e61f0000 {
245 compatible = "renesas,thermal-r8a7790",
246 "renesas,rcar-gen2-thermal",
247 "renesas,rcar-thermal";
248 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
249 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
251 power-domains = <&cpg_clocks>;
252 #thermal-sensor-cells = <0>;
256 compatible = "arm,armv7-timer";
257 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
258 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
259 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
260 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
263 cmt0: timer@ffca0000 {
264 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
265 reg = <0 0xffca0000 0 0x1004>;
266 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
267 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
268 clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
270 power-domains = <&cpg_clocks>;
272 renesas,channels-mask = <0x60>;
277 cmt1: timer@e6130000 {
278 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
279 reg = <0 0xe6130000 0 0x1004>;
280 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
288 clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
290 power-domains = <&cpg_clocks>;
292 renesas,channels-mask = <0xff>;
297 irqc0: interrupt-controller@e61c0000 {
298 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
299 #interrupt-cells = <2>;
300 interrupt-controller;
301 reg = <0 0xe61c0000 0 0x200>;
302 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
303 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
306 clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
307 power-domains = <&cpg_clocks>;
310 dmac0: dma-controller@e6700000 {
311 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
312 reg = <0 0xe6700000 0 0x20000>;
313 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
316 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
317 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
318 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
319 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
320 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
321 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
322 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
323 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
324 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
325 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
326 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
327 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
328 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
329 interrupt-names = "error",
330 "ch0", "ch1", "ch2", "ch3",
331 "ch4", "ch5", "ch6", "ch7",
332 "ch8", "ch9", "ch10", "ch11",
333 "ch12", "ch13", "ch14";
334 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
336 power-domains = <&cpg_clocks>;
341 dmac1: dma-controller@e6720000 {
342 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
343 reg = <0 0xe6720000 0 0x20000>;
344 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
360 interrupt-names = "error",
361 "ch0", "ch1", "ch2", "ch3",
362 "ch4", "ch5", "ch6", "ch7",
363 "ch8", "ch9", "ch10", "ch11",
364 "ch12", "ch13", "ch14";
365 clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
367 power-domains = <&cpg_clocks>;
372 audma0: dma-controller@ec700000 {
373 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
374 reg = <0 0xec700000 0 0x10000>;
375 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
376 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
389 interrupt-names = "error",
390 "ch0", "ch1", "ch2", "ch3",
391 "ch4", "ch5", "ch6", "ch7",
392 "ch8", "ch9", "ch10", "ch11",
394 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
396 power-domains = <&cpg_clocks>;
401 audma1: dma-controller@ec720000 {
402 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
403 reg = <0 0xec720000 0 0x10000>;
404 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
407 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
408 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
409 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
410 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
412 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
413 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
414 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
415 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
416 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
418 interrupt-names = "error",
419 "ch0", "ch1", "ch2", "ch3",
420 "ch4", "ch5", "ch6", "ch7",
421 "ch8", "ch9", "ch10", "ch11",
423 clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
425 power-domains = <&cpg_clocks>;
430 usb_dmac0: dma-controller@e65a0000 {
431 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
432 reg = <0 0xe65a0000 0 0x100>;
433 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
435 interrupt-names = "ch0", "ch1";
436 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
437 power-domains = <&cpg_clocks>;
442 usb_dmac1: dma-controller@e65b0000 {
443 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
444 reg = <0 0xe65b0000 0 0x100>;
445 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
446 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
447 interrupt-names = "ch0", "ch1";
448 clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
449 power-domains = <&cpg_clocks>;
455 #address-cells = <1>;
457 compatible = "renesas,i2c-r8a7790";
458 reg = <0 0xe6508000 0 0x40>;
459 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
460 clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
461 power-domains = <&cpg_clocks>;
462 i2c-scl-internal-delay-ns = <110>;
467 #address-cells = <1>;
469 compatible = "renesas,i2c-r8a7790";
470 reg = <0 0xe6518000 0 0x40>;
471 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
472 clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
473 power-domains = <&cpg_clocks>;
474 i2c-scl-internal-delay-ns = <6>;
479 #address-cells = <1>;
481 compatible = "renesas,i2c-r8a7790";
482 reg = <0 0xe6530000 0 0x40>;
483 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
484 clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
485 power-domains = <&cpg_clocks>;
486 i2c-scl-internal-delay-ns = <6>;
491 #address-cells = <1>;
493 compatible = "renesas,i2c-r8a7790";
494 reg = <0 0xe6540000 0 0x40>;
495 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
496 clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
497 power-domains = <&cpg_clocks>;
498 i2c-scl-internal-delay-ns = <110>;
503 #address-cells = <1>;
505 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
506 reg = <0 0xe6500000 0 0x425>;
507 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
508 clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
509 dmas = <&dmac0 0x61>, <&dmac0 0x62>;
510 dma-names = "tx", "rx";
511 power-domains = <&cpg_clocks>;
516 #address-cells = <1>;
518 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
519 reg = <0 0xe6510000 0 0x425>;
520 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
521 clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
522 dmas = <&dmac0 0x65>, <&dmac0 0x66>;
523 dma-names = "tx", "rx";
524 power-domains = <&cpg_clocks>;
529 #address-cells = <1>;
531 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
532 reg = <0 0xe6520000 0 0x425>;
533 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
534 clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
535 dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
536 dma-names = "tx", "rx";
537 power-domains = <&cpg_clocks>;
542 #address-cells = <1>;
544 compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
545 reg = <0 0xe60b0000 0 0x425>;
546 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
547 clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
548 dmas = <&dmac0 0x77>, <&dmac0 0x78>;
549 dma-names = "tx", "rx";
550 power-domains = <&cpg_clocks>;
554 mmcif0: mmc@ee200000 {
555 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
556 reg = <0 0xee200000 0 0x80>;
557 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
559 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
560 dma-names = "tx", "rx";
561 power-domains = <&cpg_clocks>;
564 max-frequency = <97500000>;
567 mmcif1: mmc@ee220000 {
568 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
569 reg = <0 0xee220000 0 0x80>;
570 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
571 clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
572 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
573 dma-names = "tx", "rx";
574 power-domains = <&cpg_clocks>;
577 max-frequency = <97500000>;
581 compatible = "renesas,pfc-r8a7790";
582 reg = <0 0xe6060000 0 0x250>;
586 compatible = "renesas,sdhi-r8a7790";
587 reg = <0 0xee100000 0 0x328>;
588 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
590 dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
591 dma-names = "tx", "rx";
592 max-frequency = <195000000>;
593 power-domains = <&cpg_clocks>;
598 compatible = "renesas,sdhi-r8a7790";
599 reg = <0 0xee120000 0 0x328>;
600 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
601 clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
602 dmas = <&dmac1 0xc9>, <&dmac1 0xca>;
603 dma-names = "tx", "rx";
604 max-frequency = <195000000>;
605 power-domains = <&cpg_clocks>;
610 compatible = "renesas,sdhi-r8a7790";
611 reg = <0 0xee140000 0 0x100>;
612 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
613 clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
614 dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
615 dma-names = "tx", "rx";
616 max-frequency = <97500000>;
617 power-domains = <&cpg_clocks>;
622 compatible = "renesas,sdhi-r8a7790";
623 reg = <0 0xee160000 0 0x100>;
624 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
625 clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
626 dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
627 dma-names = "tx", "rx";
628 max-frequency = <97500000>;
629 power-domains = <&cpg_clocks>;
633 scifa0: serial@e6c40000 {
634 compatible = "renesas,scifa-r8a7790",
635 "renesas,rcar-gen2-scifa", "renesas,scifa";
636 reg = <0 0xe6c40000 0 64>;
637 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
638 clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
640 dmas = <&dmac0 0x21>, <&dmac0 0x22>;
641 dma-names = "tx", "rx";
642 power-domains = <&cpg_clocks>;
646 scifa1: serial@e6c50000 {
647 compatible = "renesas,scifa-r8a7790",
648 "renesas,rcar-gen2-scifa", "renesas,scifa";
649 reg = <0 0xe6c50000 0 64>;
650 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
653 dmas = <&dmac0 0x25>, <&dmac0 0x26>;
654 dma-names = "tx", "rx";
655 power-domains = <&cpg_clocks>;
659 scifa2: serial@e6c60000 {
660 compatible = "renesas,scifa-r8a7790",
661 "renesas,rcar-gen2-scifa", "renesas,scifa";
662 reg = <0 0xe6c60000 0 64>;
663 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
664 clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
666 dmas = <&dmac0 0x27>, <&dmac0 0x28>;
667 dma-names = "tx", "rx";
668 power-domains = <&cpg_clocks>;
672 scifb0: serial@e6c20000 {
673 compatible = "renesas,scifb-r8a7790",
674 "renesas,rcar-gen2-scifb", "renesas,scifb";
675 reg = <0 0xe6c20000 0 64>;
676 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
677 clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
679 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
680 dma-names = "tx", "rx";
681 power-domains = <&cpg_clocks>;
685 scifb1: serial@e6c30000 {
686 compatible = "renesas,scifb-r8a7790",
687 "renesas,rcar-gen2-scifb", "renesas,scifb";
688 reg = <0 0xe6c30000 0 64>;
689 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
690 clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
692 dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
693 dma-names = "tx", "rx";
694 power-domains = <&cpg_clocks>;
698 scifb2: serial@e6ce0000 {
699 compatible = "renesas,scifb-r8a7790",
700 "renesas,rcar-gen2-scifb", "renesas,scifb";
701 reg = <0 0xe6ce0000 0 64>;
702 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
703 clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
705 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
706 dma-names = "tx", "rx";
707 power-domains = <&cpg_clocks>;
711 scif0: serial@e6e60000 {
712 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
714 reg = <0 0xe6e60000 0 64>;
715 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&mstp7_clks R8A7790_CLK_SCIF0>, <&zs_clk>,
718 clock-names = "fck", "brg_int", "scif_clk";
719 dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
720 dma-names = "tx", "rx";
721 power-domains = <&cpg_clocks>;
725 scif1: serial@e6e68000 {
726 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
728 reg = <0 0xe6e68000 0 64>;
729 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&mstp7_clks R8A7790_CLK_SCIF1>, <&zs_clk>,
732 clock-names = "fck", "brg_int", "scif_clk";
733 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
734 dma-names = "tx", "rx";
735 power-domains = <&cpg_clocks>;
739 scif2: serial@e6e56000 {
740 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
742 reg = <0 0xe6e56000 0 64>;
743 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
744 clocks = <&mstp3_clks R8A7790_CLK_SCIF2>, <&zs_clk>,
746 clock-names = "fck", "brg_int", "scif_clk";
747 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
748 dma-names = "tx", "rx";
749 power-domains = <&cpg_clocks>;
753 hscif0: serial@e62c0000 {
754 compatible = "renesas,hscif-r8a7790",
755 "renesas,rcar-gen2-hscif", "renesas,hscif";
756 reg = <0 0xe62c0000 0 96>;
757 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
758 clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>, <&zs_clk>,
760 clock-names = "fck", "brg_int", "scif_clk";
761 dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
762 dma-names = "tx", "rx";
763 power-domains = <&cpg_clocks>;
767 hscif1: serial@e62c8000 {
768 compatible = "renesas,hscif-r8a7790",
769 "renesas,rcar-gen2-hscif", "renesas,hscif";
770 reg = <0 0xe62c8000 0 96>;
771 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
772 clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>, <&zs_clk>,
774 clock-names = "fck", "brg_int", "scif_clk";
775 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
776 dma-names = "tx", "rx";
777 power-domains = <&cpg_clocks>;
781 ether: ethernet@ee700000 {
782 compatible = "renesas,ether-r8a7790";
783 reg = <0 0xee700000 0 0x400>;
784 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
785 clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
786 power-domains = <&cpg_clocks>;
788 #address-cells = <1>;
793 avb: ethernet@e6800000 {
794 compatible = "renesas,etheravb-r8a7790",
795 "renesas,etheravb-rcar-gen2";
796 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
797 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
799 power-domains = <&cpg_clocks>;
800 #address-cells = <1>;
805 sata0: sata@ee300000 {
806 compatible = "renesas,sata-r8a7790";
807 reg = <0 0xee300000 0 0x2000>;
808 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
809 clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
810 power-domains = <&cpg_clocks>;
814 sata1: sata@ee500000 {
815 compatible = "renesas,sata-r8a7790";
816 reg = <0 0xee500000 0 0x2000>;
817 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
818 clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
819 power-domains = <&cpg_clocks>;
823 hsusb: usb@e6590000 {
824 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
825 reg = <0 0xe6590000 0 0x100>;
826 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
827 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
828 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
829 <&usb_dmac1 0>, <&usb_dmac1 1>;
830 dma-names = "ch0", "ch1", "ch2", "ch3";
831 power-domains = <&cpg_clocks>;
832 renesas,buswait = <4>;
838 usbphy: usb-phy@e6590100 {
839 compatible = "renesas,usb-phy-r8a7790";
840 reg = <0 0xe6590100 0 0x100>;
841 #address-cells = <1>;
843 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
844 clock-names = "usbhs";
845 power-domains = <&cpg_clocks>;
848 usb0: usb-channel@0 {
852 usb2: usb-channel@2 {
858 vin0: video@e6ef0000 {
859 compatible = "renesas,vin-r8a7790";
860 reg = <0 0xe6ef0000 0 0x1000>;
861 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
862 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
863 power-domains = <&cpg_clocks>;
867 vin1: video@e6ef1000 {
868 compatible = "renesas,vin-r8a7790";
869 reg = <0 0xe6ef1000 0 0x1000>;
870 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
871 clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
872 power-domains = <&cpg_clocks>;
876 vin2: video@e6ef2000 {
877 compatible = "renesas,vin-r8a7790";
878 reg = <0 0xe6ef2000 0 0x1000>;
879 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
880 clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
881 power-domains = <&cpg_clocks>;
885 vin3: video@e6ef3000 {
886 compatible = "renesas,vin-r8a7790";
887 reg = <0 0xe6ef3000 0 0x1000>;
888 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
889 clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
890 power-domains = <&cpg_clocks>;
895 compatible = "renesas,vsp1";
896 reg = <0 0xfe920000 0 0x8000>;
897 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
898 clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
899 power-domains = <&cpg_clocks>;
908 compatible = "renesas,vsp1";
909 reg = <0 0xfe928000 0 0x8000>;
910 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
911 clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
912 power-domains = <&cpg_clocks>;
922 compatible = "renesas,vsp1";
923 reg = <0 0xfe930000 0 0x8000>;
924 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
925 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
926 power-domains = <&cpg_clocks>;
936 compatible = "renesas,vsp1";
937 reg = <0 0xfe938000 0 0x8000>;
938 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
939 clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
940 power-domains = <&cpg_clocks>;
949 du: display@feb00000 {
950 compatible = "renesas,du-r8a7790";
951 reg = <0 0xfeb00000 0 0x70000>,
952 <0 0xfeb90000 0 0x1c>,
953 <0 0xfeb94000 0 0x1c>;
954 reg-names = "du", "lvds.0", "lvds.1";
955 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
956 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
957 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&mstp7_clks R8A7790_CLK_DU0>,
959 <&mstp7_clks R8A7790_CLK_DU1>,
960 <&mstp7_clks R8A7790_CLK_DU2>,
961 <&mstp7_clks R8A7790_CLK_LVDS0>,
962 <&mstp7_clks R8A7790_CLK_LVDS1>;
963 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
967 #address-cells = <1>;
972 du_out_rgb: endpoint {
977 du_out_lvds0: endpoint {
982 du_out_lvds1: endpoint {
989 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
990 reg = <0 0xe6e80000 0 0x1000>;
991 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
992 clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
993 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
994 clock-names = "clkp1", "clkp2", "can_clk";
995 power-domains = <&cpg_clocks>;
1000 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1001 reg = <0 0xe6e88000 0 0x1000>;
1002 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1003 clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
1004 <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
1005 clock-names = "clkp1", "clkp2", "can_clk";
1006 power-domains = <&cpg_clocks>;
1007 status = "disabled";
1010 jpu: jpeg-codec@fe980000 {
1011 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1012 reg = <0 0xfe980000 0 0x10300>;
1013 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&mstp1_clks R8A7790_CLK_JPU>;
1015 power-domains = <&cpg_clocks>;
1019 #address-cells = <2>;
1023 /* External root clock */
1025 compatible = "fixed-clock";
1027 /* This value must be overriden by the board. */
1028 clock-frequency = <0>;
1031 /* External PCIe clock - can be overridden by the board */
1032 pcie_bus_clk: pcie_bus {
1033 compatible = "fixed-clock";
1035 clock-frequency = <0>;
1039 * The external audio clocks are configured as 0 Hz fixed frequency clocks by
1040 * default. Boards that provide audio clocks should override them.
1042 audio_clk_a: audio_clk_a {
1043 compatible = "fixed-clock";
1045 clock-frequency = <0>;
1047 audio_clk_b: audio_clk_b {
1048 compatible = "fixed-clock";
1050 clock-frequency = <0>;
1052 audio_clk_c: audio_clk_c {
1053 compatible = "fixed-clock";
1055 clock-frequency = <0>;
1058 /* External SCIF clock */
1060 compatible = "fixed-clock";
1062 /* This value must be overridden by the board. */
1063 clock-frequency = <0>;
1066 /* External USB clock - can be overridden by the board */
1067 usb_extal_clk: usb_extal {
1068 compatible = "fixed-clock";
1070 clock-frequency = <48000000>;
1073 /* External CAN clock */
1075 compatible = "fixed-clock";
1077 /* This value must be overridden by the board. */
1078 clock-frequency = <0>;
1081 /* Special CPG clocks */
1082 cpg_clocks: cpg_clocks@e6150000 {
1083 compatible = "renesas,r8a7790-cpg-clocks",
1084 "renesas,rcar-gen2-cpg-clocks";
1085 reg = <0 0xe6150000 0 0x1000>;
1086 clocks = <&extal_clk &usb_extal_clk>;
1088 clock-output-names = "main", "pll0", "pll1", "pll3",
1089 "lb", "qspi", "sdh", "sd0", "sd1",
1090 "z", "rcan", "adsp";
1091 #power-domain-cells = <0>;
1094 /* Variable factor clocks */
1095 sd2_clk: sd2@e6150078 {
1096 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1097 reg = <0 0xe6150078 0 4>;
1098 clocks = <&pll1_div2_clk>;
1101 sd3_clk: sd3@e615026c {
1102 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1103 reg = <0 0xe615026c 0 4>;
1104 clocks = <&pll1_div2_clk>;
1107 mmc0_clk: mmc0@e6150240 {
1108 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1109 reg = <0 0xe6150240 0 4>;
1110 clocks = <&pll1_div2_clk>;
1113 mmc1_clk: mmc1@e6150244 {
1114 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1115 reg = <0 0xe6150244 0 4>;
1116 clocks = <&pll1_div2_clk>;
1119 ssp_clk: ssp@e6150248 {
1120 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1121 reg = <0 0xe6150248 0 4>;
1122 clocks = <&pll1_div2_clk>;
1125 ssprs_clk: ssprs@e615024c {
1126 compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
1127 reg = <0 0xe615024c 0 4>;
1128 clocks = <&pll1_div2_clk>;
1132 /* Fixed factor clocks */
1133 pll1_div2_clk: pll1_div2 {
1134 compatible = "fixed-factor-clock";
1135 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1141 compatible = "fixed-factor-clock";
1142 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1148 compatible = "fixed-factor-clock";
1149 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1155 compatible = "fixed-factor-clock";
1156 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1162 compatible = "fixed-factor-clock";
1163 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1169 compatible = "fixed-factor-clock";
1170 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1176 compatible = "fixed-factor-clock";
1177 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1183 compatible = "fixed-factor-clock";
1184 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1190 compatible = "fixed-factor-clock";
1191 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1197 compatible = "fixed-factor-clock";
1198 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1204 compatible = "fixed-factor-clock";
1205 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1211 compatible = "fixed-factor-clock";
1212 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1218 compatible = "fixed-factor-clock";
1219 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1221 clock-div = <(48 * 1024)>;
1224 oscclk_clk: oscclk {
1225 compatible = "fixed-factor-clock";
1226 clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
1228 clock-div = <(12 * 1024)>;
1232 compatible = "fixed-factor-clock";
1233 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1239 compatible = "fixed-factor-clock";
1240 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1246 compatible = "fixed-factor-clock";
1247 clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
1253 compatible = "fixed-factor-clock";
1254 clocks = <&pll1_div2_clk>;
1260 compatible = "fixed-factor-clock";
1261 clocks = <&extal_clk>;
1268 mstp0_clks: mstp0_clks@e6150130 {
1269 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1270 reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
1273 clock-indices = <R8A7790_CLK_MSIOF0>;
1274 clock-output-names = "msiof0";
1276 mstp1_clks: mstp1_clks@e6150134 {
1277 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1278 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
1279 clocks = <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&m2_clk>,
1280 <&zs_clk>, <&p_clk>, <&zg_clk>, <&zs_clk>, <&zs_clk>,
1281 <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
1282 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
1285 R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1
1286 R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1
1287 R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC
1288 R8A7790_CLK_FDP1_2 R8A7790_CLK_FDP1_1 R8A7790_CLK_FDP1_0
1289 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 R8A7790_CLK_CMT0
1290 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 R8A7790_CLK_VSP1_DU0
1291 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
1293 clock-output-names =
1294 "vcp1", "vcp0", "vpc1", "vpc0", "jpu", "ssp1",
1295 "tmu1", "3dg", "2ddmac", "fdp1-2", "fdp1-1",
1296 "fdp1-0", "tmu3", "tmu2", "cmt0", "tmu0",
1297 "vsp1-du1", "vsp1-du0", "vsp1-rt", "vsp1-sy";
1299 mstp2_clks: mstp2_clks@e6150138 {
1300 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1301 reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
1302 clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
1303 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>,
1307 R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
1308 R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
1309 R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
1310 R8A7790_CLK_SYS_DMAC1 R8A7790_CLK_SYS_DMAC0
1312 clock-output-names =
1313 "scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
1314 "scifb1", "msiof1", "msiof3", "scifb2",
1315 "sys-dmac1", "sys-dmac0";
1317 mstp3_clks: mstp3_clks@e615013c {
1318 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1319 reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
1320 clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&p_clk>, <&sd3_clk>,
1321 <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
1322 <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
1323 <&hp_clk>, <&hp_clk>;
1326 R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SCIF2 R8A7790_CLK_SDHI3
1327 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
1328 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
1329 R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
1331 clock-output-names =
1332 "iic2", "tpu0", "mmcif1", "scif2", "sdhi3",
1333 "sdhi2", "sdhi1", "sdhi0", "mmcif0",
1334 "iic0", "pciec", "iic1", "ssusb", "cmt1",
1335 "usbdmac0", "usbdmac1";
1337 mstp4_clks: mstp4_clks@e6150140 {
1338 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1339 reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
1342 clock-indices = <R8A7790_CLK_IRQC>;
1343 clock-output-names = "irqc";
1345 mstp5_clks: mstp5_clks@e6150144 {
1346 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1347 reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
1348 clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,
1349 <&extal_clk>, <&p_clk>;
1352 R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
1353 R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL
1356 clock-output-names = "audmac0", "audmac1", "adsp_mod",
1359 mstp7_clks: mstp7_clks@e615014c {
1360 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1361 reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
1362 clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
1363 <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
1367 R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
1368 R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
1369 R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
1370 R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
1372 clock-output-names =
1373 "ehci", "hsusb", "hscif1", "hscif0", "scif1",
1374 "scif0", "du2", "du1", "du0", "lvds1", "lvds0";
1376 mstp8_clks: mstp8_clks@e6150990 {
1377 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1378 reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
1379 clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
1380 <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
1384 R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
1385 R8A7790_CLK_VIN1 R8A7790_CLK_VIN0
1386 R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER
1387 R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
1389 clock-output-names =
1390 "mlb", "vin3", "vin2", "vin1", "vin0",
1391 "etheravb", "ether", "sata1", "sata0";
1393 mstp9_clks: mstp9_clks@e6150994 {
1394 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1395 reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
1396 clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
1397 <&cp_clk>, <&cp_clk>, <&cp_clk>,
1398 <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
1399 <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
1402 R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
1403 R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
1404 R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
1405 R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
1407 clock-output-names =
1408 "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
1409 "rcan1", "rcan0", "qspi_mod", "iic3",
1410 "i2c3", "i2c2", "i2c1", "i2c0";
1412 mstp10_clks: mstp10_clks@e6150998 {
1413 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
1414 reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
1416 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1417 <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
1419 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1420 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1421 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1422 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1423 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1424 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
1425 <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
1430 R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
1431 R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
1433 R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
1434 R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
1435 R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
1436 R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
1438 clock-output-names =
1440 "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
1441 "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
1443 "scu-dvc1", "scu-dvc0",
1444 "scu-ctu1-mix1", "scu-ctu0-mix0",
1445 "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
1446 "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
1450 qspi: spi@e6b10000 {
1451 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1452 reg = <0 0xe6b10000 0 0x2c>;
1453 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1454 clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
1455 dmas = <&dmac0 0x17>, <&dmac0 0x18>;
1456 dma-names = "tx", "rx";
1457 power-domains = <&cpg_clocks>;
1459 #address-cells = <1>;
1461 status = "disabled";
1464 msiof0: spi@e6e20000 {
1465 compatible = "renesas,msiof-r8a7790";
1466 reg = <0 0xe6e20000 0 0x0064>;
1467 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1468 clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
1469 dmas = <&dmac0 0x51>, <&dmac0 0x52>;
1470 dma-names = "tx", "rx";
1471 power-domains = <&cpg_clocks>;
1472 #address-cells = <1>;
1474 status = "disabled";
1477 msiof1: spi@e6e10000 {
1478 compatible = "renesas,msiof-r8a7790";
1479 reg = <0 0xe6e10000 0 0x0064>;
1480 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1481 clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
1482 dmas = <&dmac0 0x55>, <&dmac0 0x56>;
1483 dma-names = "tx", "rx";
1484 power-domains = <&cpg_clocks>;
1485 #address-cells = <1>;
1487 status = "disabled";
1490 msiof2: spi@e6e00000 {
1491 compatible = "renesas,msiof-r8a7790";
1492 reg = <0 0xe6e00000 0 0x0064>;
1493 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1494 clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
1495 dmas = <&dmac0 0x41>, <&dmac0 0x42>;
1496 dma-names = "tx", "rx";
1497 power-domains = <&cpg_clocks>;
1498 #address-cells = <1>;
1500 status = "disabled";
1503 msiof3: spi@e6c90000 {
1504 compatible = "renesas,msiof-r8a7790";
1505 reg = <0 0xe6c90000 0 0x0064>;
1506 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1507 clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
1508 dmas = <&dmac0 0x45>, <&dmac0 0x46>;
1509 dma-names = "tx", "rx";
1510 power-domains = <&cpg_clocks>;
1511 #address-cells = <1>;
1513 status = "disabled";
1516 xhci: usb@ee000000 {
1517 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1518 reg = <0 0xee000000 0 0xc00>;
1519 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1520 clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
1521 power-domains = <&cpg_clocks>;
1524 status = "disabled";
1527 pci0: pci@ee090000 {
1528 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1529 device_type = "pci";
1530 reg = <0 0xee090000 0 0xc00>,
1531 <0 0xee080000 0 0x1100>;
1532 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1533 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1534 power-domains = <&cpg_clocks>;
1535 status = "disabled";
1538 #address-cells = <3>;
1540 #interrupt-cells = <1>;
1541 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1542 interrupt-map-mask = <0xff00 0 0 0x7>;
1543 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1544 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1545 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1548 reg = <0x800 0 0 0 0>;
1549 device_type = "pci";
1555 reg = <0x1000 0 0 0 0>;
1556 device_type = "pci";
1562 pci1: pci@ee0b0000 {
1563 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1564 device_type = "pci";
1565 reg = <0 0xee0b0000 0 0xc00>,
1566 <0 0xee0a0000 0 0x1100>;
1567 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1568 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1569 power-domains = <&cpg_clocks>;
1570 status = "disabled";
1573 #address-cells = <3>;
1575 #interrupt-cells = <1>;
1576 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1577 interrupt-map-mask = <0xff00 0 0 0x7>;
1578 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1579 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1580 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1583 pci2: pci@ee0d0000 {
1584 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1585 device_type = "pci";
1586 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
1587 power-domains = <&cpg_clocks>;
1588 reg = <0 0xee0d0000 0 0xc00>,
1589 <0 0xee0c0000 0 0x1100>;
1590 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1591 status = "disabled";
1594 #address-cells = <3>;
1596 #interrupt-cells = <1>;
1597 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1598 interrupt-map-mask = <0xff00 0 0 0x7>;
1599 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1600 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1601 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1604 reg = <0x800 0 0 0 0>;
1605 device_type = "pci";
1611 reg = <0x1000 0 0 0 0>;
1612 device_type = "pci";
1618 pciec: pcie@fe000000 {
1619 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1620 reg = <0 0xfe000000 0 0x80000>;
1621 #address-cells = <3>;
1623 bus-range = <0x00 0xff>;
1624 device_type = "pci";
1625 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1626 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1627 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1628 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1629 /* Map all possible DDR as inbound ranges */
1630 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1631 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1632 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1633 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1634 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1635 #interrupt-cells = <1>;
1636 interrupt-map-mask = <0 0 0 0>;
1637 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1638 clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
1639 clock-names = "pcie", "pcie_bus";
1640 power-domains = <&cpg_clocks>;
1641 status = "disabled";
1644 rcar_sound: sound@ec500000 {
1646 * #sound-dai-cells is required
1648 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1649 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1651 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1652 reg = <0 0xec500000 0 0x1000>, /* SCU */
1653 <0 0xec5a0000 0 0x100>, /* ADG */
1654 <0 0xec540000 0 0x1000>, /* SSIU */
1655 <0 0xec541000 0 0x280>, /* SSI */
1656 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1657 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1659 clocks = <&mstp10_clks R8A7790_CLK_SSI_ALL>,
1660 <&mstp10_clks R8A7790_CLK_SSI9>, <&mstp10_clks R8A7790_CLK_SSI8>,
1661 <&mstp10_clks R8A7790_CLK_SSI7>, <&mstp10_clks R8A7790_CLK_SSI6>,
1662 <&mstp10_clks R8A7790_CLK_SSI5>, <&mstp10_clks R8A7790_CLK_SSI4>,
1663 <&mstp10_clks R8A7790_CLK_SSI3>, <&mstp10_clks R8A7790_CLK_SSI2>,
1664 <&mstp10_clks R8A7790_CLK_SSI1>, <&mstp10_clks R8A7790_CLK_SSI0>,
1665 <&mstp10_clks R8A7790_CLK_SCU_SRC9>, <&mstp10_clks R8A7790_CLK_SCU_SRC8>,
1666 <&mstp10_clks R8A7790_CLK_SCU_SRC7>, <&mstp10_clks R8A7790_CLK_SCU_SRC6>,
1667 <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
1668 <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
1669 <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
1670 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1671 <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
1672 <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
1673 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
1674 clock-names = "ssi-all",
1675 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1676 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1677 "src.9", "src.8", "src.7", "src.6", "src.5",
1678 "src.4", "src.3", "src.2", "src.1", "src.0",
1682 "clk_a", "clk_b", "clk_c", "clk_i";
1683 power-domains = <&cpg_clocks>;
1685 status = "disabled";
1689 dmas = <&audma0 0xbc>;
1693 dmas = <&audma0 0xbe>;
1716 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1717 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1718 dma-names = "rx", "tx";
1721 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1722 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1723 dma-names = "rx", "tx";
1726 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1727 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1728 dma-names = "rx", "tx";
1731 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1732 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1733 dma-names = "rx", "tx";
1736 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1737 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1738 dma-names = "rx", "tx";
1741 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1742 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1743 dma-names = "rx", "tx";
1746 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1747 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1748 dma-names = "rx", "tx";
1751 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1752 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1753 dma-names = "rx", "tx";
1756 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1757 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1758 dma-names = "rx", "tx";
1761 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1762 dmas = <&audma0 0x97>, <&audma1 0xba>;
1763 dma-names = "rx", "tx";
1769 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1770 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1771 dma-names = "rx", "tx", "rxu", "txu";
1774 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1775 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1776 dma-names = "rx", "tx", "rxu", "txu";
1779 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1780 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1781 dma-names = "rx", "tx", "rxu", "txu";
1784 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1785 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1786 dma-names = "rx", "tx", "rxu", "txu";
1789 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1790 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1791 dma-names = "rx", "tx", "rxu", "txu";
1794 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1795 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1796 dma-names = "rx", "tx", "rxu", "txu";
1799 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1800 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1801 dma-names = "rx", "tx", "rxu", "txu";
1804 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1805 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1806 dma-names = "rx", "tx", "rxu", "txu";
1809 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1810 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1811 dma-names = "rx", "tx", "rxu", "txu";
1814 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1815 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1816 dma-names = "rx", "tx", "rxu", "txu";
1821 ipmmu_sy0: mmu@e6280000 {
1822 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1823 reg = <0 0xe6280000 0 0x1000>;
1824 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1825 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1827 status = "disabled";
1830 ipmmu_sy1: mmu@e6290000 {
1831 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1832 reg = <0 0xe6290000 0 0x1000>;
1833 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1835 status = "disabled";
1838 ipmmu_ds: mmu@e6740000 {
1839 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1840 reg = <0 0xe6740000 0 0x1000>;
1841 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1842 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1844 status = "disabled";
1847 ipmmu_mp: mmu@ec680000 {
1848 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1849 reg = <0 0xec680000 0 0x1000>;
1850 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1852 status = "disabled";
1855 ipmmu_mx: mmu@fe951000 {
1856 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1857 reg = <0 0xfe951000 0 0x1000>;
1858 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1859 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1861 status = "disabled";
1864 ipmmu_rt: mmu@ffc80000 {
1865 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1866 reg = <0 0xffc80000 0 0x1000>;
1867 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1869 status = "disabled";