ARM: shmobile: porter: enable SATA0
[deliverable/linux.git] / arch / arm / boot / dts / r8a7791-porter.dts
1 /*
2 * Device Tree Source for the Porter board
3 *
4 * Copyright (C) 2015 Cogent Embedded, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 /dts-v1/;
12 #include "r8a7791.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14
15 / {
16 model = "Porter";
17 compatible = "renesas,porter", "renesas,r8a7791";
18
19 aliases {
20 serial0 = &scif0;
21 };
22
23 chosen {
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
25 stdout-path = &scif0;
26 };
27
28 memory@40000000 {
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x40000000>;
31 };
32
33 memory@200000000 {
34 device_type = "memory";
35 reg = <2 0x00000000 0 0x40000000>;
36 };
37
38 vcc_sdhi0: regulator@0 {
39 compatible = "regulator-fixed";
40
41 regulator-name = "SDHI0 Vcc";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-always-on;
45 };
46
47 vccq_sdhi0: regulator@1 {
48 compatible = "regulator-gpio";
49
50 regulator-name = "SDHI0 VccQ";
51 regulator-min-microvolt = <1800000>;
52 regulator-max-microvolt = <3300000>;
53
54 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
55 gpios-states = <1>;
56 states = <3300000 1
57 1800000 0>;
58 };
59
60 vcc_sdhi2: regulator@2 {
61 compatible = "regulator-fixed";
62
63 regulator-name = "SDHI2 Vcc";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-always-on;
67 };
68
69 vccq_sdhi2: regulator@3 {
70 compatible = "regulator-gpio";
71
72 regulator-name = "SDHI2 VccQ";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <3300000>;
75
76 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
77 gpios-states = <1>;
78 states = <3300000 1
79 1800000 0>;
80 };
81 };
82
83 &extal_clk {
84 clock-frequency = <20000000>;
85 };
86
87 &pfc {
88 scif0_pins: serial0 {
89 renesas,groups = "scif0_data_d";
90 renesas,function = "scif0";
91 };
92
93 ether_pins: ether {
94 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
95 renesas,function = "eth";
96 };
97
98 phy1_pins: phy1 {
99 renesas,groups = "intc_irq0";
100 renesas,function = "intc";
101 };
102
103 sdhi0_pins: sd0 {
104 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
105 renesas,function = "sdhi0";
106 };
107
108 sdhi2_pins: sd2 {
109 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
110 renesas,function = "sdhi2";
111 };
112 };
113
114 &scif0 {
115 pinctrl-0 = <&scif0_pins>;
116 pinctrl-names = "default";
117
118 status = "okay";
119 };
120
121 &ether {
122 pinctrl-0 = <&ether_pins &phy1_pins>;
123 pinctrl-names = "default";
124
125 phy-handle = <&phy1>;
126 renesas,ether-link-active-low;
127 status = "ok";
128
129 phy1: ethernet-phy@1 {
130 reg = <1>;
131 interrupt-parent = <&irqc0>;
132 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
133 micrel,led-mode = <1>;
134 };
135 };
136
137 &sdhi0 {
138 pinctrl-0 = <&sdhi0_pins>;
139 pinctrl-names = "default";
140
141 vmmc-supply = <&vcc_sdhi0>;
142 vqmmc-supply = <&vccq_sdhi0>;
143 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
144 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
145 status = "okay";
146 };
147
148 &sdhi2 {
149 pinctrl-0 = <&sdhi2_pins>;
150 pinctrl-names = "default";
151
152 vmmc-supply = <&vcc_sdhi2>;
153 vqmmc-supply = <&vccq_sdhi2>;
154 cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
155 status = "okay";
156 };
157
158 &sata0 {
159 status = "okay";
160 };
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