arch/arm/boot/dts/r8a7794-silk.dts

   1 /*
   2  * Device Tree Source for the SILK board
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  * Copyright (C) 2014-2015 Renesas Solutions Corp.
   6  * Copyright (C) 2014-2015 Cogent Embedded, Inc.
   7  *
   8  * This file is licensed under the terms of the GNU General Public License
   9  * version 2.  This program is licensed "as is" without any warranty of any
  10  * kind, whether express or implied.
  11  */
  12
  13 /dts-v1/;
  14 #include "r8a7794.dtsi"
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         model = "SILK";
  19         compatible = "renesas,silk", "renesas,r8a7794";
  20
  21         aliases {
  22                 serial0 = &scif2;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@40000000 {
  31                 device_type = "memory";
  32                 reg = <0 0x40000000 0 0x40000000>;
  33         };
  34
  35         d3_3v: regulator-d3-3v {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "D3.3V";
  38                 regulator-min-microvolt = <3300000>;
  39                 regulator-max-microvolt = <3300000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         vcc_sdhi1: regulator-vcc-sdhi1 {
  45                 compatible = "regulator-fixed";
  46
  47                 regulator-name = "SDHI1 Vcc";
  48                 regulator-min-microvolt = <3300000>;
  49                 regulator-max-microvolt = <3300000>;
  50
  51                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  52                 enable-active-high;
  53         };
  54
  55         vccq_sdhi1: regulator-vccq-sdhi1 {
  56                 compatible = "regulator-gpio";
  57
  58                 regulator-name = "SDHI1 VccQ";
  59                 regulator-min-microvolt = <1800000>;
  60                 regulator-max-microvolt = <3300000>;
  61
  62                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  63                 gpios-states = <1>;
  64                 states = <3300000 1
  65                           1800000 0>;
  66         };
  67
  68         vga-encoder {
  69                 compatible = "adi,adv7123";
  70
  71                 ports {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74
  75                         port@0 {
  76                                 reg = <0>;
  77                                 adv7123_in: endpoint {
  78                                         remote-endpoint = <&du_out_rgb1>;
  79                                 };
  80                         };
  81                         port@1 {
  82                                 reg = <1>;
  83                                 adv7123_out: endpoint {
  84                                         remote-endpoint = <&vga_in>;
  85                                 };
  86                         };
  87                 };
  88         };
  89
  90         hdmi-out {
  91                 compatible = "hdmi-connector";
  92                 type = "a";
  93
  94                 port {
  95                         hdmi_con: endpoint {
  96                                 remote-endpoint = <&adv7511_out>;
  97                         };
  98                 };
  99         };
 100
 101         vga {
 102                 compatible = "vga-connector";
 103
 104                 port {
 105                         vga_in: endpoint {
 106                                 remote-endpoint = <&adv7123_out>;
 107                         };
 108                 };
 109         };
 110
 111         x2_clk: x2-clock {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <148500000>;
 115         };
 116
 117         x3_clk: x3-clock {
 118                 compatible = "fixed-clock";
 119                 #clock-cells = <0>;
 120                 clock-frequency = <74250000>;
 121         };
 122 };
 123
 124 &extal_clk {
 125         clock-frequency = <20000000>;
 126 };
 127
 128 &pfc {
 129         pinctrl-0 = <&scif_clk_pins>;
 130         pinctrl-names = "default";
 131
 132         scif2_pins: scif2 {
 133                 groups = "scif2_data";
 134                 function = "scif2";
 135         };
 136
 137         scif_clk_pins: scif_clk {
 138                 groups = "scif_clk";
 139                 function = "scif_clk";
 140         };
 141
 142         ether_pins: ether {
 143                 groups = "eth_link", "eth_mdio", "eth_rmii";
 144                 function = "eth";
 145         };
 146
 147         phy1_pins: phy1 {
 148                 groups = "intc_irq8";
 149                 function = "intc";
 150         };
 151
 152         i2c1_pins: i2c1 {
 153                 groups = "i2c1";
 154                 function = "i2c1";
 155         };
 156
 157         mmcif0_pins: mmcif0 {
 158                 groups = "mmc_data8", "mmc_ctrl";
 159                 function = "mmc";
 160         };
 161
 162         sdhi1_pins: sd1 {
 163                 groups = "sdhi1_data4", "sdhi1_ctrl";
 164                 function = "sdhi1";
 165         };
 166
 167         qspi_pins: qspi {
 168                 groups = "qspi_ctrl", "qspi_data4";
 169                 function = "qspi";
 170         };
 171
 172         vin0_pins: vin0 {
 173                 groups = "vin0_data8", "vin0_clk";
 174                 function = "vin0";
 175         };
 176
 177         usb0_pins: usb0 {
 178                 groups = "usb0";
 179                 function = "usb0";
 180         };
 181
 182         usb1_pins: usb1 {
 183                 groups = "usb1";
 184                 function = "usb1";
 185         };
 186
 187         du0_pins: du0 {
 188                 groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out";
 189                 function = "du0";
 190         };
 191
 192         du1_pins: du1 {
 193                 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
 194                 function = "du1";
 195         };
 196 };
 197
 198 &scif2 {
 199         pinctrl-0 = <&scif2_pins>;
 200         pinctrl-names = "default";
 201
 202         status = "okay";
 203 };
 204
 205 &scif_clk {
 206         clock-frequency = <14745600>;
 207         status = "okay";
 208 };
 209
 210 &ether {
 211         pinctrl-0 = <&ether_pins &phy1_pins>;
 212         pinctrl-names = "default";
 213
 214         phy-handle = <&phy1>;
 215         renesas,ether-link-active-low;
 216         status = "okay";
 217
 218         phy1: ethernet-phy@1 {
 219                 reg = <1>;
 220                 interrupt-parent = <&irqc0>;
 221                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 222                 micrel,led-mode = <1>;
 223         };
 224 };
 225
 226 &i2c1 {
 227         pinctrl-0 = <&i2c1_pins>;
 228         pinctrl-names = "default";
 229
 230         status = "okay";
 231         clock-frequency = <400000>;
 232
 233         composite-in@20 {
 234                 compatible = "adi,adv7180";
 235                 reg = <0x20>;
 236                 remote = <&vin0>;
 237
 238                 port {
 239                         adv7180: endpoint {
 240                                 bus-width = <8>;
 241                                 remote-endpoint = <&vin0ep>;
 242                         };
 243                 };
 244         };
 245
 246         hdmi@39 {
 247                 compatible = "adi,adv7511w";
 248                 reg = <0x39>;
 249                 interrupt-parent = <&gpio5>;
 250                 interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
 251
 252                 adi,input-depth = <8>;
 253                 adi,input-colorspace = "rgb";
 254                 adi,input-clock = "1x";
 255                 adi,input-style = <1>;
 256                 adi,input-justification = "evenly";
 257
 258                 ports {
 259                         #address-cells = <1>;
 260                         #size-cells = <0>;
 261
 262                         port@0 {
 263                                 reg = <0>;
 264                                 adv7511_in: endpoint {
 265                                         remote-endpoint = <&du_out_rgb0>;
 266                                 };
 267                         };
 268
 269                         port@1 {
 270                                 reg = <1>;
 271                                 adv7511_out: endpoint {
 272                                         remote-endpoint = <&hdmi_con>;
 273                                 };
 274                         };
 275                 };
 276         };
 277 };
 278
 279 &mmcif0 {
 280         pinctrl-0 = <&mmcif0_pins>;
 281         pinctrl-names = "default";
 282
 283         vmmc-supply = <&d3_3v>;
 284         vqmmc-supply = <&d3_3v>;
 285         bus-width = <8>;
 286         non-removable;
 287         status = "okay";
 288 };
 289
 290 &sdhi1 {
 291         pinctrl-0 = <&sdhi1_pins>;
 292         pinctrl-names = "default";
 293
 294         vmmc-supply = <&vcc_sdhi1>;
 295         vqmmc-supply = <&vccq_sdhi1>;
 296         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
 297         status = "okay";
 298 };
 299
 300 &qspi {
 301         pinctrl-0 = <&qspi_pins>;
 302         pinctrl-names = "default";
 303
 304         status = "okay";
 305
 306         flash@0 {
 307                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 308                 reg = <0>;
 309                 spi-max-frequency = <30000000>;
 310                 spi-tx-bus-width = <4>;
 311                 spi-rx-bus-width = <4>;
 312                 spi-cpol;
 313                 spi-cpha;
 314                 m25p,fast-read;
 315
 316                 partitions {
 317                         compatible = "fixed-partitions";
 318                         #address-cells = <1>;
 319                         #size-cells = <1>;
 320
 321                         partition@0 {
 322                                 label = "loader";
 323                                 reg = <0x00000000 0x00040000>;
 324                                 read-only;
 325                         };
 326                         partition@40000 {
 327                                 label = "user";
 328                                 reg = <0x00040000 0x00400000>;
 329                                 read-only;
 330                         };
 331                         partition@440000 {
 332                                 label = "flash";
 333                                 reg = <0x00440000 0x03bc0000>;
 334                         };
 335                 };
 336         };
 337 };
 338
 339 /* composite video input */
 340 &vin0 {
 341         status = "okay";
 342         pinctrl-0 = <&vin0_pins>;
 343         pinctrl-names = "default";
 344
 345         port {
 346                 #address-cells = <1>;
 347                 #size-cells = <0>;
 348
 349                 vin0ep: endpoint {
 350                         remote-endpoint = <&adv7180>;
 351                         bus-width = <8>;
 352                 };
 353         };
 354 };
 355
 356 &pci0 {
 357         status = "okay";
 358         pinctrl-0 = <&usb0_pins>;
 359         pinctrl-names = "default";
 360 };
 361
 362 &pci1 {
 363         status = "okay";
 364         pinctrl-0 = <&usb1_pins>;
 365         pinctrl-names = "default";
 366 };
 367
 368 &usbphy {
 369         status = "okay";
 370 };
 371
 372 &du {
 373         pinctrl-0 = <&du0_pins &du1_pins>;
 374         pinctrl-names = "default";
 375         status = "okay";
 376
 377         clocks = <&mstp7_clks R8A7794_CLK_DU0>,
 378                  <&mstp7_clks R8A7794_CLK_DU0>,
 379                  <&x2_clk>, <&x3_clk>;
 380         clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
 381
 382         ports {
 383                 port@0 {
 384                         endpoint {
 385                                 remote-endpoint = <&adv7511_in>;
 386                         };
 387                 };
 388                 port@1 {
 389                         endpoint {
 390                                 remote-endpoint = <&adv7123_in>;
 391                         };
 392                 };
 393         };
 394 };