2 * Copyright (c) 2013 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/rockchip.h>
18 #include "rk3xxx.dtsi"
19 #include "rk3188-clocks.dtsi"
22 compatible = "rockchip,rk3188";
27 enable-method = "rockchip,rk3066-smp";
31 compatible = "arm,cortex-a9";
32 next-level-cache = <&L2>;
37 compatible = "arm,cortex-a9";
38 next-level-cache = <&L2>;
43 compatible = "arm,cortex-a9";
44 next-level-cache = <&L2>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
56 global-timer@1013c200 {
57 interrupts = <GIC_PPI 11 0xf04>;
60 local-timer@1013c600 {
61 interrupts = <GIC_PPI 13 0xf04>;
65 compatible = "mmio-sram";
66 reg = <0x10080000 0x8000>;
69 ranges = <0 0x10080000 0x8000>;
72 compatible = "rockchip,rk3066-smp-sram";
78 compatible = "rockchip,rk3188-pinctrl";
79 rockchip,grf = <&grf>;
80 rockchip,pmu = <&pmu>;
86 gpio0: gpio0@0x2000a000 {
87 compatible = "rockchip,rk3188-gpio-bank0";
88 reg = <0x2000a000 0x100>;
89 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
90 clocks = <&clk_gates8 9>;
96 #interrupt-cells = <2>;
99 gpio1: gpio1@0x2003c000 {
100 compatible = "rockchip,gpio-bank";
101 reg = <0x2003c000 0x100>;
102 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&clk_gates8 10>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
112 gpio2: gpio2@2003e000 {
113 compatible = "rockchip,gpio-bank";
114 reg = <0x2003e000 0x100>;
115 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
116 clocks = <&clk_gates8 11>;
121 interrupt-controller;
122 #interrupt-cells = <2>;
125 gpio3: gpio3@20080000 {
126 compatible = "rockchip,gpio-bank";
127 reg = <0x20080000 0x100>;
128 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
129 clocks = <&clk_gates8 12>;
134 interrupt-controller;
135 #interrupt-cells = <2>;
138 pcfg_pull_up: pcfg_pull_up {
142 pcfg_pull_down: pcfg_pull_down {
146 pcfg_pull_none: pcfg_pull_none {
151 uart0_xfer: uart0-xfer {
152 rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
153 <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
156 uart0_cts: uart0-cts {
157 rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>;
160 uart0_rts: uart0-rts {
161 rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>;
166 uart1_xfer: uart1-xfer {
167 rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
168 <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
171 uart1_cts: uart1-cts {
172 rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>;
175 uart1_rts: uart1-rts {
176 rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>;
181 uart2_xfer: uart2-xfer {
182 rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
183 <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
185 /* no rts / cts for uart2 */
189 uart3_xfer: uart3-xfer {
190 rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
191 <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
194 uart3_cts: uart3-cts {
195 rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>;
198 uart3_rts: uart3-rts {
199 rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>;
205 rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>;
209 rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>;
213 rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>;
217 rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>;
221 rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
224 sd0_bus1: sd0-bus-width1 {
225 rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>;
228 sd0_bus4: sd0-bus-width4 {
229 rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
230 <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>,
231 <RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>,
232 <RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>;
238 rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>;
242 rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>;
246 rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>;
250 rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>;
253 sd1_bus1: sd1-bus-width1 {
254 rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>;
257 sd1_bus4: sd1-bus-width4 {
258 rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>,
259 <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>,
260 <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>,
261 <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>;