2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
48 compatible = "arm,cortex-a5";
54 compatible = "arm,cortex-a5-pmu";
55 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
59 reg = <0x20000000 0x8000000>;
63 slow_xtal: slow_xtal {
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
69 main_xtal: main_xtal {
70 compatible = "fixed-clock";
72 clock-frequency = <0>;
75 adc_op_clk: adc_op_clk{
76 compatible = "fixed-clock";
78 clock-frequency = <1000000>;
83 compatible = "mmio-sram";
84 reg = <0x00300000 0x20000>;
88 compatible = "simple-bus";
94 compatible = "simple-bus";
100 compatible = "atmel,hsmci";
101 reg = <0xf0000000 0x600>;
102 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
103 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
108 #address-cells = <1>;
110 clocks = <&mci0_clk>;
111 clock-names = "mci_clk";
115 #address-cells = <1>;
117 compatible = "atmel,at91rm9200-spi";
118 reg = <0xf0004000 0x100>;
119 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
120 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
121 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
122 dma-names = "tx", "rx";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_spi0>;
125 clocks = <&spi0_clk>;
126 clock-names = "spi_clk";
131 compatible = "atmel,at91sam9g45-ssc";
132 reg = <0xf0008000 0x4000>;
133 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
134 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
135 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
136 dma-names = "tx", "rx";
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
139 clocks = <&ssc0_clk>;
140 clock-names = "pclk";
144 tcb0: timer@f0010000 {
145 compatible = "atmel,at91sam9x5-tcb";
146 reg = <0xf0010000 0x100>;
147 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
148 clocks = <&tcb0_clk>, <&clk32k>;
149 clock-names = "t0_clk", "slow_clk";
153 compatible = "atmel,at91sam9x5-i2c";
154 reg = <0xf0014000 0x4000>;
155 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
156 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
157 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
158 dma-names = "tx", "rx";
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_i2c0>;
161 #address-cells = <1>;
163 clocks = <&twi0_clk>;
168 compatible = "atmel,at91sam9x5-i2c";
169 reg = <0xf0018000 0x4000>;
170 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
171 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
172 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
173 dma-names = "tx", "rx";
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_i2c1>;
176 #address-cells = <1>;
178 clocks = <&twi1_clk>;
182 usart0: serial@f001c000 {
183 compatible = "atmel,at91sam9260-usart";
184 reg = <0xf001c000 0x100>;
185 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
186 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
187 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
188 dma-names = "tx", "rx";
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_usart0>;
191 clocks = <&usart0_clk>;
192 clock-names = "usart";
196 usart1: serial@f0020000 {
197 compatible = "atmel,at91sam9260-usart";
198 reg = <0xf0020000 0x100>;
199 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
200 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
201 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
202 dma-names = "tx", "rx";
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_usart1>;
205 clocks = <&usart1_clk>;
206 clock-names = "usart";
210 uart0: serial@f0024000 {
211 compatible = "atmel,at91sam9260-usart";
212 reg = <0xf0024000 0x100>;
213 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_uart0>;
216 clocks = <&uart0_clk>;
217 clock-names = "usart";
222 compatible = "atmel,sama5d3-pwm";
223 reg = <0xf002c000 0x300>;
224 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
231 compatible = "atmel,at91sam9g45-isi";
232 reg = <0xf0034000 0x4000>;
233 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_isi_data_0_7>;
237 clock-names = "isi_clk";
240 #address-cells = <1>;
246 compatible = "atmel,sama5d3-sfr", "syscon";
247 reg = <0xf0038000 0x60>;
251 compatible = "atmel,hsmci";
252 reg = <0xf8000000 0x600>;
253 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
254 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
259 #address-cells = <1>;
261 clocks = <&mci1_clk>;
262 clock-names = "mci_clk";
266 #address-cells = <1>;
268 compatible = "atmel,at91rm9200-spi";
269 reg = <0xf8008000 0x100>;
270 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
271 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
272 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
273 dma-names = "tx", "rx";
274 pinctrl-names = "default";
275 pinctrl-0 = <&pinctrl_spi1>;
276 clocks = <&spi1_clk>;
277 clock-names = "spi_clk";
282 compatible = "atmel,at91sam9g45-ssc";
283 reg = <0xf800c000 0x4000>;
284 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
285 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
286 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
287 dma-names = "tx", "rx";
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
290 clocks = <&ssc1_clk>;
291 clock-names = "pclk";
296 #address-cells = <1>;
298 compatible = "atmel,at91sam9x5-adc";
299 reg = <0xf8018000 0x100>;
300 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
301 pinctrl-names = "default";
319 clock-names = "adc_clk", "adc_op_clk";
320 atmel,adc-channels-used = <0xfff>;
321 atmel,adc-startup-time = <40>;
322 atmel,adc-use-external-triggers;
323 atmel,adc-vref = <3000>;
324 atmel,adc-res = <10 12>;
325 atmel,adc-sample-hold-time = <11>;
326 atmel,adc-res-names = "lowres", "highres";
331 trigger-name = "external-rising";
332 trigger-value = <0x1>;
337 trigger-name = "external-falling";
338 trigger-value = <0x2>;
343 trigger-name = "external-any";
344 trigger-value = <0x3>;
349 trigger-name = "continuous";
350 trigger-value = <0x6>;
355 compatible = "atmel,at91sam9x5-i2c";
356 reg = <0xf801c000 0x4000>;
357 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
358 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
359 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
360 dma-names = "tx", "rx";
361 pinctrl-names = "default";
362 pinctrl-0 = <&pinctrl_i2c2>;
363 #address-cells = <1>;
365 clocks = <&twi2_clk>;
369 usart2: serial@f8020000 {
370 compatible = "atmel,at91sam9260-usart";
371 reg = <0xf8020000 0x100>;
372 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
373 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
374 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
375 dma-names = "tx", "rx";
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_usart2>;
378 clocks = <&usart2_clk>;
379 clock-names = "usart";
383 usart3: serial@f8024000 {
384 compatible = "atmel,at91sam9260-usart";
385 reg = <0xf8024000 0x100>;
386 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
387 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
388 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
389 dma-names = "tx", "rx";
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_usart3>;
392 clocks = <&usart3_clk>;
393 clock-names = "usart";
398 compatible = "atmel,at91sam9g46-sha";
399 reg = <0xf8034000 0x100>;
400 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
401 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
404 clock-names = "sha_clk";
408 compatible = "atmel,at91sam9g46-aes";
409 reg = <0xf8038000 0x100>;
410 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
411 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
412 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
413 dma-names = "tx", "rx";
415 clock-names = "aes_clk";
419 compatible = "atmel,at91sam9g46-tdes";
420 reg = <0xf803c000 0x100>;
421 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
422 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
423 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
424 dma-names = "tx", "rx";
425 clocks = <&tdes_clk>;
426 clock-names = "tdes_clk";
430 compatible = "atmel,at91sam9g45-trng";
431 reg = <0xf8040000 0x100>;
432 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
433 clocks = <&trng_clk>;
436 dma0: dma-controller@ffffe600 {
437 compatible = "atmel,at91sam9g45-dma";
438 reg = <0xffffe600 0x200>;
439 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
441 clocks = <&dma0_clk>;
442 clock-names = "dma_clk";
445 dma1: dma-controller@ffffe800 {
446 compatible = "atmel,at91sam9g45-dma";
447 reg = <0xffffe800 0x200>;
448 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
450 clocks = <&dma1_clk>;
451 clock-names = "dma_clk";
454 ramc0: ramc@ffffea00 {
455 compatible = "atmel,sama5d3-ddramc";
456 reg = <0xffffea00 0x200>;
457 clocks = <&ddrck>, <&mpddr_clk>;
458 clock-names = "ddrck", "mpddr";
461 dbgu: serial@ffffee00 {
462 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
463 reg = <0xffffee00 0x200>;
464 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
465 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
466 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
467 dma-names = "tx", "rx";
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_dbgu>;
470 clocks = <&dbgu_clk>;
471 clock-names = "usart";
475 aic: interrupt-controller@fffff000 {
476 #interrupt-cells = <3>;
477 compatible = "atmel,sama5d3-aic";
478 interrupt-controller;
479 reg = <0xfffff000 0x200>;
480 atmel,external-irqs = <47>;
484 #address-cells = <1>;
486 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
487 ranges = <0xfffff200 0xfffff200 0xa00>;
490 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
491 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
492 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
493 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
494 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
497 /* shared pinctrl settings */
499 pinctrl_adc0_adtrg: adc0_adtrg {
501 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
503 pinctrl_adc0_ad0: adc0_ad0 {
505 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
507 pinctrl_adc0_ad1: adc0_ad1 {
509 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
511 pinctrl_adc0_ad2: adc0_ad2 {
513 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
515 pinctrl_adc0_ad3: adc0_ad3 {
517 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
519 pinctrl_adc0_ad4: adc0_ad4 {
521 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
523 pinctrl_adc0_ad5: adc0_ad5 {
525 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
527 pinctrl_adc0_ad6: adc0_ad6 {
529 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
531 pinctrl_adc0_ad7: adc0_ad7 {
533 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
535 pinctrl_adc0_ad8: adc0_ad8 {
537 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
539 pinctrl_adc0_ad9: adc0_ad9 {
541 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
543 pinctrl_adc0_ad10: adc0_ad10 {
545 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
547 pinctrl_adc0_ad11: adc0_ad11 {
549 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
554 pinctrl_dbgu: dbgu-0 {
556 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
557 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
562 pinctrl_i2c0: i2c0-0 {
564 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
565 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
570 pinctrl_i2c1: i2c1-0 {
572 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
573 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
578 pinctrl_i2c2: i2c2-0 {
580 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
581 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
586 pinctrl_isi_data_0_7: isi-0-data-0-7 {
588 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
589 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
590 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
591 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
592 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
593 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
594 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
595 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
596 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
597 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
598 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
601 pinctrl_isi_data_8_9: isi-0-data-8-9 {
603 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
604 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
607 pinctrl_isi_data_10_11: isi-0-data-10-11 {
609 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
610 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
615 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
617 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
618 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
619 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
621 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
623 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
624 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
625 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
627 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
629 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
630 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
631 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
632 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
637 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
639 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
640 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
641 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
643 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
645 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
646 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
647 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
652 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
654 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
655 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
660 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
662 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
664 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
666 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
668 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
670 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
672 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
674 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
677 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
679 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
681 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
683 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
685 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
687 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
689 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
691 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
693 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
695 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
697 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
699 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
702 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
704 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
706 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
708 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
710 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
712 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
714 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
716 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
719 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
721 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
723 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
725 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
727 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
729 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
731 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
733 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
738 pinctrl_spi0: spi0-0 {
740 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
741 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
742 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
747 pinctrl_spi1: spi1-0 {
749 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
750 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
751 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
756 pinctrl_ssc0_tx: ssc0_tx {
758 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
759 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
760 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
763 pinctrl_ssc0_rx: ssc0_rx {
765 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
766 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
767 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
772 pinctrl_ssc1_tx: ssc1_tx {
774 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
775 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
776 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
779 pinctrl_ssc1_rx: ssc1_rx {
781 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
782 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
783 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
788 pinctrl_uart0: uart0-0 {
790 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* conflicts with PWMFI2, ISI_D8 */
791 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* conflicts with ISI_PCK */
796 pinctrl_uart1: uart1-0 {
798 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* conflicts with TWD0, ISI_VSYNC */
799 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* conflicts with TWCK0, ISI_HSYNC */
804 pinctrl_usart0: usart0-0 {
806 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
807 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
810 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
812 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
813 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
818 pinctrl_usart1: usart1-0 {
820 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
821 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
824 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
826 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
827 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
832 pinctrl_usart2: usart2-0 {
834 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
835 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
838 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
840 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
841 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
846 pinctrl_usart3: usart3-0 {
848 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
849 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
852 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
854 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
855 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
860 pioA: gpio@fffff200 {
861 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
862 reg = <0xfffff200 0x100>;
863 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
866 interrupt-controller;
867 #interrupt-cells = <2>;
868 clocks = <&pioA_clk>;
871 pioB: gpio@fffff400 {
872 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
873 reg = <0xfffff400 0x100>;
874 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
877 interrupt-controller;
878 #interrupt-cells = <2>;
879 clocks = <&pioB_clk>;
882 pioC: gpio@fffff600 {
883 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
884 reg = <0xfffff600 0x100>;
885 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
888 interrupt-controller;
889 #interrupt-cells = <2>;
890 clocks = <&pioC_clk>;
893 pioD: gpio@fffff800 {
894 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
895 reg = <0xfffff800 0x100>;
896 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
899 interrupt-controller;
900 #interrupt-cells = <2>;
901 clocks = <&pioD_clk>;
904 pioE: gpio@fffffa00 {
905 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
906 reg = <0xfffffa00 0x100>;
907 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
910 interrupt-controller;
911 #interrupt-cells = <2>;
912 clocks = <&pioE_clk>;
917 compatible = "atmel,sama5d3-pmc", "syscon";
918 reg = <0xfffffc00 0x120>;
919 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
920 interrupt-controller;
921 #address-cells = <1>;
923 #interrupt-cells = <1>;
925 main_rc_osc: main_rc_osc {
926 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
928 interrupt-parent = <&pmc>;
929 interrupts = <AT91_PMC_MOSCRCS>;
930 clock-frequency = <12000000>;
931 clock-accuracy = <50000000>;
935 compatible = "atmel,at91rm9200-clk-main-osc";
937 interrupt-parent = <&pmc>;
938 interrupts = <AT91_PMC_MOSCS>;
939 clocks = <&main_xtal>;
943 compatible = "atmel,at91sam9x5-clk-main";
945 interrupt-parent = <&pmc>;
946 interrupts = <AT91_PMC_MOSCSELS>;
947 clocks = <&main_rc_osc &main_osc>;
951 compatible = "atmel,sama5d3-clk-pll";
953 interrupt-parent = <&pmc>;
954 interrupts = <AT91_PMC_LOCKA>;
957 atmel,clk-input-range = <8000000 50000000>;
958 #atmel,pll-clk-output-range-cells = <4>;
959 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
963 compatible = "atmel,at91sam9x5-clk-plldiv";
969 compatible = "atmel,at91sam9x5-clk-utmi";
971 interrupt-parent = <&pmc>;
972 interrupts = <AT91_PMC_LOCKU>;
977 compatible = "atmel,at91sam9x5-clk-master";
979 interrupt-parent = <&pmc>;
980 interrupts = <AT91_PMC_MCKRDY>;
981 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
982 atmel,clk-output-range = <0 166000000>;
983 atmel,clk-divisors = <1 2 4 3>;
987 compatible = "atmel,at91sam9x5-clk-usb";
989 clocks = <&plladiv>, <&utmi>;
993 compatible = "atmel,at91sam9x5-clk-programmable";
994 #address-cells = <1>;
996 interrupt-parent = <&pmc>;
997 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
1002 interrupts = <AT91_PMC_PCKRDY(0)>;
1008 interrupts = <AT91_PMC_PCKRDY(1)>;
1014 interrupts = <AT91_PMC_PCKRDY(2)>;
1019 compatible = "atmel,at91sam9x5-clk-smd";
1021 clocks = <&plladiv>, <&utmi>;
1025 compatible = "atmel,at91rm9200-clk-system";
1026 #address-cells = <1>;
1073 compatible = "atmel,at91sam9x5-clk-peripheral";
1074 #address-cells = <1>;
1078 dbgu_clk: dbgu_clk {
1083 hsmc_clk: hsmc_clk {
1088 pioA_clk: pioA_clk {
1093 pioB_clk: pioB_clk {
1098 pioC_clk: pioC_clk {
1103 pioD_clk: pioD_clk {
1108 pioE_clk: pioE_clk {
1113 usart0_clk: usart0_clk {
1116 atmel,clk-output-range = <0 66000000>;
1119 usart1_clk: usart1_clk {
1122 atmel,clk-output-range = <0 66000000>;
1125 usart2_clk: usart2_clk {
1128 atmel,clk-output-range = <0 66000000>;
1131 usart3_clk: usart3_clk {
1134 atmel,clk-output-range = <0 66000000>;
1137 uart0_clk: uart0_clk {
1140 atmel,clk-output-range = <0 66000000>;
1143 twi0_clk: twi0_clk {
1146 atmel,clk-output-range = <0 16625000>;
1149 twi1_clk: twi1_clk {
1152 atmel,clk-output-range = <0 16625000>;
1155 twi2_clk: twi2_clk {
1158 atmel,clk-output-range = <0 16625000>;
1161 mci0_clk: mci0_clk {
1166 mci1_clk: mci1_clk {
1171 spi0_clk: spi0_clk {
1174 atmel,clk-output-range = <0 133000000>;
1177 spi1_clk: spi1_clk {
1180 atmel,clk-output-range = <0 133000000>;
1183 tcb0_clk: tcb0_clk {
1186 atmel,clk-output-range = <0 133000000>;
1197 atmel,clk-output-range = <0 66000000>;
1200 dma0_clk: dma0_clk {
1205 dma1_clk: dma1_clk {
1210 uhphs_clk: uhphs_clk {
1215 udphs_clk: udphs_clk {
1225 ssc0_clk: ssc0_clk {
1228 atmel,clk-output-range = <0 66000000>;
1231 ssc1_clk: ssc1_clk {
1234 atmel,clk-output-range = <0 66000000>;
1247 tdes_clk: tdes_clk {
1252 trng_clk: trng_clk {
1257 fuse_clk: fuse_clk {
1262 mpddr_clk: mpddr_clk {
1270 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
1271 reg = <0xfffffe00 0x10>;
1275 shutdown-controller@fffffe10 {
1276 compatible = "atmel,at91sam9x5-shdwc";
1277 reg = <0xfffffe10 0x10>;
1281 pit: timer@fffffe30 {
1282 compatible = "atmel,at91sam9260-pit";
1283 reg = <0xfffffe30 0xf>;
1284 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1289 compatible = "atmel,at91sam9260-wdt";
1290 reg = <0xfffffe40 0x10>;
1291 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1293 atmel,watchdog-type = "hardware";
1294 atmel,reset-type = "all";
1296 status = "disabled";
1300 compatible = "atmel,at91sam9x5-sckc";
1301 reg = <0xfffffe50 0x4>;
1303 slow_rc_osc: slow_rc_osc {
1304 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1306 clock-frequency = <32768>;
1307 clock-accuracy = <50000000>;
1308 atmel,startup-time-usec = <75>;
1311 slow_osc: slow_osc {
1312 compatible = "atmel,at91sam9x5-clk-slow-osc";
1314 clocks = <&slow_xtal>;
1315 atmel,startup-time-usec = <1200000>;
1319 compatible = "atmel,at91sam9x5-clk-slow";
1321 clocks = <&slow_rc_osc &slow_osc>;
1326 compatible = "atmel,at91rm9200-rtc";
1327 reg = <0xfffffeb0 0x30>;
1328 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1333 usb0: gadget@00500000 {
1334 #address-cells = <1>;
1336 compatible = "atmel,sama5d3-udc";
1337 reg = <0x00500000 0x100000
1339 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1340 clocks = <&udphs_clk>, <&utmi>;
1341 clock-names = "pclk", "hclk";
1342 status = "disabled";
1346 atmel,fifo-size = <64>;
1347 atmel,nb-banks = <1>;
1352 atmel,fifo-size = <1024>;
1353 atmel,nb-banks = <3>;
1360 atmel,fifo-size = <1024>;
1361 atmel,nb-banks = <3>;
1368 atmel,fifo-size = <1024>;
1369 atmel,nb-banks = <2>;
1375 atmel,fifo-size = <1024>;
1376 atmel,nb-banks = <2>;
1382 atmel,fifo-size = <1024>;
1383 atmel,nb-banks = <2>;
1389 atmel,fifo-size = <1024>;
1390 atmel,nb-banks = <2>;
1396 atmel,fifo-size = <1024>;
1397 atmel,nb-banks = <2>;
1403 atmel,fifo-size = <1024>;
1404 atmel,nb-banks = <2>;
1409 atmel,fifo-size = <1024>;
1410 atmel,nb-banks = <2>;
1415 atmel,fifo-size = <1024>;
1416 atmel,nb-banks = <2>;
1421 atmel,fifo-size = <1024>;
1422 atmel,nb-banks = <2>;
1427 atmel,fifo-size = <1024>;
1428 atmel,nb-banks = <2>;
1433 atmel,fifo-size = <1024>;
1434 atmel,nb-banks = <2>;
1439 atmel,fifo-size = <1024>;
1440 atmel,nb-banks = <2>;
1445 atmel,fifo-size = <1024>;
1446 atmel,nb-banks = <2>;
1450 usb1: ohci@00600000 {
1451 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1452 reg = <0x00600000 0x100000>;
1453 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1454 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1455 clock-names = "ohci_clk", "hclk", "uhpck";
1456 status = "disabled";
1459 usb2: ehci@00700000 {
1460 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1461 reg = <0x00700000 0x100000>;
1462 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1463 clocks = <&utmi>, <&uhphs_clk>;
1464 clock-names = "usb_clk", "ehci_clk";
1465 status = "disabled";
1468 nand0: nand@60000000 {
1469 compatible = "atmel,at91rm9200-nand";
1470 #address-cells = <1>;
1473 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1474 0xffffc070 0x00000490 /* SMC PMECC regs */
1475 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1476 0x00110000 0x00018000 /* ROM code */
1478 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1479 atmel,nand-addr-offset = <21>;
1480 atmel,nand-cmd-offset = <22>;
1482 pinctrl-names = "default";
1483 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1484 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1485 status = "disabled";
1488 compatible = "atmel,sama5d3-nfc";
1489 #address-cells = <1>;
1492 0x70000000 0x08000000 /* NFC Command Registers */
1493 0xffffc000 0x00000070 /* NFC HSMC regs */
1494 0x00200000 0x00100000 /* NFC SRAM banks */
1496 clocks = <&hsmc_clk>;