2 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
3 * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
5 * Copyright (C) 2013 Atmel,
6 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
19 model = "Atmel SAMA5D3 family SoC";
20 compatible = "atmel,sama5d3", "atmel,sama5";
21 interrupt-parent = <&aic>;
47 compatible = "arm,cortex-a5";
53 compatible = "arm,cortex-a5-pmu";
54 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
58 reg = <0x20000000 0x8000000>;
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
71 clock-frequency = <0>;
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
77 clock-frequency = <20000000>;
82 compatible = "mmio-sram";
83 reg = <0x00300000 0x20000>;
87 compatible = "simple-bus";
93 compatible = "simple-bus";
99 compatible = "atmel,hsmci";
100 reg = <0xf0000000 0x600>;
101 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
102 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
107 #address-cells = <1>;
109 clocks = <&mci0_clk>;
110 clock-names = "mci_clk";
114 #address-cells = <1>;
116 compatible = "atmel,at91rm9200-spi";
117 reg = <0xf0004000 0x100>;
118 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
119 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
120 <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
121 dma-names = "tx", "rx";
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_spi0>;
124 clocks = <&spi0_clk>;
125 clock-names = "spi_clk";
130 compatible = "atmel,at91sam9g45-ssc";
131 reg = <0xf0008000 0x4000>;
132 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
133 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>,
134 <&dma0 2 AT91_DMA_CFG_PER_ID(14)>;
135 dma-names = "tx", "rx";
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
138 clocks = <&ssc0_clk>;
139 clock-names = "pclk";
143 tcb0: timer@f0010000 {
144 compatible = "atmel,at91sam9x5-tcb";
145 reg = <0xf0010000 0x100>;
146 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
147 clocks = <&tcb0_clk>;
148 clock-names = "t0_clk";
152 compatible = "atmel,at91sam9x5-i2c";
153 reg = <0xf0014000 0x4000>;
154 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
155 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
156 <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
157 dma-names = "tx", "rx";
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_i2c0>;
160 #address-cells = <1>;
162 clocks = <&twi0_clk>;
167 compatible = "atmel,at91sam9x5-i2c";
168 reg = <0xf0018000 0x4000>;
169 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
170 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
171 <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
172 dma-names = "tx", "rx";
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_i2c1>;
175 #address-cells = <1>;
177 clocks = <&twi1_clk>;
181 usart0: serial@f001c000 {
182 compatible = "atmel,at91sam9260-usart";
183 reg = <0xf001c000 0x100>;
184 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
185 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
186 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
187 dma-names = "tx", "rx";
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_usart0>;
190 clocks = <&usart0_clk>;
191 clock-names = "usart";
195 usart1: serial@f0020000 {
196 compatible = "atmel,at91sam9260-usart";
197 reg = <0xf0020000 0x100>;
198 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
199 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
200 <&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
201 dma-names = "tx", "rx";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_usart1>;
204 clocks = <&usart1_clk>;
205 clock-names = "usart";
210 compatible = "atmel,sama5d3-pwm";
211 reg = <0xf002c000 0x300>;
212 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
219 compatible = "atmel,at91sam9g45-isi";
220 reg = <0xf0034000 0x4000>;
221 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_isi_data_0_7>;
225 clock-names = "isi_clk";
228 #address-cells = <1>;
234 compatible = "atmel,sama5d3-sfr", "syscon";
235 reg = <0xf0038000 0x60>;
239 compatible = "atmel,hsmci";
240 reg = <0xf8000000 0x600>;
241 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
242 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
247 #address-cells = <1>;
249 clocks = <&mci1_clk>;
250 clock-names = "mci_clk";
254 #address-cells = <1>;
256 compatible = "atmel,at91rm9200-spi";
257 reg = <0xf8008000 0x100>;
258 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
259 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
260 <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
261 dma-names = "tx", "rx";
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_spi1>;
264 clocks = <&spi1_clk>;
265 clock-names = "spi_clk";
270 compatible = "atmel,at91sam9g45-ssc";
271 reg = <0xf800c000 0x4000>;
272 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
273 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>,
274 <&dma1 2 AT91_DMA_CFG_PER_ID(4)>;
275 dma-names = "tx", "rx";
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
278 clocks = <&ssc1_clk>;
279 clock-names = "pclk";
284 #address-cells = <1>;
286 compatible = "atmel,at91sam9x5-adc";
287 reg = <0xf8018000 0x100>;
288 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
289 pinctrl-names = "default";
307 clock-names = "adc_clk", "adc_op_clk";
308 atmel,adc-channels-used = <0xfff>;
309 atmel,adc-startup-time = <40>;
310 atmel,adc-use-external-triggers;
311 atmel,adc-vref = <3000>;
312 atmel,adc-res = <10 12>;
313 atmel,adc-res-names = "lowres", "highres";
318 trigger-name = "external-rising";
319 trigger-value = <0x1>;
324 trigger-name = "external-falling";
325 trigger-value = <0x2>;
330 trigger-name = "external-any";
331 trigger-value = <0x3>;
336 trigger-name = "continuous";
337 trigger-value = <0x6>;
342 compatible = "atmel,at91sam9x5-i2c";
343 reg = <0xf801c000 0x4000>;
344 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
345 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
346 <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
347 dma-names = "tx", "rx";
348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_i2c2>;
350 #address-cells = <1>;
352 clocks = <&twi2_clk>;
356 usart2: serial@f8020000 {
357 compatible = "atmel,at91sam9260-usart";
358 reg = <0xf8020000 0x100>;
359 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
360 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
361 <&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
362 dma-names = "tx", "rx";
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_usart2>;
365 clocks = <&usart2_clk>;
366 clock-names = "usart";
370 usart3: serial@f8024000 {
371 compatible = "atmel,at91sam9260-usart";
372 reg = <0xf8024000 0x100>;
373 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
374 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
375 <&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
376 dma-names = "tx", "rx";
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_usart3>;
379 clocks = <&usart3_clk>;
380 clock-names = "usart";
385 compatible = "atmel,at91sam9g46-sha";
386 reg = <0xf8034000 0x100>;
387 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
388 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
391 clock-names = "sha_clk";
395 compatible = "atmel,at91sam9g46-aes";
396 reg = <0xf8038000 0x100>;
397 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
398 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
399 <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
400 dma-names = "tx", "rx";
402 clock-names = "aes_clk";
406 compatible = "atmel,at91sam9g46-tdes";
407 reg = <0xf803c000 0x100>;
408 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
409 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
410 <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
411 dma-names = "tx", "rx";
412 clocks = <&tdes_clk>;
413 clock-names = "tdes_clk";
416 dma0: dma-controller@ffffe600 {
417 compatible = "atmel,at91sam9g45-dma";
418 reg = <0xffffe600 0x200>;
419 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
421 clocks = <&dma0_clk>;
422 clock-names = "dma_clk";
425 dma1: dma-controller@ffffe800 {
426 compatible = "atmel,at91sam9g45-dma";
427 reg = <0xffffe800 0x200>;
428 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
430 clocks = <&dma1_clk>;
431 clock-names = "dma_clk";
434 ramc0: ramc@ffffea00 {
435 compatible = "atmel,sama5d3-ddramc";
436 reg = <0xffffea00 0x200>;
437 clocks = <&ddrck>, <&mpddr_clk>;
438 clock-names = "ddrck", "mpddr";
441 dbgu: serial@ffffee00 {
442 compatible = "atmel,at91sam9260-usart";
443 reg = <0xffffee00 0x200>;
444 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
445 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
446 <&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
447 dma-names = "tx", "rx";
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_dbgu>;
450 clocks = <&dbgu_clk>;
451 clock-names = "usart";
455 aic: interrupt-controller@fffff000 {
456 #interrupt-cells = <3>;
457 compatible = "atmel,sama5d3-aic";
458 interrupt-controller;
459 reg = <0xfffff000 0x200>;
460 atmel,external-irqs = <47>;
464 #address-cells = <1>;
466 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
467 ranges = <0xfffff200 0xfffff200 0xa00>;
470 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */
471 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */
472 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */
473 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */
474 0xffffffff 0xbf9f8000 0x18000000 /* pioE */
477 /* shared pinctrl settings */
479 pinctrl_adc0_adtrg: adc0_adtrg {
481 <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
483 pinctrl_adc0_ad0: adc0_ad0 {
485 <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
487 pinctrl_adc0_ad1: adc0_ad1 {
489 <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
491 pinctrl_adc0_ad2: adc0_ad2 {
493 <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
495 pinctrl_adc0_ad3: adc0_ad3 {
497 <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
499 pinctrl_adc0_ad4: adc0_ad4 {
501 <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
503 pinctrl_adc0_ad5: adc0_ad5 {
505 <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
507 pinctrl_adc0_ad6: adc0_ad6 {
509 <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
511 pinctrl_adc0_ad7: adc0_ad7 {
513 <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
515 pinctrl_adc0_ad8: adc0_ad8 {
517 <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
519 pinctrl_adc0_ad9: adc0_ad9 {
521 <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
523 pinctrl_adc0_ad10: adc0_ad10 {
525 <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
527 pinctrl_adc0_ad11: adc0_ad11 {
529 <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
534 pinctrl_dbgu: dbgu-0 {
536 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
537 AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
542 pinctrl_i2c0: i2c0-0 {
544 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
545 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
550 pinctrl_i2c1: i2c1-0 {
552 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
553 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
558 pinctrl_i2c2: i2c2-0 {
560 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
561 AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
566 pinctrl_isi_data_0_7: isi-0-data-0-7 {
568 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
569 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
570 AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
571 AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
572 AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
573 AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
574 AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
575 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
576 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
577 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
578 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
581 pinctrl_isi_data_8_9: isi-0-data-8-9 {
583 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
584 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
587 pinctrl_isi_data_10_11: isi-0-data-10-11 {
589 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
590 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
595 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
597 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
598 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
599 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
601 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
603 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
604 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
605 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
607 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
609 <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
610 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
611 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
612 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
617 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
619 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
620 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
621 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
623 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
625 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
626 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
627 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
632 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
634 <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
635 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
640 pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
642 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
644 pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
646 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
648 pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
650 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
652 pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
654 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
657 pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
659 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
661 pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
663 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
665 pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
667 <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
669 pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
671 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
673 pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
675 <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
677 pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
679 <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
682 pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
684 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
686 pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
688 <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
690 pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
692 <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
694 pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
696 <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
699 pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
701 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
703 pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
705 <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
707 pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
709 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
711 pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
713 <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
718 pinctrl_spi0: spi0-0 {
720 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
721 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
722 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
727 pinctrl_spi1: spi1-0 {
729 <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
730 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
731 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
736 pinctrl_ssc0_tx: ssc0_tx {
738 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
739 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
740 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
743 pinctrl_ssc0_rx: ssc0_rx {
745 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
746 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
747 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
752 pinctrl_ssc1_tx: ssc1_tx {
754 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
755 AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
756 AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
759 pinctrl_ssc1_rx: ssc1_rx {
761 <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
762 AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
763 AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
768 pinctrl_usart0: usart0-0 {
770 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
771 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
774 pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
776 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
777 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
782 pinctrl_usart1: usart1-0 {
784 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
785 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
788 pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
790 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
791 AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
796 pinctrl_usart2: usart2-0 {
798 <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
799 AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
802 pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
804 <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
805 AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
810 pinctrl_usart3: usart3-0 {
812 <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
813 AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
816 pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
818 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
819 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
824 pioA: gpio@fffff200 {
825 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
826 reg = <0xfffff200 0x100>;
827 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
830 interrupt-controller;
831 #interrupt-cells = <2>;
832 clocks = <&pioA_clk>;
835 pioB: gpio@fffff400 {
836 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
837 reg = <0xfffff400 0x100>;
838 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
841 interrupt-controller;
842 #interrupt-cells = <2>;
843 clocks = <&pioB_clk>;
846 pioC: gpio@fffff600 {
847 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
848 reg = <0xfffff600 0x100>;
849 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
852 interrupt-controller;
853 #interrupt-cells = <2>;
854 clocks = <&pioC_clk>;
857 pioD: gpio@fffff800 {
858 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
859 reg = <0xfffff800 0x100>;
860 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
863 interrupt-controller;
864 #interrupt-cells = <2>;
865 clocks = <&pioD_clk>;
868 pioE: gpio@fffffa00 {
869 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
870 reg = <0xfffffa00 0x100>;
871 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
874 interrupt-controller;
875 #interrupt-cells = <2>;
876 clocks = <&pioE_clk>;
881 compatible = "atmel,sama5d3-pmc";
882 reg = <0xfffffc00 0x120>;
883 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
884 interrupt-controller;
885 #address-cells = <1>;
887 #interrupt-cells = <1>;
889 main_rc_osc: main_rc_osc {
890 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
892 interrupt-parent = <&pmc>;
893 interrupts = <AT91_PMC_MOSCRCS>;
894 clock-frequency = <12000000>;
895 clock-accuracy = <50000000>;
899 compatible = "atmel,at91rm9200-clk-main-osc";
901 interrupt-parent = <&pmc>;
902 interrupts = <AT91_PMC_MOSCS>;
903 clocks = <&main_xtal>;
907 compatible = "atmel,at91sam9x5-clk-main";
909 interrupt-parent = <&pmc>;
910 interrupts = <AT91_PMC_MOSCSELS>;
911 clocks = <&main_rc_osc &main_osc>;
915 compatible = "atmel,sama5d3-clk-pll";
917 interrupt-parent = <&pmc>;
918 interrupts = <AT91_PMC_LOCKA>;
921 atmel,clk-input-range = <8000000 50000000>;
922 #atmel,pll-clk-output-range-cells = <4>;
923 atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
927 compatible = "atmel,at91sam9x5-clk-plldiv";
933 compatible = "atmel,at91sam9x5-clk-utmi";
935 interrupt-parent = <&pmc>;
936 interrupts = <AT91_PMC_LOCKU>;
941 compatible = "atmel,at91sam9x5-clk-master";
943 interrupt-parent = <&pmc>;
944 interrupts = <AT91_PMC_MCKRDY>;
945 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
946 atmel,clk-output-range = <0 166000000>;
947 atmel,clk-divisors = <1 2 4 3>;
951 compatible = "atmel,at91sam9x5-clk-usb";
953 clocks = <&plladiv>, <&utmi>;
957 compatible = "atmel,at91sam9x5-clk-programmable";
958 #address-cells = <1>;
960 interrupt-parent = <&pmc>;
961 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
966 interrupts = <AT91_PMC_PCKRDY(0)>;
972 interrupts = <AT91_PMC_PCKRDY(1)>;
978 interrupts = <AT91_PMC_PCKRDY(2)>;
983 compatible = "atmel,at91sam9x5-clk-smd";
985 clocks = <&plladiv>, <&utmi>;
989 compatible = "atmel,at91rm9200-clk-system";
990 #address-cells = <1>;
1037 compatible = "atmel,at91sam9x5-clk-peripheral";
1038 #address-cells = <1>;
1042 dbgu_clk: dbgu_clk {
1047 hsmc_clk: hsmc_clk {
1052 pioA_clk: pioA_clk {
1057 pioB_clk: pioB_clk {
1062 pioC_clk: pioC_clk {
1067 pioD_clk: pioD_clk {
1072 pioE_clk: pioE_clk {
1077 usart0_clk: usart0_clk {
1080 atmel,clk-output-range = <0 66000000>;
1083 usart1_clk: usart1_clk {
1086 atmel,clk-output-range = <0 66000000>;
1089 usart2_clk: usart2_clk {
1092 atmel,clk-output-range = <0 66000000>;
1095 usart3_clk: usart3_clk {
1098 atmel,clk-output-range = <0 66000000>;
1101 twi0_clk: twi0_clk {
1104 atmel,clk-output-range = <0 16625000>;
1107 twi1_clk: twi1_clk {
1110 atmel,clk-output-range = <0 16625000>;
1113 twi2_clk: twi2_clk {
1116 atmel,clk-output-range = <0 16625000>;
1119 mci0_clk: mci0_clk {
1124 mci1_clk: mci1_clk {
1129 spi0_clk: spi0_clk {
1132 atmel,clk-output-range = <0 133000000>;
1135 spi1_clk: spi1_clk {
1138 atmel,clk-output-range = <0 133000000>;
1141 tcb0_clk: tcb0_clk {
1144 atmel,clk-output-range = <0 133000000>;
1155 atmel,clk-output-range = <0 66000000>;
1158 dma0_clk: dma0_clk {
1163 dma1_clk: dma1_clk {
1168 uhphs_clk: uhphs_clk {
1173 udphs_clk: udphs_clk {
1183 ssc0_clk: ssc0_clk {
1186 atmel,clk-output-range = <0 66000000>;
1189 ssc1_clk: ssc1_clk {
1192 atmel,clk-output-range = <0 66000000>;
1205 tdes_clk: tdes_clk {
1210 trng_clk: trng_clk {
1215 fuse_clk: fuse_clk {
1220 mpddr_clk: mpddr_clk {
1228 compatible = "atmel,at91sam9g45-rstc";
1229 reg = <0xfffffe00 0x10>;
1232 shutdown-controller@fffffe10 {
1233 compatible = "atmel,at91sam9x5-shdwc";
1234 reg = <0xfffffe10 0x10>;
1237 pit: timer@fffffe30 {
1238 compatible = "atmel,at91sam9260-pit";
1239 reg = <0xfffffe30 0xf>;
1240 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1245 compatible = "atmel,at91sam9260-wdt";
1246 reg = <0xfffffe40 0x10>;
1247 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1248 atmel,watchdog-type = "hardware";
1249 atmel,reset-type = "all";
1251 status = "disabled";
1255 compatible = "atmel,at91sam9x5-sckc";
1256 reg = <0xfffffe50 0x4>;
1258 slow_rc_osc: slow_rc_osc {
1259 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1261 clock-frequency = <32768>;
1262 clock-accuracy = <50000000>;
1263 atmel,startup-time-usec = <75>;
1266 slow_osc: slow_osc {
1267 compatible = "atmel,at91sam9x5-clk-slow-osc";
1269 clocks = <&slow_xtal>;
1270 atmel,startup-time-usec = <1200000>;
1274 compatible = "atmel,at91sam9x5-clk-slow";
1276 clocks = <&slow_rc_osc &slow_osc>;
1281 compatible = "atmel,at91rm9200-rtc";
1282 reg = <0xfffffeb0 0x30>;
1283 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1287 usb0: gadget@00500000 {
1288 #address-cells = <1>;
1290 compatible = "atmel,at91sam9rl-udc";
1291 reg = <0x00500000 0x100000
1293 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1294 clocks = <&udphs_clk>, <&utmi>;
1295 clock-names = "pclk", "hclk";
1296 status = "disabled";
1300 atmel,fifo-size = <64>;
1301 atmel,nb-banks = <1>;
1306 atmel,fifo-size = <1024>;
1307 atmel,nb-banks = <3>;
1314 atmel,fifo-size = <1024>;
1315 atmel,nb-banks = <3>;
1322 atmel,fifo-size = <1024>;
1323 atmel,nb-banks = <2>;
1329 atmel,fifo-size = <1024>;
1330 atmel,nb-banks = <2>;
1336 atmel,fifo-size = <1024>;
1337 atmel,nb-banks = <2>;
1343 atmel,fifo-size = <1024>;
1344 atmel,nb-banks = <2>;
1350 atmel,fifo-size = <1024>;
1351 atmel,nb-banks = <2>;
1357 atmel,fifo-size = <1024>;
1358 atmel,nb-banks = <2>;
1363 atmel,fifo-size = <1024>;
1364 atmel,nb-banks = <2>;
1369 atmel,fifo-size = <1024>;
1370 atmel,nb-banks = <2>;
1375 atmel,fifo-size = <1024>;
1376 atmel,nb-banks = <2>;
1381 atmel,fifo-size = <1024>;
1382 atmel,nb-banks = <2>;
1387 atmel,fifo-size = <1024>;
1388 atmel,nb-banks = <2>;
1393 atmel,fifo-size = <1024>;
1394 atmel,nb-banks = <2>;
1399 atmel,fifo-size = <1024>;
1400 atmel,nb-banks = <2>;
1404 usb1: ohci@00600000 {
1405 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1406 reg = <0x00600000 0x100000>;
1407 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1408 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1410 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1411 status = "disabled";
1414 usb2: ehci@00700000 {
1415 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1416 reg = <0x00700000 0x100000>;
1417 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1418 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1419 clock-names = "usb_clk", "ehci_clk", "uhpck";
1420 status = "disabled";
1423 nand0: nand@60000000 {
1424 compatible = "atmel,at91rm9200-nand";
1425 #address-cells = <1>;
1428 reg = < 0x60000000 0x01000000 /* EBI CS3 */
1429 0xffffc070 0x00000490 /* SMC PMECC regs */
1430 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */
1431 0x00110000 0x00018000 /* ROM code */
1433 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1434 atmel,nand-addr-offset = <21>;
1435 atmel,nand-cmd-offset = <22>;
1437 pinctrl-names = "default";
1438 pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1439 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1440 status = "disabled";
1443 compatible = "atmel,sama5d3-nfc";
1444 #address-cells = <1>;
1447 0x70000000 0x10000000 /* NFC Command Registers */
1448 0xffffc000 0x00000070 /* NFC HSMC regs */
1449 0x00200000 0x00100000 /* NFC SRAM banks */
1451 clocks = <&hsmc_clk>;