arch/arm/boot/dts/sh73a0.dtsi

   1 /*
   2  * Device Tree Source for the SH73A0 SoC
   3  *
   4  * Copyright (C) 2012 Renesas Solutions Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         compatible = "renesas,sh73a0";
  15
  16         cpus {
  17                 #address-cells = <1>;
  18                 #size-cells = <0>;
  19
  20                 cpu@0 {
  21                         device_type = "cpu";
  22                         compatible = "arm,cortex-a9";
  23                         reg = <0>;
  24                 };
  25                 cpu@1 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a9";
  28                         reg = <1>;
  29                 };
  30         };
  31
  32         gic: interrupt-controller@f0001000 {
  33                 compatible = "arm,cortex-a9-gic";
  34                 #interrupt-cells = <3>;
  35                 #address-cells = <1>;
  36                 interrupt-controller;
  37                 reg = <0xf0001000 0x1000>,
  38                       <0xf0000100 0x100>;
  39         };
  40
  41         i2c0: i2c@0xe6820000 {
  42                 #address-cells = <1>;
  43                 #size-cells = <0>;
  44                 compatible = "renesas,rmobile-iic";
  45                 reg = <0xe6820000 0x425>;
  46                 interrupt-parent = <&gic>;
  47                 interrupts = <0 167 0x4
  48                               0 168 0x4
  49                               0 169 0x4
  50                               0 170 0x4>;
  51         };
  52
  53         i2c1: i2c@0xe6822000 {
  54                 #address-cells = <1>;
  55                 #size-cells = <0>;
  56                 compatible = "renesas,rmobile-iic";
  57                 reg = <0xe6822000 0x425>;
  58                 interrupt-parent = <&gic>;
  59                 interrupts = <0 51 0x4
  60                               0 52 0x4
  61                               0 53 0x4
  62                               0 54 0x4>;
  63         };
  64
  65         i2c2: i2c@0xe6824000 {
  66                 #address-cells = <1>;
  67                 #size-cells = <0>;
  68                 compatible = "renesas,rmobile-iic";
  69                 reg = <0xe6824000 0x425>;
  70                 interrupt-parent = <&gic>;
  71                 interrupts = <0 171 0x4
  72                               0 172 0x4
  73                               0 173 0x4
  74                               0 174 0x4>;
  75         };
  76
  77         i2c3: i2c@0xe6826000 {
  78                 #address-cells = <1>;
  79                 #size-cells = <0>;
  80                 compatible = "renesas,rmobile-iic";
  81                 reg = <0xe6826000 0x425>;
  82                 interrupt-parent = <&gic>;
  83                 interrupts = <0 183 0x4
  84                               0 184 0x4
  85                               0 185 0x4
  86                               0 186 0x4>;
  87         };
  88
  89         i2c4: i2c@0xe6828000 {
  90                 #address-cells = <1>;
  91                 #size-cells = <0>;
  92                 compatible = "renesas,rmobile-iic";
  93                 reg = <0xe6828000 0x425>;
  94                 interrupt-parent = <&gic>;
  95                 interrupts = <0 187 0x4
  96                               0 188 0x4
  97                               0 189 0x4
  98                               0 190 0x4>;
  99         };
 100
 101         mmcif: mmcif@0x10010000 {
 102                 compatible = "renesas,sh-mmcif";
 103                 reg = <0xe6bd0000 0x100>;
 104                 interrupt-parent = <&gic>;
 105                 interrupts = <0 140 0x4
 106                               0 141 0x4>;
 107                 reg-io-width = <4>;
 108                 status = "disabled";
 109         };
 110
 111         sdhi0: sdhi@0xee100000 {
 112                 compatible = "renesas,r8a7740-sdhi";
 113                 reg = <0xee100000 0x100>;
 114                 interrupt-parent = <&gic>;
 115                 interrupts = <0 83 4
 116                                 0 84 4
 117                                 0 85 4>;
 118                 cap-sd-highspeed;
 119                 status = "disabled";
 120         };
 121
 122         /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
 123         sdhi1: sdhi@0xee120000 {
 124                 compatible = "renesas,r8a7740-sdhi";
 125                 reg = <0xee120000 0x100>;
 126                 interrupt-parent = <&gic>;
 127                 interrupts = <0 88 4
 128                                 0 89 4>;
 129                 toshiba,mmc-wrprotect-disable;
 130                 cap-sd-highspeed;
 131                 status = "disabled";
 132         };
 133
 134         sdhi2: sdhi@0xee140000 {
 135                 compatible = "renesas,r8a7740-sdhi";
 136                 reg = <0xee140000 0x100>;
 137                 interrupt-parent = <&gic>;
 138                 interrupts = <0 104 4
 139                                 0 105 4>;
 140                 toshiba,mmc-wrprotect-disable;
 141                 cap-sd-highspeed;
 142                 status = "disabled";
 143         };
 144 };