arch/arm/boot/dts/sun5i.dtsi

   1 /*
   2  * Copyright 2012 Maxime Ripard
   3  *
   4  * Maxime Ripard <maxime.ripard@free-electrons.com>
   5  *
   6  * The code contained herein is licensed under the GNU General Public
   7  * License. You may obtain a copy of the GNU General Public License
   8  * Version 2 or later at the following locations:
   9  *
  10  * http://www.opensource.org/licenses/gpl-license.html
  11  * http://www.gnu.org/copyleft/gpl.html
  12  */
  13
  14 /include/ "skeleton.dtsi"
  15
  16 / {
  17         interrupt-parent = <&intc>;
  18
  19         cpus {
  20                 cpu@0 {
  21                         compatible = "arm,cortex-a8";
  22                 };
  23         };
  24
  25         chosen {
  26                 bootargs = "earlyprintk console=ttyS0,115200";
  27         };
  28
  29         memory {
  30                 reg = <0x40000000 0x20000000>;
  31         };
  32
  33         clocks {
  34                 #address-cells = <1>;
  35                 #size-cells = <0>;
  36
  37                 osc: oscillator {
  38                         #clock-cells = <0>;
  39                         compatible = "fixed-clock";
  40                         clock-frequency = <24000000>;
  41                 };
  42         };
  43
  44         soc {
  45                 compatible = "simple-bus";
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 reg = <0x01c20000 0x300000>;
  49                 ranges;
  50
  51                 timer@01c20c00 {
  52                         compatible = "allwinner,sunxi-timer";
  53                         reg = <0x01c20c00 0x400>;
  54                         interrupts = <22>;
  55                         clocks = <&osc>;
  56                 };
  57
  58                 intc: interrupt-controller@01c20400 {
  59                         compatible = "allwinner,sunxi-ic";
  60                         reg = <0x01c20400 0x400>;
  61                         interrupt-controller;
  62                         #interrupt-cells = <1>;
  63                 };
  64
  65                 uart1: uart@01c28400 {
  66                         compatible = "ns8250";
  67                         reg = <0x01c28400 0x400>;
  68                         interrupts = <2>;
  69                         reg-shift = <2>;
  70                         clock-frequency = <24000000>;
  71                         status = "disabled";
  72                 };
  73         };
  74 };