Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[deliverable/linux.git] / arch / arm / boot / dts / tegra124-jetson-tk1.dts
1 /dts-v1/;
2
3 #include <dt-bindings/input/input.h>
4 #include "tegra124.dtsi"
5
6 #include "tegra124-jetson-tk1-emc.dtsi"
7
8 / {
9 model = "NVIDIA Tegra124 Jetson TK1";
10 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
11
12 aliases {
13 rtc0 = "/i2c@0,7000d000/pmic@40";
14 rtc1 = "/rtc@0,7000e000";
15
16 /* This order keeps the mapping DB9 connector <-> ttyS0 */
17 serial0 = &uartd;
18 serial1 = &uarta;
19 serial2 = &uartb;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory {
27 reg = <0x0 0x80000000 0x0 0x80000000>;
28 };
29
30 pcie-controller@0,01003000 {
31 status = "okay";
32
33 avddio-pex-supply = <&vdd_1v05_run>;
34 dvddio-pex-supply = <&vdd_1v05_run>;
35 avdd-pex-pll-supply = <&vdd_1v05_run>;
36 hvdd-pex-supply = <&vdd_3v3_lp0>;
37 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
38 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
39 avdd-pll-erefe-supply = <&avdd_1v05_run>;
40
41 pci@1,0 {
42 status = "okay";
43 };
44
45 pci@2,0 {
46 status = "okay";
47 };
48 };
49
50 host1x@0,50000000 {
51 hdmi@0,54280000 {
52 status = "okay";
53
54 hdmi-supply = <&vdd_5v0_hdmi>;
55 pll-supply = <&vdd_hdmi_pll>;
56 vdd-supply = <&vdd_3v3_hdmi>;
57
58 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
59 nvidia,hpd-gpio =
60 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
61 };
62 };
63
64 gpu@0,57000000 {
65 /*
66 * Node left disabled on purpose - the bootloader will enable
67 * it after having set the VPR up
68 */
69 vdd-supply = <&vdd_gpu>;
70 };
71
72 pinmux: pinmux@0,70000868 {
73 pinctrl-names = "boot";
74 pinctrl-0 = <&state_boot>;
75
76 state_boot: pinmux {
77 clk_32k_out_pa0 {
78 nvidia,pins = "clk_32k_out_pa0";
79 nvidia,function = "soc";
80 nvidia,pull = <TEGRA_PIN_PULL_UP>;
81 nvidia,tristate = <TEGRA_PIN_ENABLE>;
82 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
83 };
84 uart3_cts_n_pa1 {
85 nvidia,pins = "uart3_cts_n_pa1";
86 nvidia,function = "gmi";
87 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
88 nvidia,tristate = <TEGRA_PIN_ENABLE>;
89 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
90 };
91 dap2_fs_pa2 {
92 nvidia,pins = "dap2_fs_pa2";
93 nvidia,function = "i2s1";
94 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
95 nvidia,tristate = <TEGRA_PIN_DISABLE>;
96 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
97 };
98 dap2_sclk_pa3 {
99 nvidia,pins = "dap2_sclk_pa3";
100 nvidia,function = "i2s1";
101 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102 nvidia,tristate = <TEGRA_PIN_DISABLE>;
103 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
104 };
105 dap2_din_pa4 {
106 nvidia,pins = "dap2_din_pa4";
107 nvidia,function = "i2s1";
108 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109 nvidia,tristate = <TEGRA_PIN_ENABLE>;
110 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
111 };
112 dap2_dout_pa5 {
113 nvidia,pins = "dap2_dout_pa5";
114 nvidia,function = "i2s1";
115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
117 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
118 };
119 sdmmc3_clk_pa6 {
120 nvidia,pins = "sdmmc3_clk_pa6";
121 nvidia,function = "sdmmc3";
122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
124 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
125 };
126 sdmmc3_cmd_pa7 {
127 nvidia,pins = "sdmmc3_cmd_pa7";
128 nvidia,function = "sdmmc3";
129 nvidia,pull = <TEGRA_PIN_PULL_UP>;
130 nvidia,tristate = <TEGRA_PIN_DISABLE>;
131 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
132 };
133 pb0 {
134 nvidia,pins = "pb0";
135 nvidia,function = "uartd";
136 nvidia,pull = <TEGRA_PIN_PULL_UP>;
137 nvidia,tristate = <TEGRA_PIN_ENABLE>;
138 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139 };
140 pb1 {
141 nvidia,pins = "pb1";
142 nvidia,function = "uartd";
143 nvidia,pull = <TEGRA_PIN_PULL_UP>;
144 nvidia,tristate = <TEGRA_PIN_ENABLE>;
145 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146 };
147 sdmmc3_dat3_pb4 {
148 nvidia,pins = "sdmmc3_dat3_pb4";
149 nvidia,function = "sdmmc3";
150 nvidia,pull = <TEGRA_PIN_PULL_UP>;
151 nvidia,tristate = <TEGRA_PIN_DISABLE>;
152 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
153 };
154 sdmmc3_dat2_pb5 {
155 nvidia,pins = "sdmmc3_dat2_pb5";
156 nvidia,function = "sdmmc3";
157 nvidia,pull = <TEGRA_PIN_PULL_UP>;
158 nvidia,tristate = <TEGRA_PIN_DISABLE>;
159 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160 };
161 sdmmc3_dat1_pb6 {
162 nvidia,pins = "sdmmc3_dat1_pb6";
163 nvidia,function = "sdmmc3";
164 nvidia,pull = <TEGRA_PIN_PULL_UP>;
165 nvidia,tristate = <TEGRA_PIN_DISABLE>;
166 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
167 };
168 sdmmc3_dat0_pb7 {
169 nvidia,pins = "sdmmc3_dat0_pb7";
170 nvidia,function = "sdmmc3";
171 nvidia,pull = <TEGRA_PIN_PULL_UP>;
172 nvidia,tristate = <TEGRA_PIN_DISABLE>;
173 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
174 };
175 uart3_rts_n_pc0 {
176 nvidia,pins = "uart3_rts_n_pc0";
177 nvidia,function = "gmi";
178 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
179 nvidia,tristate = <TEGRA_PIN_ENABLE>;
180 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
181 };
182 uart2_txd_pc2 {
183 nvidia,pins = "uart2_txd_pc2";
184 nvidia,function = "irda";
185 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
186 nvidia,tristate = <TEGRA_PIN_DISABLE>;
187 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
188 };
189 uart2_rxd_pc3 {
190 nvidia,pins = "uart2_rxd_pc3";
191 nvidia,function = "irda";
192 nvidia,pull = <TEGRA_PIN_PULL_UP>;
193 nvidia,tristate = <TEGRA_PIN_ENABLE>;
194 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
195 };
196 gen1_i2c_scl_pc4 {
197 nvidia,pins = "gen1_i2c_scl_pc4";
198 nvidia,function = "i2c1";
199 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
200 nvidia,tristate = <TEGRA_PIN_DISABLE>;
201 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
203 };
204 gen1_i2c_sda_pc5 {
205 nvidia,pins = "gen1_i2c_sda_pc5";
206 nvidia,function = "i2c1";
207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208 nvidia,tristate = <TEGRA_PIN_DISABLE>;
209 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
210 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
211 };
212 pc7 {
213 nvidia,pins = "pc7";
214 nvidia,function = "rsvd1";
215 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
216 nvidia,tristate = <TEGRA_PIN_ENABLE>;
217 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
218 };
219 pg0 {
220 nvidia,pins = "pg0";
221 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
222 nvidia,tristate = <TEGRA_PIN_ENABLE>;
223 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
224 };
225 pg1 {
226 nvidia,pins = "pg1";
227 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
228 nvidia,tristate = <TEGRA_PIN_ENABLE>;
229 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
230 };
231 pg2 {
232 nvidia,pins = "pg2";
233 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
234 nvidia,tristate = <TEGRA_PIN_ENABLE>;
235 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
236 };
237 pg3 {
238 nvidia,pins = "pg3";
239 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
240 nvidia,tristate = <TEGRA_PIN_ENABLE>;
241 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
242 };
243 pg4 {
244 nvidia,pins = "pg4";
245 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
246 nvidia,tristate = <TEGRA_PIN_ENABLE>;
247 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248 };
249 pg5 {
250 nvidia,pins = "pg5";
251 nvidia,function = "spi4";
252 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253 nvidia,tristate = <TEGRA_PIN_DISABLE>;
254 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
255 };
256 pg6 {
257 nvidia,pins = "pg6";
258 nvidia,function = "spi4";
259 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260 nvidia,tristate = <TEGRA_PIN_DISABLE>;
261 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
262 };
263 pg7 {
264 nvidia,pins = "pg7";
265 nvidia,function = "spi4";
266 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267 nvidia,tristate = <TEGRA_PIN_ENABLE>;
268 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
269 };
270 ph0 {
271 nvidia,pins = "ph0";
272 nvidia,function = "gmi";
273 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
274 nvidia,tristate = <TEGRA_PIN_ENABLE>;
275 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
276 };
277 ph1 {
278 nvidia,pins = "ph1";
279 nvidia,function = "pwm1";
280 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
281 nvidia,tristate = <TEGRA_PIN_DISABLE>;
282 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
283 };
284 ph2 {
285 nvidia,pins = "ph2";
286 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
287 nvidia,tristate = <TEGRA_PIN_DISABLE>;
288 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
289 };
290 ph3 {
291 nvidia,pins = "ph3";
292 nvidia,function = "gmi";
293 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
294 nvidia,tristate = <TEGRA_PIN_ENABLE>;
295 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296 };
297 ph4 {
298 nvidia,pins = "ph4";
299 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
300 nvidia,tristate = <TEGRA_PIN_ENABLE>;
301 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
302 };
303 ph5 {
304 nvidia,pins = "ph5";
305 nvidia,function = "rsvd2";
306 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
307 nvidia,tristate = <TEGRA_PIN_ENABLE>;
308 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
309 };
310 ph6 {
311 nvidia,pins = "ph6";
312 nvidia,function = "gmi";
313 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
314 nvidia,tristate = <TEGRA_PIN_ENABLE>;
315 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316 };
317 ph7 {
318 nvidia,pins = "ph7";
319 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
320 nvidia,tristate = <TEGRA_PIN_DISABLE>;
321 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
322 };
323 pi0 {
324 nvidia,pins = "pi0";
325 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
326 nvidia,tristate = <TEGRA_PIN_DISABLE>;
327 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
328 };
329 pi1 {
330 nvidia,pins = "pi1";
331 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
332 nvidia,tristate = <TEGRA_PIN_ENABLE>;
333 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
334 };
335 pi2 {
336 nvidia,pins = "pi2";
337 nvidia,function = "rsvd4";
338 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
339 nvidia,tristate = <TEGRA_PIN_ENABLE>;
340 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
341 };
342 pi3 {
343 nvidia,pins = "pi3";
344 nvidia,function = "spi4";
345 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
346 nvidia,tristate = <TEGRA_PIN_DISABLE>;
347 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348 };
349 pi4 {
350 nvidia,pins = "pi4";
351 nvidia,function = "gmi";
352 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
353 nvidia,tristate = <TEGRA_PIN_ENABLE>;
354 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
355 };
356 pi5 {
357 nvidia,pins = "pi5";
358 nvidia,function = "rsvd2";
359 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
360 nvidia,tristate = <TEGRA_PIN_ENABLE>;
361 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
362 };
363 pi6 {
364 nvidia,pins = "pi6";
365 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
366 nvidia,tristate = <TEGRA_PIN_ENABLE>;
367 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
368 };
369 pi7 {
370 nvidia,pins = "pi7";
371 nvidia,function = "rsvd1";
372 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
373 nvidia,tristate = <TEGRA_PIN_ENABLE>;
374 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
375 };
376 pj0 {
377 nvidia,pins = "pj0";
378 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
379 nvidia,tristate = <TEGRA_PIN_ENABLE>;
380 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
381 };
382 pj2 {
383 nvidia,pins = "pj2";
384 nvidia,function = "rsvd1";
385 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
386 nvidia,tristate = <TEGRA_PIN_ENABLE>;
387 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
388 };
389 uart2_cts_n_pj5 {
390 nvidia,pins = "uart2_cts_n_pj5";
391 nvidia,function = "uartb";
392 nvidia,pull = <TEGRA_PIN_PULL_UP>;
393 nvidia,tristate = <TEGRA_PIN_ENABLE>;
394 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
395 };
396 uart2_rts_n_pj6 {
397 nvidia,pins = "uart2_rts_n_pj6";
398 nvidia,function = "uartb";
399 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400 nvidia,tristate = <TEGRA_PIN_DISABLE>;
401 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
402 };
403 pj7 {
404 nvidia,pins = "pj7";
405 nvidia,function = "uartd";
406 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407 nvidia,tristate = <TEGRA_PIN_DISABLE>;
408 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
409 };
410 pk0 {
411 nvidia,pins = "pk0";
412 nvidia,function = "rsvd1";
413 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
414 nvidia,tristate = <TEGRA_PIN_ENABLE>;
415 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416 };
417 pk1 {
418 nvidia,pins = "pk1";
419 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
420 nvidia,tristate = <TEGRA_PIN_DISABLE>;
421 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
422 };
423 pk2 {
424 nvidia,pins = "pk2";
425 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426 nvidia,tristate = <TEGRA_PIN_DISABLE>;
427 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
428 };
429 pk3 {
430 nvidia,pins = "pk3";
431 nvidia,function = "gmi";
432 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
433 nvidia,tristate = <TEGRA_PIN_ENABLE>;
434 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
435 };
436 pk4 {
437 nvidia,pins = "pk4";
438 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
439 nvidia,tristate = <TEGRA_PIN_DISABLE>;
440 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
441 };
442 spdif_out_pk5 {
443 nvidia,pins = "spdif_out_pk5";
444 nvidia,function = "rsvd2";
445 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
446 nvidia,tristate = <TEGRA_PIN_ENABLE>;
447 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
448 };
449 spdif_in_pk6 {
450 nvidia,pins = "spdif_in_pk6";
451 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
452 nvidia,tristate = <TEGRA_PIN_DISABLE>;
453 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
454 };
455 pk7 {
456 nvidia,pins = "pk7";
457 nvidia,function = "uartd";
458 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459 nvidia,tristate = <TEGRA_PIN_DISABLE>;
460 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
461 };
462 dap1_fs_pn0 {
463 nvidia,pins = "dap1_fs_pn0";
464 nvidia,function = "rsvd4";
465 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
466 nvidia,tristate = <TEGRA_PIN_ENABLE>;
467 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
468 };
469 dap1_din_pn1 {
470 nvidia,pins = "dap1_din_pn1";
471 nvidia,function = "rsvd4";
472 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
473 nvidia,tristate = <TEGRA_PIN_ENABLE>;
474 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475 };
476 dap1_dout_pn2 {
477 nvidia,pins = "dap1_dout_pn2";
478 nvidia,function = "sata";
479 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
480 nvidia,tristate = <TEGRA_PIN_DISABLE>;
481 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
482 };
483 dap1_sclk_pn3 {
484 nvidia,pins = "dap1_sclk_pn3";
485 nvidia,function = "rsvd4";
486 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
487 nvidia,tristate = <TEGRA_PIN_ENABLE>;
488 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
489 };
490 usb_vbus_en0_pn4 {
491 nvidia,pins = "usb_vbus_en0_pn4";
492 nvidia,function = "usb";
493 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
494 nvidia,tristate = <TEGRA_PIN_DISABLE>;
495 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
496 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
497 };
498 usb_vbus_en1_pn5 {
499 nvidia,pins = "usb_vbus_en1_pn5";
500 nvidia,function = "usb";
501 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
502 nvidia,tristate = <TEGRA_PIN_DISABLE>;
503 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
504 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
505 };
506 hdmi_int_pn7 {
507 nvidia,pins = "hdmi_int_pn7";
508 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
509 nvidia,tristate = <TEGRA_PIN_ENABLE>;
510 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
512 };
513 ulpi_data7_po0 {
514 nvidia,pins = "ulpi_data7_po0";
515 nvidia,function = "ulpi";
516 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
517 nvidia,tristate = <TEGRA_PIN_ENABLE>;
518 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
519 };
520 ulpi_data0_po1 {
521 nvidia,pins = "ulpi_data0_po1";
522 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
523 nvidia,tristate = <TEGRA_PIN_ENABLE>;
524 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
525 };
526 ulpi_data1_po2 {
527 nvidia,pins = "ulpi_data1_po2";
528 nvidia,function = "ulpi";
529 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
530 nvidia,tristate = <TEGRA_PIN_ENABLE>;
531 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
532 };
533 ulpi_data2_po3 {
534 nvidia,pins = "ulpi_data2_po3";
535 nvidia,function = "ulpi";
536 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
537 nvidia,tristate = <TEGRA_PIN_ENABLE>;
538 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
539 };
540 ulpi_data3_po4 {
541 nvidia,pins = "ulpi_data3_po4";
542 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
543 nvidia,tristate = <TEGRA_PIN_ENABLE>;
544 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
545 };
546 ulpi_data4_po5 {
547 nvidia,pins = "ulpi_data4_po5";
548 nvidia,function = "ulpi";
549 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
550 nvidia,tristate = <TEGRA_PIN_ENABLE>;
551 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
552 };
553 ulpi_data5_po6 {
554 nvidia,pins = "ulpi_data5_po6";
555 nvidia,function = "ulpi";
556 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
557 nvidia,tristate = <TEGRA_PIN_ENABLE>;
558 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
559 };
560 ulpi_data6_po7 {
561 nvidia,pins = "ulpi_data6_po7";
562 nvidia,function = "ulpi";
563 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
564 nvidia,tristate = <TEGRA_PIN_ENABLE>;
565 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
566 };
567 dap3_fs_pp0 {
568 nvidia,pins = "dap3_fs_pp0";
569 nvidia,function = "i2s2";
570 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
571 nvidia,tristate = <TEGRA_PIN_ENABLE>;
572 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
573 };
574 dap3_din_pp1 {
575 nvidia,pins = "dap3_din_pp1";
576 nvidia,function = "i2s2";
577 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
578 nvidia,tristate = <TEGRA_PIN_ENABLE>;
579 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
580 };
581 dap3_dout_pp2 {
582 nvidia,pins = "dap3_dout_pp2";
583 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
584 nvidia,tristate = <TEGRA_PIN_DISABLE>;
585 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
586 };
587 dap3_sclk_pp3 {
588 nvidia,pins = "dap3_sclk_pp3";
589 nvidia,function = "rsvd3";
590 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
591 nvidia,tristate = <TEGRA_PIN_ENABLE>;
592 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593 };
594 dap4_fs_pp4 {
595 nvidia,pins = "dap4_fs_pp4";
596 nvidia,function = "rsvd4";
597 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
598 nvidia,tristate = <TEGRA_PIN_ENABLE>;
599 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600 };
601 dap4_din_pp5 {
602 nvidia,pins = "dap4_din_pp5";
603 nvidia,function = "rsvd3";
604 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605 nvidia,tristate = <TEGRA_PIN_ENABLE>;
606 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
607 };
608 dap4_dout_pp6 {
609 nvidia,pins = "dap4_dout_pp6";
610 nvidia,function = "rsvd4";
611 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
612 nvidia,tristate = <TEGRA_PIN_ENABLE>;
613 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
614 };
615 dap4_sclk_pp7 {
616 nvidia,pins = "dap4_sclk_pp7";
617 nvidia,function = "rsvd3";
618 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
619 nvidia,tristate = <TEGRA_PIN_ENABLE>;
620 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
621 };
622 kb_col0_pq0 {
623 nvidia,pins = "kb_col0_pq0";
624 nvidia,pull = <TEGRA_PIN_PULL_UP>;
625 nvidia,tristate = <TEGRA_PIN_ENABLE>;
626 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
627 };
628 kb_col1_pq1 {
629 nvidia,pins = "kb_col1_pq1";
630 nvidia,function = "rsvd2";
631 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
632 nvidia,tristate = <TEGRA_PIN_ENABLE>;
633 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
634 };
635 kb_col2_pq2 {
636 nvidia,pins = "kb_col2_pq2";
637 nvidia,function = "rsvd2";
638 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
639 nvidia,tristate = <TEGRA_PIN_ENABLE>;
640 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641 };
642 kb_col3_pq3 {
643 nvidia,pins = "kb_col3_pq3";
644 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
645 nvidia,tristate = <TEGRA_PIN_ENABLE>;
646 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
647 };
648 kb_col4_pq4 {
649 nvidia,pins = "kb_col4_pq4";
650 nvidia,function = "sdmmc3";
651 nvidia,pull = <TEGRA_PIN_PULL_UP>;
652 nvidia,tristate = <TEGRA_PIN_ENABLE>;
653 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654 };
655 kb_col5_pq5 {
656 nvidia,pins = "kb_col5_pq5";
657 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
658 nvidia,tristate = <TEGRA_PIN_ENABLE>;
659 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
660 };
661 kb_col6_pq6 {
662 nvidia,pins = "kb_col6_pq6";
663 nvidia,function = "rsvd2";
664 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
665 nvidia,tristate = <TEGRA_PIN_ENABLE>;
666 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
667 };
668 kb_col7_pq7 {
669 nvidia,pins = "kb_col7_pq7";
670 nvidia,function = "rsvd2";
671 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
672 nvidia,tristate = <TEGRA_PIN_ENABLE>;
673 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
674 };
675 kb_row0_pr0 {
676 nvidia,pins = "kb_row0_pr0";
677 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
678 nvidia,tristate = <TEGRA_PIN_DISABLE>;
679 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
680 };
681 kb_row1_pr1 {
682 nvidia,pins = "kb_row1_pr1";
683 nvidia,function = "rsvd2";
684 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
685 nvidia,tristate = <TEGRA_PIN_ENABLE>;
686 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
687 };
688 kb_row2_pr2 {
689 nvidia,pins = "kb_row2_pr2";
690 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
691 nvidia,tristate = <TEGRA_PIN_DISABLE>;
692 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
693 };
694 kb_row3_pr3 {
695 nvidia,pins = "kb_row3_pr3";
696 nvidia,function = "kbc";
697 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
698 nvidia,tristate = <TEGRA_PIN_ENABLE>;
699 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
700 };
701 kb_row4_pr4 {
702 nvidia,pins = "kb_row4_pr4";
703 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
704 nvidia,tristate = <TEGRA_PIN_ENABLE>;
705 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
706 };
707 kb_row5_pr5 {
708 nvidia,pins = "kb_row5_pr5";
709 nvidia,function = "rsvd3";
710 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
711 nvidia,tristate = <TEGRA_PIN_ENABLE>;
712 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
713 };
714 kb_row6_pr6 {
715 nvidia,pins = "kb_row6_pr6";
716 nvidia,function = "displaya_alt";
717 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
718 nvidia,tristate = <TEGRA_PIN_ENABLE>;
719 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
720 };
721 kb_row7_pr7 {
722 nvidia,pins = "kb_row7_pr7";
723 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
724 nvidia,tristate = <TEGRA_PIN_ENABLE>;
725 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
726 };
727 kb_row8_ps0 {
728 nvidia,pins = "kb_row8_ps0";
729 nvidia,function = "rsvd2";
730 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
731 nvidia,tristate = <TEGRA_PIN_ENABLE>;
732 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
733 };
734 kb_row9_ps1 {
735 nvidia,pins = "kb_row9_ps1";
736 nvidia,function = "uarta";
737 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
738 nvidia,tristate = <TEGRA_PIN_DISABLE>;
739 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
740 };
741 kb_row10_ps2 {
742 nvidia,pins = "kb_row10_ps2";
743 nvidia,function = "uarta";
744 nvidia,pull = <TEGRA_PIN_PULL_UP>;
745 nvidia,tristate = <TEGRA_PIN_ENABLE>;
746 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
747 };
748 kb_row11_ps3 {
749 nvidia,pins = "kb_row11_ps3";
750 nvidia,function = "rsvd2";
751 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
752 nvidia,tristate = <TEGRA_PIN_ENABLE>;
753 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
754 };
755 kb_row12_ps4 {
756 nvidia,pins = "kb_row12_ps4";
757 nvidia,function = "rsvd2";
758 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
759 nvidia,tristate = <TEGRA_PIN_ENABLE>;
760 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
761 };
762 kb_row13_ps5 {
763 nvidia,pins = "kb_row13_ps5";
764 nvidia,function = "rsvd2";
765 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
766 nvidia,tristate = <TEGRA_PIN_ENABLE>;
767 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
768 };
769 kb_row14_ps6 {
770 nvidia,pins = "kb_row14_ps6";
771 nvidia,function = "rsvd2";
772 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
773 nvidia,tristate = <TEGRA_PIN_ENABLE>;
774 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
775 };
776 kb_row15_ps7 {
777 nvidia,pins = "kb_row15_ps7";
778 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
779 nvidia,tristate = <TEGRA_PIN_ENABLE>;
780 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
781 };
782 kb_row16_pt0 {
783 nvidia,pins = "kb_row16_pt0";
784 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
785 nvidia,tristate = <TEGRA_PIN_DISABLE>;
786 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
787 };
788 kb_row17_pt1 {
789 nvidia,pins = "kb_row17_pt1";
790 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
791 nvidia,tristate = <TEGRA_PIN_ENABLE>;
792 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
793 };
794 gen2_i2c_scl_pt5 {
795 nvidia,pins = "gen2_i2c_scl_pt5";
796 nvidia,function = "i2c2";
797 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
798 nvidia,tristate = <TEGRA_PIN_DISABLE>;
799 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
800 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
801 };
802 gen2_i2c_sda_pt6 {
803 nvidia,pins = "gen2_i2c_sda_pt6";
804 nvidia,function = "i2c2";
805 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
806 nvidia,tristate = <TEGRA_PIN_DISABLE>;
807 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
808 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
809 };
810 sdmmc4_cmd_pt7 {
811 nvidia,pins = "sdmmc4_cmd_pt7";
812 nvidia,function = "sdmmc4";
813 nvidia,pull = <TEGRA_PIN_PULL_UP>;
814 nvidia,tristate = <TEGRA_PIN_DISABLE>;
815 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
816 };
817 pu0 {
818 nvidia,pins = "pu0";
819 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
820 nvidia,tristate = <TEGRA_PIN_DISABLE>;
821 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
822 };
823 pu1 {
824 nvidia,pins = "pu1";
825 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
826 nvidia,tristate = <TEGRA_PIN_DISABLE>;
827 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
828 };
829 pu2 {
830 nvidia,pins = "pu2";
831 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
832 nvidia,tristate = <TEGRA_PIN_DISABLE>;
833 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
834 };
835 pu3 {
836 nvidia,pins = "pu3";
837 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
838 nvidia,tristate = <TEGRA_PIN_DISABLE>;
839 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
840 };
841 pu4 {
842 nvidia,pins = "pu4";
843 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
844 nvidia,tristate = <TEGRA_PIN_DISABLE>;
845 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
846 };
847 pu5 {
848 nvidia,pins = "pu5";
849 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
850 nvidia,tristate = <TEGRA_PIN_DISABLE>;
851 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
852 };
853 pu6 {
854 nvidia,pins = "pu6";
855 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
856 nvidia,tristate = <TEGRA_PIN_DISABLE>;
857 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
858 };
859 pv0 {
860 nvidia,pins = "pv0";
861 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
862 nvidia,tristate = <TEGRA_PIN_ENABLE>;
863 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
864 };
865 pv1 {
866 nvidia,pins = "pv1";
867 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
868 nvidia,tristate = <TEGRA_PIN_ENABLE>;
869 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
870 };
871 sdmmc3_cd_n_pv2 {
872 nvidia,pins = "sdmmc3_cd_n_pv2";
873 nvidia,function = "sdmmc3";
874 nvidia,pull = <TEGRA_PIN_PULL_UP>;
875 nvidia,tristate = <TEGRA_PIN_ENABLE>;
876 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
877 };
878 sdmmc1_wp_n_pv3 {
879 nvidia,pins = "sdmmc1_wp_n_pv3";
880 nvidia,function = "sdmmc1";
881 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
882 nvidia,tristate = <TEGRA_PIN_ENABLE>;
883 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
884 };
885 ddc_scl_pv4 {
886 nvidia,pins = "ddc_scl_pv4";
887 nvidia,function = "i2c4";
888 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
889 nvidia,tristate = <TEGRA_PIN_DISABLE>;
890 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
891 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
892 };
893 ddc_sda_pv5 {
894 nvidia,pins = "ddc_sda_pv5";
895 nvidia,function = "i2c4";
896 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
897 nvidia,tristate = <TEGRA_PIN_DISABLE>;
898 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
899 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
900 };
901 gpio_w2_aud_pw2 {
902 nvidia,pins = "gpio_w2_aud_pw2";
903 nvidia,function = "rsvd2";
904 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
905 nvidia,tristate = <TEGRA_PIN_ENABLE>;
906 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
907 };
908 gpio_w3_aud_pw3 {
909 nvidia,pins = "gpio_w3_aud_pw3";
910 nvidia,function = "spi6";
911 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
912 nvidia,tristate = <TEGRA_PIN_ENABLE>;
913 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
914 };
915 dap_mclk1_pw4 {
916 nvidia,pins = "dap_mclk1_pw4";
917 nvidia,function = "extperiph1";
918 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
919 nvidia,tristate = <TEGRA_PIN_DISABLE>;
920 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
921 };
922 clk2_out_pw5 {
923 nvidia,pins = "clk2_out_pw5";
924 nvidia,function = "extperiph2";
925 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
926 nvidia,tristate = <TEGRA_PIN_DISABLE>;
927 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
928 };
929 uart3_txd_pw6 {
930 nvidia,pins = "uart3_txd_pw6";
931 nvidia,function = "rsvd2";
932 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
933 nvidia,tristate = <TEGRA_PIN_ENABLE>;
934 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
935 };
936 uart3_rxd_pw7 {
937 nvidia,pins = "uart3_rxd_pw7";
938 nvidia,function = "rsvd2";
939 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
940 nvidia,tristate = <TEGRA_PIN_ENABLE>;
941 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
942 };
943 dvfs_pwm_px0 {
944 nvidia,pins = "dvfs_pwm_px0";
945 nvidia,function = "cldvfs";
946 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
947 nvidia,tristate = <TEGRA_PIN_DISABLE>;
948 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
949 };
950 gpio_x1_aud_px1 {
951 nvidia,pins = "gpio_x1_aud_px1";
952 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
953 nvidia,tristate = <TEGRA_PIN_ENABLE>;
954 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
955 };
956 dvfs_clk_px2 {
957 nvidia,pins = "dvfs_clk_px2";
958 nvidia,function = "cldvfs";
959 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
960 nvidia,tristate = <TEGRA_PIN_DISABLE>;
961 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
962 };
963 gpio_x3_aud_px3 {
964 nvidia,pins = "gpio_x3_aud_px3";
965 nvidia,function = "rsvd4";
966 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
967 nvidia,tristate = <TEGRA_PIN_ENABLE>;
968 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
969 };
970 gpio_x4_aud_px4 {
971 nvidia,pins = "gpio_x4_aud_px4";
972 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
973 nvidia,tristate = <TEGRA_PIN_ENABLE>;
974 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
975 };
976 gpio_x5_aud_px5 {
977 nvidia,pins = "gpio_x5_aud_px5";
978 nvidia,function = "rsvd4";
979 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
980 nvidia,tristate = <TEGRA_PIN_ENABLE>;
981 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
982 };
983 gpio_x6_aud_px6 {
984 nvidia,pins = "gpio_x6_aud_px6";
985 nvidia,function = "gmi";
986 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
987 nvidia,tristate = <TEGRA_PIN_ENABLE>;
988 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
989 };
990 gpio_x7_aud_px7 {
991 nvidia,pins = "gpio_x7_aud_px7";
992 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
993 nvidia,tristate = <TEGRA_PIN_DISABLE>;
994 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
995 };
996 ulpi_clk_py0 {
997 nvidia,pins = "ulpi_clk_py0";
998 nvidia,function = "spi1";
999 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1000 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1002 };
1003 ulpi_dir_py1 {
1004 nvidia,pins = "ulpi_dir_py1";
1005 nvidia,function = "spi1";
1006 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1007 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1008 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1009 };
1010 ulpi_nxt_py2 {
1011 nvidia,pins = "ulpi_nxt_py2";
1012 nvidia,function = "spi1";
1013 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1014 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1015 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1016 };
1017 ulpi_stp_py3 {
1018 nvidia,pins = "ulpi_stp_py3";
1019 nvidia,function = "spi1";
1020 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1021 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1022 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1023 };
1024 sdmmc1_dat3_py4 {
1025 nvidia,pins = "sdmmc1_dat3_py4";
1026 nvidia,function = "sdmmc1";
1027 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1028 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1029 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1030 };
1031 sdmmc1_dat2_py5 {
1032 nvidia,pins = "sdmmc1_dat2_py5";
1033 nvidia,function = "sdmmc1";
1034 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1035 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1036 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1037 };
1038 sdmmc1_dat1_py6 {
1039 nvidia,pins = "sdmmc1_dat1_py6";
1040 nvidia,function = "sdmmc1";
1041 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1042 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1043 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1044 };
1045 sdmmc1_dat0_py7 {
1046 nvidia,pins = "sdmmc1_dat0_py7";
1047 nvidia,function = "rsvd2";
1048 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1049 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1050 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1051 };
1052 sdmmc1_clk_pz0 {
1053 nvidia,pins = "sdmmc1_clk_pz0";
1054 nvidia,function = "rsvd3";
1055 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1056 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1057 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1058 };
1059 sdmmc1_cmd_pz1 {
1060 nvidia,pins = "sdmmc1_cmd_pz1";
1061 nvidia,function = "sdmmc1";
1062 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1063 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1064 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1065 };
1066 pwr_i2c_scl_pz6 {
1067 nvidia,pins = "pwr_i2c_scl_pz6";
1068 nvidia,function = "i2cpwr";
1069 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1070 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1071 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1072 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1073 };
1074 pwr_i2c_sda_pz7 {
1075 nvidia,pins = "pwr_i2c_sda_pz7";
1076 nvidia,function = "i2cpwr";
1077 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1078 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1079 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1080 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1081 };
1082 sdmmc4_dat0_paa0 {
1083 nvidia,pins = "sdmmc4_dat0_paa0";
1084 nvidia,function = "sdmmc4";
1085 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1086 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1088 };
1089 sdmmc4_dat1_paa1 {
1090 nvidia,pins = "sdmmc4_dat1_paa1";
1091 nvidia,function = "sdmmc4";
1092 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1093 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095 };
1096 sdmmc4_dat2_paa2 {
1097 nvidia,pins = "sdmmc4_dat2_paa2";
1098 nvidia,function = "sdmmc4";
1099 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102 };
1103 sdmmc4_dat3_paa3 {
1104 nvidia,pins = "sdmmc4_dat3_paa3";
1105 nvidia,function = "sdmmc4";
1106 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1107 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109 };
1110 sdmmc4_dat4_paa4 {
1111 nvidia,pins = "sdmmc4_dat4_paa4";
1112 nvidia,function = "sdmmc4";
1113 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116 };
1117 sdmmc4_dat5_paa5 {
1118 nvidia,pins = "sdmmc4_dat5_paa5";
1119 nvidia,function = "sdmmc4";
1120 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123 };
1124 sdmmc4_dat6_paa6 {
1125 nvidia,pins = "sdmmc4_dat6_paa6";
1126 nvidia,function = "sdmmc4";
1127 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1128 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1129 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1130 };
1131 sdmmc4_dat7_paa7 {
1132 nvidia,pins = "sdmmc4_dat7_paa7";
1133 nvidia,function = "sdmmc4";
1134 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1135 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1136 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1137 };
1138 pbb0 {
1139 nvidia,pins = "pbb0";
1140 nvidia,function = "vimclk2_alt";
1141 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1142 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1143 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1144 };
1145 cam_i2c_scl_pbb1 {
1146 nvidia,pins = "cam_i2c_scl_pbb1";
1147 nvidia,function = "i2c3";
1148 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1149 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1150 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1151 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1152 };
1153 cam_i2c_sda_pbb2 {
1154 nvidia,pins = "cam_i2c_sda_pbb2";
1155 nvidia,function = "i2c3";
1156 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1157 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1158 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1159 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1160 };
1161 pbb3 {
1162 nvidia,pins = "pbb3";
1163 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1164 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1165 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1166 };
1167 pbb4 {
1168 nvidia,pins = "pbb4";
1169 nvidia,function = "vgp4";
1170 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1171 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1172 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1173 };
1174 pbb5 {
1175 nvidia,pins = "pbb5";
1176 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1177 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1178 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1179 };
1180 pbb6 {
1181 nvidia,pins = "pbb6";
1182 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1183 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1184 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1185 };
1186 pbb7 {
1187 nvidia,pins = "pbb7";
1188 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1189 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1190 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1191 };
1192 cam_mclk_pcc0 {
1193 nvidia,pins = "cam_mclk_pcc0";
1194 nvidia,function = "vi_alt3";
1195 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1197 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1198 };
1199 pcc1 {
1200 nvidia,pins = "pcc1";
1201 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1202 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1203 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1204 };
1205 pcc2 {
1206 nvidia,pins = "pcc2";
1207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1208 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1209 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1210 };
1211 sdmmc4_clk_pcc4 {
1212 nvidia,pins = "sdmmc4_clk_pcc4";
1213 nvidia,function = "sdmmc4";
1214 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1215 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1216 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1217 };
1218 clk2_req_pcc5 {
1219 nvidia,pins = "clk2_req_pcc5";
1220 nvidia,function = "rsvd2";
1221 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1222 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1223 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1224 };
1225 pex_l0_rst_n_pdd1 {
1226 nvidia,pins = "pex_l0_rst_n_pdd1";
1227 nvidia,function = "pe0";
1228 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1229 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1230 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1231 };
1232 pex_l0_clkreq_n_pdd2 {
1233 nvidia,pins = "pex_l0_clkreq_n_pdd2";
1234 nvidia,function = "pe0";
1235 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1236 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1237 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1238 };
1239 pex_wake_n_pdd3 {
1240 nvidia,pins = "pex_wake_n_pdd3";
1241 nvidia,function = "pe";
1242 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1243 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1244 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1245 };
1246 pex_l1_rst_n_pdd5 {
1247 nvidia,pins = "pex_l1_rst_n_pdd5";
1248 nvidia,function = "pe1";
1249 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1250 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1251 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1252 };
1253 pex_l1_clkreq_n_pdd6 {
1254 nvidia,pins = "pex_l1_clkreq_n_pdd6";
1255 nvidia,function = "pe1";
1256 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1257 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1258 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1259 };
1260 clk3_out_pee0 {
1261 nvidia,pins = "clk3_out_pee0";
1262 nvidia,function = "extperiph3";
1263 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1264 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1265 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1266 };
1267 clk3_req_pee1 {
1268 nvidia,pins = "clk3_req_pee1";
1269 nvidia,function = "rsvd2";
1270 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1271 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1272 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1273 };
1274 dap_mclk1_req_pee2 {
1275 nvidia,pins = "dap_mclk1_req_pee2";
1276 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1277 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1278 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1279 };
1280 hdmi_cec_pee3 {
1281 nvidia,pins = "hdmi_cec_pee3";
1282 nvidia,function = "cec";
1283 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1284 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1286 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1287 };
1288 sdmmc3_clk_lb_out_pee4 {
1289 nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1290 nvidia,function = "sdmmc3";
1291 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1292 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1293 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1294 };
1295 sdmmc3_clk_lb_in_pee5 {
1296 nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1297 nvidia,function = "sdmmc3";
1298 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1299 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1300 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1301 };
1302 dp_hpd_pff0 {
1303 nvidia,pins = "dp_hpd_pff0";
1304 nvidia,function = "dp";
1305 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1306 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1307 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1308 };
1309 usb_vbus_en2_pff1 {
1310 nvidia,pins = "usb_vbus_en2_pff1";
1311 nvidia,function = "rsvd2";
1312 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1313 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1314 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1315 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1316 };
1317 pff2 {
1318 nvidia,pins = "pff2";
1319 nvidia,function = "rsvd2";
1320 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1321 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1322 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1323 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1324 };
1325 core_pwr_req {
1326 nvidia,pins = "core_pwr_req";
1327 nvidia,function = "pwron";
1328 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1329 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1330 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1331 };
1332 cpu_pwr_req {
1333 nvidia,pins = "cpu_pwr_req";
1334 nvidia,function = "cpu";
1335 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1336 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1337 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1338 };
1339 pwr_int_n {
1340 nvidia,pins = "pwr_int_n";
1341 nvidia,function = "pmi";
1342 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1343 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1344 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1345 };
1346 reset_out_n {
1347 nvidia,pins = "reset_out_n";
1348 nvidia,function = "reset_out_n";
1349 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1350 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1351 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1352 };
1353 owr {
1354 nvidia,pins = "owr";
1355 nvidia,function = "rsvd2";
1356 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1357 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1358 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1359 nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
1360 };
1361 clk_32k_in {
1362 nvidia,pins = "clk_32k_in";
1363 nvidia,function = "clk";
1364 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1365 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1366 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1367 };
1368 jtag_rtck {
1369 nvidia,pins = "jtag_rtck";
1370 nvidia,function = "rtck";
1371 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1372 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1373 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1374 };
1375 };
1376 };
1377
1378 /*
1379 * First high speed UART, exposed on the expansion connector J3A2
1380 * Pin 41: BR_UART1_TXD
1381 * Pin 44: BR_UART1_RXD
1382 */
1383 serial@70006000 {
1384 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1385 status = "okay";
1386 };
1387
1388 /*
1389 * Second high speed UART, exposed on the expansion connector J3A2
1390 * Pin 65: UART2_RXD
1391 * Pin 68: UART2_TXD
1392 * Pin 71: UART2_CTS_L
1393 * Pin 74: UART2_RTS_L
1394 */
1395 serial@70006040 {
1396 compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1397 status = "okay";
1398 };
1399
1400 /* DB9 serial port */
1401 serial@0,70006300 {
1402 status = "okay";
1403 };
1404
1405 /* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1406 i2c@0,7000c000 {
1407 status = "okay";
1408 clock-frequency = <100000>;
1409
1410 rt5639: audio-codec@1c {
1411 compatible = "realtek,rt5639";
1412 reg = <0x1c>;
1413 interrupt-parent = <&gpio>;
1414 interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
1415 realtek,ldo1-en-gpios =
1416 <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1417 };
1418
1419 temperature-sensor@4c {
1420 compatible = "ti,tmp451";
1421 reg = <0x4c>;
1422 interrupt-parent = <&gpio>;
1423 interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
1424 };
1425
1426 eeprom@56 {
1427 compatible = "atmel,24c02";
1428 reg = <0x56>;
1429 pagesize = <8>;
1430 };
1431 };
1432
1433 /* Expansion GEN2_I2C_* */
1434 i2c@0,7000c400 {
1435 status = "okay";
1436 clock-frequency = <100000>;
1437 };
1438
1439 /* Expansion CAM_I2C_* */
1440 i2c@0,7000c500 {
1441 status = "okay";
1442 clock-frequency = <100000>;
1443 };
1444
1445 /* HDMI DDC */
1446 hdmi_ddc: i2c@0,7000c700 {
1447 status = "okay";
1448 clock-frequency = <100000>;
1449 };
1450
1451 /* Expansion PWR_I2C_*, on-board components */
1452 i2c@0,7000d000 {
1453 status = "okay";
1454 clock-frequency = <400000>;
1455
1456 pmic: pmic@40 {
1457 compatible = "ams,as3722";
1458 reg = <0x40>;
1459 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1460
1461 ams,system-power-controller;
1462
1463 #interrupt-cells = <2>;
1464 interrupt-controller;
1465
1466 gpio-controller;
1467 #gpio-cells = <2>;
1468
1469 pinctrl-names = "default";
1470 pinctrl-0 = <&as3722_default>;
1471
1472 as3722_default: pinmux {
1473 gpio0 {
1474 pins = "gpio0";
1475 function = "gpio";
1476 bias-pull-down;
1477 };
1478
1479 gpio1_2_4_7 {
1480 pins = "gpio1", "gpio2", "gpio4", "gpio7";
1481 function = "gpio";
1482 bias-pull-up;
1483 };
1484
1485 gpio3_5_6 {
1486 pins = "gpio3", "gpio5", "gpio6";
1487 bias-high-impedance;
1488 };
1489 };
1490
1491 regulators {
1492 vsup-sd2-supply = <&vdd_5v0_sys>;
1493 vsup-sd3-supply = <&vdd_5v0_sys>;
1494 vsup-sd4-supply = <&vdd_5v0_sys>;
1495 vsup-sd5-supply = <&vdd_5v0_sys>;
1496 vin-ldo0-supply = <&vdd_1v35_lp0>;
1497 vin-ldo1-6-supply = <&vdd_3v3_run>;
1498 vin-ldo2-5-7-supply = <&vddio_1v8>;
1499 vin-ldo3-4-supply = <&vdd_3v3_sys>;
1500 vin-ldo9-10-supply = <&vdd_5v0_sys>;
1501 vin-ldo11-supply = <&vdd_3v3_run>;
1502
1503 vdd_cpu: sd0 {
1504 regulator-name = "+VDD_CPU_AP";
1505 regulator-min-microvolt = <700000>;
1506 regulator-max-microvolt = <1400000>;
1507 regulator-min-microamp = <3500000>;
1508 regulator-max-microamp = <3500000>;
1509 regulator-always-on;
1510 regulator-boot-on;
1511 ams,ext-control = <2>;
1512 };
1513
1514 sd1 {
1515 regulator-name = "+VDD_CORE";
1516 regulator-min-microvolt = <700000>;
1517 regulator-max-microvolt = <1350000>;
1518 regulator-min-microamp = <2500000>;
1519 regulator-max-microamp = <2500000>;
1520 regulator-always-on;
1521 regulator-boot-on;
1522 ams,ext-control = <1>;
1523 };
1524
1525 vdd_1v35_lp0: sd2 {
1526 regulator-name = "+1.35V_LP0(sd2)";
1527 regulator-min-microvolt = <1350000>;
1528 regulator-max-microvolt = <1350000>;
1529 regulator-always-on;
1530 regulator-boot-on;
1531 };
1532
1533 sd3 {
1534 regulator-name = "+1.35V_LP0(sd3)";
1535 regulator-min-microvolt = <1350000>;
1536 regulator-max-microvolt = <1350000>;
1537 regulator-always-on;
1538 regulator-boot-on;
1539 };
1540
1541 vdd_1v05_run: sd4 {
1542 regulator-name = "+1.05V_RUN";
1543 regulator-min-microvolt = <1050000>;
1544 regulator-max-microvolt = <1050000>;
1545 };
1546
1547 vddio_1v8: sd5 {
1548 regulator-name = "+1.8V_VDDIO";
1549 regulator-min-microvolt = <1800000>;
1550 regulator-max-microvolt = <1800000>;
1551 regulator-boot-on;
1552 regulator-always-on;
1553 };
1554
1555 vdd_gpu: sd6 {
1556 regulator-name = "+VDD_GPU_AP";
1557 regulator-min-microvolt = <650000>;
1558 regulator-max-microvolt = <1200000>;
1559 regulator-min-microamp = <3500000>;
1560 regulator-max-microamp = <3500000>;
1561 regulator-boot-on;
1562 regulator-always-on;
1563 };
1564
1565 avdd_1v05_run: ldo0 {
1566 regulator-name = "+1.05V_RUN_AVDD";
1567 regulator-min-microvolt = <1050000>;
1568 regulator-max-microvolt = <1050000>;
1569 regulator-boot-on;
1570 regulator-always-on;
1571 ams,ext-control = <1>;
1572 };
1573
1574 ldo1 {
1575 regulator-name = "+1.8V_RUN_CAM";
1576 regulator-min-microvolt = <1800000>;
1577 regulator-max-microvolt = <1800000>;
1578 };
1579
1580 ldo2 {
1581 regulator-name = "+1.2V_GEN_AVDD";
1582 regulator-min-microvolt = <1200000>;
1583 regulator-max-microvolt = <1200000>;
1584 regulator-boot-on;
1585 regulator-always-on;
1586 };
1587
1588 ldo3 {
1589 regulator-name = "+1.05V_LP0_VDD_RTC";
1590 regulator-min-microvolt = <1000000>;
1591 regulator-max-microvolt = <1000000>;
1592 regulator-boot-on;
1593 regulator-always-on;
1594 ams,enable-tracking;
1595 };
1596
1597 ldo4 {
1598 regulator-name = "+2.8V_RUN_CAM";
1599 regulator-min-microvolt = <2800000>;
1600 regulator-max-microvolt = <2800000>;
1601 };
1602
1603 ldo5 {
1604 regulator-name = "+1.2V_RUN_CAM_FRONT";
1605 regulator-min-microvolt = <1200000>;
1606 regulator-max-microvolt = <1200000>;
1607 };
1608
1609 vddio_sdmmc3: ldo6 {
1610 regulator-name = "+VDDIO_SDMMC3";
1611 regulator-min-microvolt = <1800000>;
1612 regulator-max-microvolt = <3300000>;
1613 };
1614
1615 ldo7 {
1616 regulator-name = "+1.05V_RUN_CAM_REAR";
1617 regulator-min-microvolt = <1050000>;
1618 regulator-max-microvolt = <1050000>;
1619 };
1620
1621 ldo9 {
1622 regulator-name = "+3.3V_RUN_TOUCH";
1623 regulator-min-microvolt = <2800000>;
1624 regulator-max-microvolt = <2800000>;
1625 };
1626
1627 ldo10 {
1628 regulator-name = "+2.8V_RUN_CAM_AF";
1629 regulator-min-microvolt = <2800000>;
1630 regulator-max-microvolt = <2800000>;
1631 };
1632
1633 ldo11 {
1634 regulator-name = "+1.8V_RUN_VPP_FUSE";
1635 regulator-min-microvolt = <1800000>;
1636 regulator-max-microvolt = <1800000>;
1637 };
1638 };
1639 };
1640 };
1641
1642 /* Expansion TS_SPI_* */
1643 spi@0,7000d400 {
1644 status = "okay";
1645 };
1646
1647 /* Internal SPI */
1648 spi@0,7000da00 {
1649 status = "okay";
1650 spi-max-frequency = <25000000>;
1651 spi-flash@0 {
1652 compatible = "winbond,w25q32dw";
1653 reg = <0>;
1654 spi-max-frequency = <20000000>;
1655 };
1656 };
1657
1658 pmc@0,7000e400 {
1659 nvidia,invert-interrupt;
1660 nvidia,suspend-mode = <1>;
1661 nvidia,cpu-pwr-good-time = <500>;
1662 nvidia,cpu-pwr-off-time = <300>;
1663 nvidia,core-pwr-good-time = <641 3845>;
1664 nvidia,core-pwr-off-time = <61036>;
1665 nvidia,core-power-req-active-high;
1666 nvidia,sys-clock-req-active-high;
1667
1668 i2c-thermtrip {
1669 nvidia,i2c-controller-id = <4>;
1670 nvidia,bus-addr = <0x40>;
1671 nvidia,reg-addr = <0x36>;
1672 nvidia,reg-data = <0x2>;
1673 };
1674 };
1675
1676 /* Serial ATA */
1677 sata@0,70020000 {
1678 status = "okay";
1679
1680 hvdd-supply = <&vdd_3v3_lp0>;
1681 vddio-supply = <&vdd_1v05_run>;
1682 avdd-supply = <&vdd_1v05_run>;
1683
1684 target-5v-supply = <&vdd_5v0_sata>;
1685 target-12v-supply = <&vdd_12v0_sata>;
1686 };
1687
1688 hda@0,70030000 {
1689 status = "okay";
1690 };
1691
1692 padctl@0,7009f000 {
1693 pinctrl-0 = <&padctl_default>;
1694 pinctrl-names = "default";
1695
1696 padctl_default: pinmux {
1697 usb3 {
1698 nvidia,lanes = "pcie-0", "pcie-1";
1699 nvidia,function = "usb3";
1700 nvidia,iddq = <0>;
1701 };
1702
1703 pcie {
1704 nvidia,lanes = "pcie-2", "pcie-3",
1705 "pcie-4";
1706 nvidia,function = "pcie";
1707 nvidia,iddq = <0>;
1708 };
1709
1710 sata {
1711 nvidia,lanes = "sata-0";
1712 nvidia,function = "sata";
1713 nvidia,iddq = <0>;
1714 };
1715 };
1716 };
1717
1718 /* SD card */
1719 sdhci@0,700b0400 {
1720 status = "okay";
1721 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1722 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1723 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1724 bus-width = <4>;
1725 vqmmc-supply = <&vddio_sdmmc3>;
1726 };
1727
1728 /* eMMC */
1729 sdhci@0,700b0600 {
1730 status = "okay";
1731 bus-width = <8>;
1732 non-removable;
1733 };
1734
1735 /* CPU DFLL clock */
1736 clock@0,70110000 {
1737 status = "okay";
1738 vdd-cpu-supply = <&vdd_cpu>;
1739 nvidia,i2c-fs-rate = <400000>;
1740 };
1741
1742 ahub@0,70300000 {
1743 i2s@0,70301100 {
1744 status = "okay";
1745 };
1746 };
1747
1748 /* mini-PCIe USB */
1749 usb@0,7d004000 {
1750 status = "okay";
1751 };
1752
1753 usb-phy@0,7d004000 {
1754 status = "okay";
1755 };
1756
1757 /* USB A connector */
1758 usb@0,7d008000 {
1759 status = "okay";
1760 };
1761
1762 usb-phy@0,7d008000 {
1763 status = "okay";
1764 vbus-supply = <&vdd_usb3_vbus>;
1765 };
1766
1767 clocks {
1768 compatible = "simple-bus";
1769 #address-cells = <1>;
1770 #size-cells = <0>;
1771
1772 clk32k_in: clock@0 {
1773 compatible = "fixed-clock";
1774 reg = <0>;
1775 #clock-cells = <0>;
1776 clock-frequency = <32768>;
1777 };
1778 };
1779
1780 cpus {
1781 cpu@0 {
1782 vdd-cpu-supply = <&vdd_cpu>;
1783 };
1784 };
1785
1786 gpio-keys {
1787 compatible = "gpio-keys";
1788
1789 power {
1790 label = "Power";
1791 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1792 linux,code = <KEY_POWER>;
1793 debounce-interval = <10>;
1794 wakeup-source;
1795 };
1796 };
1797
1798 regulators {
1799 compatible = "simple-bus";
1800 #address-cells = <1>;
1801 #size-cells = <0>;
1802
1803 vdd_mux: regulator@0 {
1804 compatible = "regulator-fixed";
1805 reg = <0>;
1806 regulator-name = "+VDD_MUX";
1807 regulator-min-microvolt = <12000000>;
1808 regulator-max-microvolt = <12000000>;
1809 regulator-always-on;
1810 regulator-boot-on;
1811 };
1812
1813 vdd_5v0_sys: regulator@1 {
1814 compatible = "regulator-fixed";
1815 reg = <1>;
1816 regulator-name = "+5V_SYS";
1817 regulator-min-microvolt = <5000000>;
1818 regulator-max-microvolt = <5000000>;
1819 regulator-always-on;
1820 regulator-boot-on;
1821 vin-supply = <&vdd_mux>;
1822 };
1823
1824 vdd_3v3_sys: regulator@2 {
1825 compatible = "regulator-fixed";
1826 reg = <2>;
1827 regulator-name = "+3.3V_SYS";
1828 regulator-min-microvolt = <3300000>;
1829 regulator-max-microvolt = <3300000>;
1830 regulator-always-on;
1831 regulator-boot-on;
1832 vin-supply = <&vdd_mux>;
1833 };
1834
1835 vdd_3v3_run: regulator@3 {
1836 compatible = "regulator-fixed";
1837 reg = <3>;
1838 regulator-name = "+3.3V_RUN";
1839 regulator-min-microvolt = <3300000>;
1840 regulator-max-microvolt = <3300000>;
1841 regulator-always-on;
1842 regulator-boot-on;
1843 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1844 enable-active-high;
1845 vin-supply = <&vdd_3v3_sys>;
1846 };
1847
1848 vdd_3v3_hdmi: regulator@4 {
1849 compatible = "regulator-fixed";
1850 reg = <4>;
1851 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1852 regulator-min-microvolt = <3300000>;
1853 regulator-max-microvolt = <3300000>;
1854 vin-supply = <&vdd_3v3_run>;
1855 };
1856
1857 vdd_usb1_vbus: regulator@7 {
1858 compatible = "regulator-fixed";
1859 reg = <7>;
1860 regulator-name = "+USB0_VBUS_SW";
1861 regulator-min-microvolt = <5000000>;
1862 regulator-max-microvolt = <5000000>;
1863 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1864 enable-active-high;
1865 gpio-open-drain;
1866 vin-supply = <&vdd_5v0_sys>;
1867 };
1868
1869 vdd_usb3_vbus: regulator@8 {
1870 compatible = "regulator-fixed";
1871 reg = <8>;
1872 regulator-name = "+5V_USB_HS";
1873 regulator-min-microvolt = <5000000>;
1874 regulator-max-microvolt = <5000000>;
1875 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1876 enable-active-high;
1877 gpio-open-drain;
1878 vin-supply = <&vdd_5v0_sys>;
1879 };
1880
1881 vdd_3v3_lp0: regulator@10 {
1882 compatible = "regulator-fixed";
1883 reg = <10>;
1884 regulator-name = "+3.3V_LP0";
1885 regulator-min-microvolt = <3300000>;
1886 regulator-max-microvolt = <3300000>;
1887 regulator-always-on;
1888 regulator-boot-on;
1889 gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1890 enable-active-high;
1891 vin-supply = <&vdd_3v3_sys>;
1892 };
1893
1894 vdd_hdmi_pll: regulator@11 {
1895 compatible = "regulator-fixed";
1896 reg = <11>;
1897 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1898 regulator-min-microvolt = <1050000>;
1899 regulator-max-microvolt = <1050000>;
1900 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1901 vin-supply = <&vdd_1v05_run>;
1902 };
1903
1904 vdd_5v0_hdmi: regulator@12 {
1905 compatible = "regulator-fixed";
1906 reg = <12>;
1907 regulator-name = "+5V_HDMI_CON";
1908 regulator-min-microvolt = <5000000>;
1909 regulator-max-microvolt = <5000000>;
1910 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1911 enable-active-high;
1912 vin-supply = <&vdd_5v0_sys>;
1913 };
1914
1915 /* Molex power connector */
1916 vdd_5v0_sata: regulator@13 {
1917 compatible = "regulator-fixed";
1918 reg = <13>;
1919 regulator-name = "+5V_SATA";
1920 regulator-min-microvolt = <5000000>;
1921 regulator-max-microvolt = <5000000>;
1922 gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
1923 enable-active-high;
1924 vin-supply = <&vdd_5v0_sys>;
1925 };
1926
1927 vdd_12v0_sata: regulator@14 {
1928 compatible = "regulator-fixed";
1929 reg = <14>;
1930 regulator-name = "+12V_SATA";
1931 regulator-min-microvolt = <12000000>;
1932 regulator-max-microvolt = <12000000>;
1933 gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
1934 enable-active-high;
1935 vin-supply = <&vdd_mux>;
1936 };
1937 };
1938
1939 sound {
1940 compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
1941 "nvidia,tegra-audio-rt5640";
1942 nvidia,model = "NVIDIA Tegra Jetson TK1";
1943
1944 nvidia,audio-routing =
1945 "Headphones", "HPOR",
1946 "Headphones", "HPOL",
1947 "Mic Jack", "MICBIAS1",
1948 "IN2P", "Mic Jack";
1949
1950 nvidia,i2s-controller = <&tegra_i2s1>;
1951 nvidia,audio-codec = <&rt5639>;
1952
1953 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
1954
1955 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1956 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1957 <&tegra_car TEGRA124_CLK_EXTERN1>;
1958 clock-names = "pll_a", "pll_a_out0", "mclk";
1959 };
1960
1961 thermal-zones {
1962 cpu {
1963 trips {
1964 trip@0 {
1965 temperature = <101000>;
1966 hysteresis = <0>;
1967 type = "critical";
1968 };
1969 };
1970
1971 cooling-maps {
1972 /* There are currently no cooling maps because there are no cooling devices */
1973 };
1974 };
1975
1976 mem {
1977 trips {
1978 trip@0 {
1979 temperature = <101000>;
1980 hysteresis = <0>;
1981 type = "critical";
1982 };
1983 };
1984
1985 cooling-maps {
1986 /* There are currently no cooling maps because there are no cooling devices */
1987 };
1988 };
1989
1990 gpu {
1991 trips {
1992 trip@0 {
1993 temperature = <101000>;
1994 hysteresis = <0>;
1995 type = "critical";
1996 };
1997 };
1998
1999 cooling-maps {
2000 /* There are currently no cooling maps because there are no cooling devices */
2001 };
2002 };
2003 };
2004 };
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