arch/arm/boot/dts/tegra20-colibri-512.dtsi

   1 #include "tegra20.dtsi"
   2
   3 / {
   4         model = "Toradex Colibri T20 512MB";
   5         compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
   6
   7         memory {
   8                 reg = <0x00000000 0x20000000>;
   9         };
  10
  11         host1x {
  12                 hdmi {
  13                         vdd-supply = <&hdmi_vdd_reg>;
  14                         pll-supply = <&hdmi_pll_reg>;
  15
  16                         nvidia,ddc-i2c-bus = <&i2c_ddc>;
  17                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  18                                 GPIO_ACTIVE_HIGH>;
  19                 };
  20         };
  21
  22         pinmux {
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&state_default>;
  25
  26                 state_default: pinmux {
  27                         audio_refclk {
  28                                 nvidia,pins = "cdev1";
  29                                 nvidia,function = "plla_out";
  30                                 nvidia,pull = <0>;
  31                                 nvidia,tristate = <0>;
  32                         };
  33                         crt {
  34                                 nvidia,pins = "crtp";
  35                                 nvidia,function = "crt";
  36                                 nvidia,pull = <0>;
  37                                 nvidia,tristate = <1>;
  38                         };
  39                         dap3 {
  40                                 nvidia,pins = "dap3";
  41                                 nvidia,function = "dap3";
  42                                 nvidia,pull = <0>;
  43                                 nvidia,tristate = <0>;
  44                         };
  45                         displaya {
  46                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3",
  47                                         "ld4", "ld5", "ld6", "ld7", "ld8",
  48                                         "ld9", "ld10", "ld11", "ld12", "ld13",
  49                                         "ld14", "ld15", "ld16", "ld17",
  50                                         "lhs", "lpw0", "lpw2", "lsc0",
  51                                         "lsc1", "lsck", "lsda", "lspi", "lvs";
  52                                 nvidia,function = "displaya";
  53                                 nvidia,tristate = <1>;
  54                         };
  55                         gpio_dte {
  56                                 nvidia,pins = "dte";
  57                                 nvidia,function = "rsvd1";
  58                                 nvidia,pull = <0>;
  59                                 nvidia,tristate = <0>;
  60                         };
  61                         gpio_gmi {
  62                                 nvidia,pins = "ata", "atc", "atd", "ate",
  63                                         "dap1", "dap2", "dap4", "gpu", "irrx",
  64                                         "irtx", "spia", "spib", "spic";
  65                                 nvidia,function = "gmi";
  66                                 nvidia,pull = <0>;
  67                                 nvidia,tristate = <0>;
  68                         };
  69                         gpio_pta {
  70                                 nvidia,pins = "pta";
  71                                 nvidia,function = "rsvd4";
  72                                 nvidia,pull = <0>;
  73                                 nvidia,tristate = <0>;
  74                         };
  75                         gpio_uac {
  76                                 nvidia,pins = "uac";
  77                                 nvidia,function = "rsvd2";
  78                                 nvidia,pull = <0>;
  79                                 nvidia,tristate = <0>;
  80                         };
  81                         hdint {
  82                                 nvidia,pins = "hdint";
  83                                 nvidia,function = "hdmi";
  84                                 nvidia,tristate = <1>;
  85                         };
  86                         i2c1 {
  87                                 nvidia,pins = "rm";
  88                                 nvidia,function = "i2c1";
  89                                 nvidia,pull = <0>;
  90                                 nvidia,tristate = <1>;
  91                         };
  92                         i2c3 {
  93                                 nvidia,pins = "dtf";
  94                                 nvidia,function = "i2c3";
  95                                 nvidia,pull = <0>;
  96                                 nvidia,tristate = <1>;
  97                         };
  98                         i2cddc {
  99                                 nvidia,pins = "ddc";
 100                                 nvidia,function = "i2c2";
 101                                 nvidia,pull = <2>;
 102                                 nvidia,tristate = <1>;
 103                         };
 104                         i2cp {
 105                                 nvidia,pins = "i2cp";
 106                                 nvidia,function = "i2cp";
 107                                 nvidia,pull = <0>;
 108                                 nvidia,tristate = <0>;
 109                         };
 110                         irda {
 111                                 nvidia,pins = "uad";
 112                                 nvidia,function = "irda";
 113                                 nvidia,pull = <0>;
 114                                 nvidia,tristate = <1>;
 115                         };
 116                         nand {
 117                                 nvidia,pins = "kbca", "kbcc", "kbcd",
 118                                         "kbce", "kbcf";
 119                                 nvidia,function = "nand";
 120                                 nvidia,pull = <0>;
 121                                 nvidia,tristate = <0>;
 122                         };
 123                         owc {
 124                                 nvidia,pins = "owc";
 125                                 nvidia,function = "owr";
 126                                 nvidia,pull = <0>;
 127                                 nvidia,tristate = <1>;
 128                         };
 129                         pmc {
 130                                 nvidia,pins = "pmc";
 131                                 nvidia,function = "pwr_on";
 132                                 nvidia,tristate = <0>;
 133                         };
 134                         pwm {
 135                                 nvidia,pins = "sdb", "sdc", "sdd";
 136                                 nvidia,function = "pwm";
 137                                 nvidia,tristate = <1>;
 138                         };
 139                         sdio4 {
 140                                 nvidia,pins = "atb", "gma", "gme";
 141                                 nvidia,function = "sdio4";
 142                                 nvidia,pull = <0>;
 143                                 nvidia,tristate = <1>;
 144                         };
 145                         spi1 {
 146                                 nvidia,pins = "spid", "spie", "spif";
 147                                 nvidia,function = "spi1";
 148                                 nvidia,pull = <0>;
 149                                 nvidia,tristate = <1>;
 150                         };
 151                         spi4 {
 152                                 nvidia,pins = "slxa", "slxc", "slxd", "slxk";
 153                                 nvidia,function = "spi4";
 154                                 nvidia,pull = <0>;
 155                                 nvidia,tristate = <1>;
 156                         };
 157                         uarta {
 158                                 nvidia,pins = "sdio1";
 159                                 nvidia,function = "uarta";
 160                                 nvidia,pull = <0>;
 161                                 nvidia,tristate = <1>;
 162                         };
 163                         uartd {
 164                                 nvidia,pins = "gmc";
 165                                 nvidia,function = "uartd";
 166                                 nvidia,pull = <0>;
 167                                 nvidia,tristate = <1>;
 168                         };
 169                         ulpi {
 170                                 nvidia,pins = "uaa", "uab", "uda";
 171                                 nvidia,function = "ulpi";
 172                                 nvidia,pull = <0>;
 173                                 nvidia,tristate = <0>;
 174                         };
 175                         ulpi_refclk {
 176                                 nvidia,pins = "cdev2";
 177                                 nvidia,function = "pllp_out4";
 178                                 nvidia,pull = <0>;
 179                                 nvidia,tristate = <0>;
 180                         };
 181                         usb_gpio {
 182                                 nvidia,pins = "spig", "spih";
 183                                 nvidia,function = "spi2_alt";
 184                                 nvidia,pull = <0>;
 185                                 nvidia,tristate = <0>;
 186                         };
 187                         vi {
 188                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 189                                 nvidia,function = "vi";
 190                                 nvidia,pull = <0>;
 191                                 nvidia,tristate = <1>;
 192                         };
 193                         vi_sc {
 194                                 nvidia,pins = "csus";
 195                                 nvidia,function = "vi_sensor_clk";
 196                                 nvidia,pull = <0>;
 197                                 nvidia,tristate = <1>;
 198                         };
 199                 };
 200         };
 201
 202         i2c@7000c000 {
 203                 clock-frequency = <400000>;
 204         };
 205
 206         i2c_ddc: i2c@7000c400 {
 207                 clock-frequency = <100000>;
 208         };
 209
 210         i2c@7000c500 {
 211                 clock-frequency = <400000>;
 212         };
 213
 214         i2c@7000d000 {
 215                 status = "okay";
 216                 clock-frequency = <400000>;
 217
 218                 pmic: tps6586x@34 {
 219                         compatible = "ti,tps6586x";
 220                         reg = <0x34>;
 221                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 222
 223                         ti,system-power-controller;
 224
 225                         #gpio-cells = <2>;
 226                         gpio-controller;
 227
 228                         sys-supply = <&vdd_5v0_reg>;
 229                         vin-sm0-supply = <&sys_reg>;
 230                         vin-sm1-supply = <&sys_reg>;
 231                         vin-sm2-supply = <&sys_reg>;
 232                         vinldo01-supply = <&sm2_reg>;
 233                         vinldo23-supply = <&sm2_reg>;
 234                         vinldo4-supply = <&sm2_reg>;
 235                         vinldo678-supply = <&sm2_reg>;
 236                         vinldo9-supply = <&sm2_reg>;
 237
 238                         regulators {
 239                                 #address-cells = <1>;
 240                                 #size-cells = <0>;
 241
 242                                 sys_reg: regulator@0 {
 243                                         reg = <0>;
 244                                         regulator-compatible = "sys";
 245                                         regulator-name = "vdd_sys";
 246                                         regulator-always-on;
 247                                 };
 248
 249                                 regulator@1 {
 250                                         reg = <1>;
 251                                         regulator-compatible = "sm0";
 252                                         regulator-name = "vdd_sm0,vdd_core";
 253                                         regulator-min-microvolt = <1275000>;
 254                                         regulator-max-microvolt = <1275000>;
 255                                         regulator-always-on;
 256                                 };
 257
 258                                 regulator@2 {
 259                                         reg = <2>;
 260                                         regulator-compatible = "sm1";
 261                                         regulator-name = "vdd_sm1,vdd_cpu";
 262                                         regulator-min-microvolt = <1100000>;
 263                                         regulator-max-microvolt = <1100000>;
 264                                         regulator-always-on;
 265                                 };
 266
 267                                 sm2_reg: regulator@3 {
 268                                         reg = <3>;
 269                                         regulator-compatible = "sm2";
 270                                         regulator-name = "vdd_sm2,vin_ldo*";
 271                                         regulator-min-microvolt = <3700000>;
 272                                         regulator-max-microvolt = <3700000>;
 273                                         regulator-always-on;
 274                                 };
 275
 276                                 /* LDO0 is not connected to anything */
 277
 278                                 regulator@5 {
 279                                         reg = <5>;
 280                                         regulator-compatible = "ldo1";
 281                                         regulator-name = "vdd_ldo1,avdd_pll*";
 282                                         regulator-min-microvolt = <1100000>;
 283                                         regulator-max-microvolt = <1100000>;
 284                                         regulator-always-on;
 285                                 };
 286
 287                                 regulator@6 {
 288                                         reg = <6>;
 289                                         regulator-compatible = "ldo2";
 290                                         regulator-name = "vdd_ldo2,vdd_rtc";
 291                                         regulator-min-microvolt = <1200000>;
 292                                         regulator-max-microvolt = <1200000>;
 293                                 };
 294
 295                                 /* LDO3 is not connected to anything */
 296
 297                                 regulator@8 {
 298                                         reg = <8>;
 299                                         regulator-compatible = "ldo4";
 300                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 301                                         regulator-min-microvolt = <1800000>;
 302                                         regulator-max-microvolt = <1800000>;
 303                                         regulator-always-on;
 304                                 };
 305
 306                                 ldo5_reg: regulator@9 {
 307                                         reg = <9>;
 308                                         regulator-compatible = "ldo5";
 309                                         regulator-name = "vdd_ldo5,vdd_fuse";
 310                                         regulator-min-microvolt = <3300000>;
 311                                         regulator-max-microvolt = <3300000>;
 312                                         regulator-always-on;
 313                                 };
 314
 315                                 regulator@10 {
 316                                         reg = <10>;
 317                                         regulator-compatible = "ldo6";
 318                                         regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
 319                                         regulator-min-microvolt = <1800000>;
 320                                         regulator-max-microvolt = <1800000>;
 321                                 };
 322
 323                                 hdmi_vdd_reg: regulator@11 {
 324                                         reg = <11>;
 325                                         regulator-compatible = "ldo7";
 326                                         regulator-name = "vdd_ldo7,avdd_hdmi";
 327                                         regulator-min-microvolt = <3300000>;
 328                                         regulator-max-microvolt = <3300000>;
 329                                 };
 330
 331                                 hdmi_pll_reg: regulator@12 {
 332                                         reg = <12>;
 333                                         regulator-compatible = "ldo8";
 334                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 335                                         regulator-min-microvolt = <1800000>;
 336                                         regulator-max-microvolt = <1800000>;
 337                                 };
 338
 339                                 regulator@13 {
 340                                         reg = <13>;
 341                                         regulator-compatible = "ldo9";
 342                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 343                                         regulator-min-microvolt = <2850000>;
 344                                         regulator-max-microvolt = <2850000>;
 345                                         regulator-always-on;
 346                                 };
 347
 348                                 regulator@14 {
 349                                         reg = <14>;
 350                                         regulator-compatible = "ldo_rtc";
 351                                         regulator-name = "vdd_rtc_out,vdd_cell";
 352                                         regulator-min-microvolt = <3300000>;
 353                                         regulator-max-microvolt = <3300000>;
 354                                         regulator-always-on;
 355                                 };
 356                         };
 357                 };
 358
 359                 temperature-sensor@4c {
 360                         compatible = "national,lm95245";
 361                         reg = <0x4c>;
 362                 };
 363         };
 364
 365         pmc {
 366                 nvidia,suspend-mode = <2>;
 367                 nvidia,cpu-pwr-good-time = <5000>;
 368                 nvidia,cpu-pwr-off-time = <5000>;
 369                 nvidia,core-pwr-good-time = <3845 3845>;
 370                 nvidia,core-pwr-off-time = <3875>;
 371                 nvidia,sys-clock-req-active-high;
 372         };
 373
 374         memory-controller@7000f400 {
 375                 emc-table@83250 {
 376                         reg = <83250>;
 377                         compatible = "nvidia,tegra20-emc-table";
 378                         clock-frequency = <83250>;
 379                         nvidia,emc-registers =   <0x00000005 0x00000011
 380                                 0x00000004 0x00000002 0x00000004 0x00000004
 381                                 0x00000001 0x0000000a 0x00000002 0x00000002
 382                                 0x00000001 0x00000001 0x00000003 0x00000004
 383                                 0x00000003 0x00000009 0x0000000c 0x0000025f
 384                                 0x00000000 0x00000003 0x00000003 0x00000002
 385                                 0x00000002 0x00000001 0x00000008 0x000000c8
 386                                 0x00000003 0x00000005 0x00000003 0x0000000c
 387                                 0x00000002 0x00000000 0x00000000 0x00000002
 388                                 0x00000000 0x00000000 0x00000083 0x00520006
 389                                 0x00000010 0x00000008 0x00000000 0x00000000
 390                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 391                 };
 392                 emc-table@133200 {
 393                         reg = <133200>;
 394                         compatible = "nvidia,tegra20-emc-table";
 395                         clock-frequency = <133200>;
 396                         nvidia,emc-registers =   <0x00000008 0x00000019
 397                                 0x00000006 0x00000002 0x00000004 0x00000004
 398                                 0x00000001 0x0000000a 0x00000002 0x00000002
 399                                 0x00000002 0x00000001 0x00000003 0x00000004
 400                                 0x00000003 0x00000009 0x0000000c 0x0000039f
 401                                 0x00000000 0x00000003 0x00000003 0x00000002
 402                                 0x00000002 0x00000001 0x00000008 0x000000c8
 403                                 0x00000003 0x00000007 0x00000003 0x0000000c
 404                                 0x00000002 0x00000000 0x00000000 0x00000002
 405                                 0x00000000 0x00000000 0x00000083 0x00510006
 406                                 0x00000010 0x00000008 0x00000000 0x00000000
 407                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 408                 };
 409                 emc-table@166500 {
 410                         reg = <166500>;
 411                         compatible = "nvidia,tegra20-emc-table";
 412                         clock-frequency = <166500>;
 413                         nvidia,emc-registers =   <0x0000000a 0x00000021
 414                                 0x00000008 0x00000003 0x00000004 0x00000004
 415                                 0x00000002 0x0000000a 0x00000003 0x00000003
 416                                 0x00000002 0x00000001 0x00000003 0x00000004
 417                                 0x00000003 0x00000009 0x0000000c 0x000004df
 418                                 0x00000000 0x00000003 0x00000003 0x00000003
 419                                 0x00000003 0x00000001 0x00000009 0x000000c8
 420                                 0x00000003 0x00000009 0x00000004 0x0000000c
 421                                 0x00000002 0x00000000 0x00000000 0x00000002
 422                                 0x00000000 0x00000000 0x00000083 0x004f0006
 423                                 0x00000010 0x00000008 0x00000000 0x00000000
 424                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 425                 };
 426                 emc-table@333000 {
 427                         reg = <333000>;
 428                         compatible = "nvidia,tegra20-emc-table";
 429                         clock-frequency = <333000>;
 430                         nvidia,emc-registers =   <0x00000014 0x00000041
 431                                 0x0000000f 0x00000005 0x00000004 0x00000005
 432                                 0x00000003 0x0000000a 0x00000005 0x00000005
 433                                 0x00000004 0x00000001 0x00000003 0x00000004
 434                                 0x00000003 0x00000009 0x0000000c 0x000009ff
 435                                 0x00000000 0x00000003 0x00000003 0x00000005
 436                                 0x00000005 0x00000001 0x0000000e 0x000000c8
 437                                 0x00000003 0x00000011 0x00000006 0x0000000c
 438                                 0x00000002 0x00000000 0x00000000 0x00000002
 439                                 0x00000000 0x00000000 0x00000083 0x00380006
 440                                 0x00000010 0x00000008 0x00000000 0x00000000
 441                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 442                 };
 443         };
 444
 445         ac97: ac97 {
 446                 status = "okay";
 447                 nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 448                         GPIO_ACTIVE_HIGH>;
 449                 nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)
 450                         GPIO_ACTIVE_HIGH>;
 451         };
 452
 453         usb@c5004000 {
 454                 status = "okay";
 455                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 456                         GPIO_ACTIVE_LOW>;
 457         };
 458
 459         usb-phy@c5004000 {
 460                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 461                         GPIO_ACTIVE_LOW>;
 462         };
 463
 464         sdhci@c8000600 {
 465                 cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
 466         };
 467
 468         clocks {
 469                 compatible = "simple-bus";
 470                 #address-cells = <1>;
 471                 #size-cells = <0>;
 472
 473                 clk32k_in: clock {
 474                         compatible = "fixed-clock";
 475                         reg=<0>;
 476                         #clock-cells = <0>;
 477                         clock-frequency = <32768>;
 478                 };
 479         };
 480
 481         sound {
 482                 compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
 483                                  "nvidia,tegra-audio-wm9712";
 484                 nvidia,model = "Colibri T20 AC97 Audio";
 485
 486                 nvidia,audio-routing =
 487                         "Headphone", "HPOUTL",
 488                         "Headphone", "HPOUTR",
 489                         "LineIn", "LINEINL",
 490                         "LineIn", "LINEINR",
 491                         "Mic", "MIC1";
 492
 493                 nvidia,ac97-controller = <&ac97>;
 494
 495                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 496                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 497                          <&tegra_car TEGRA20_CLK_CDEV1>;
 498                 clock-names = "pll_a", "pll_a_out0", "mclk";
 499         };
 500
 501         regulators {
 502                 compatible = "simple-bus";
 503                 #address-cells = <1>;
 504                 #size-cells = <0>;
 505
 506                 vdd_5v0_reg: regulator@100 {
 507                         compatible = "regulator-fixed";
 508                         reg = <100>;
 509                         regulator-name = "vdd_5v0";
 510                         regulator-min-microvolt = <5000000>;
 511                         regulator-max-microvolt = <5000000>;
 512                         regulator-always-on;
 513                 };
 514
 515                 regulator@101 {
 516                         compatible = "regulator-fixed";
 517                         reg = <101>;
 518                         regulator-name = "internal_usb";
 519                         regulator-min-microvolt = <5000000>;
 520                         regulator-max-microvolt = <5000000>;
 521                         enable-active-high;
 522                         regulator-boot-on;
 523                         regulator-always-on;
 524                         gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
 525                 };
 526         };
 527 };