0eca40d2be023dacf56681bddf1626bcfcb3803a
[deliverable/linux.git] / arch / arm / boot / dts / tegra20-harmony.dts
1 /dts-v1/;
2
3 /include/ "tegra20.dtsi"
4
5 / {
6 model = "NVIDIA Tegra2 Harmony evaluation board";
7 compatible = "nvidia,harmony", "nvidia,tegra20";
8
9 memory {
10 reg = <0x00000000 0x40000000>;
11 };
12
13 pinmux {
14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
16
17 state_default: pinmux {
18 ata {
19 nvidia,pins = "ata";
20 nvidia,function = "ide";
21 };
22 atb {
23 nvidia,pins = "atb", "gma", "gme";
24 nvidia,function = "sdio4";
25 };
26 atc {
27 nvidia,pins = "atc";
28 nvidia,function = "nand";
29 };
30 atd {
31 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
32 "spia", "spib", "spic";
33 nvidia,function = "gmi";
34 };
35 cdev1 {
36 nvidia,pins = "cdev1";
37 nvidia,function = "plla_out";
38 };
39 cdev2 {
40 nvidia,pins = "cdev2";
41 nvidia,function = "pllp_out4";
42 };
43 crtp {
44 nvidia,pins = "crtp";
45 nvidia,function = "crt";
46 };
47 csus {
48 nvidia,pins = "csus";
49 nvidia,function = "vi_sensor_clk";
50 };
51 dap1 {
52 nvidia,pins = "dap1";
53 nvidia,function = "dap1";
54 };
55 dap2 {
56 nvidia,pins = "dap2";
57 nvidia,function = "dap2";
58 };
59 dap3 {
60 nvidia,pins = "dap3";
61 nvidia,function = "dap3";
62 };
63 dap4 {
64 nvidia,pins = "dap4";
65 nvidia,function = "dap4";
66 };
67 ddc {
68 nvidia,pins = "ddc";
69 nvidia,function = "i2c2";
70 };
71 dta {
72 nvidia,pins = "dta", "dtd";
73 nvidia,function = "sdio2";
74 };
75 dtb {
76 nvidia,pins = "dtb", "dtc", "dte";
77 nvidia,function = "rsvd1";
78 };
79 dtf {
80 nvidia,pins = "dtf";
81 nvidia,function = "i2c3";
82 };
83 gmc {
84 nvidia,pins = "gmc";
85 nvidia,function = "uartd";
86 };
87 gpu7 {
88 nvidia,pins = "gpu7";
89 nvidia,function = "rtck";
90 };
91 gpv {
92 nvidia,pins = "gpv", "slxa", "slxk";
93 nvidia,function = "pcie";
94 };
95 hdint {
96 nvidia,pins = "hdint", "pta";
97 nvidia,function = "hdmi";
98 };
99 i2cp {
100 nvidia,pins = "i2cp";
101 nvidia,function = "i2cp";
102 };
103 irrx {
104 nvidia,pins = "irrx", "irtx";
105 nvidia,function = "uarta";
106 };
107 kbca {
108 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
109 "kbce", "kbcf";
110 nvidia,function = "kbc";
111 };
112 lcsn {
113 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
114 "ld3", "ld4", "ld5", "ld6", "ld7",
115 "ld8", "ld9", "ld10", "ld11", "ld12",
116 "ld13", "ld14", "ld15", "ld16", "ld17",
117 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
118 "lhs", "lm0", "lm1", "lpp", "lpw0",
119 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
120 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
121 "lvs";
122 nvidia,function = "displaya";
123 };
124 owc {
125 nvidia,pins = "owc", "spdi", "spdo", "uac";
126 nvidia,function = "rsvd2";
127 };
128 pmc {
129 nvidia,pins = "pmc";
130 nvidia,function = "pwr_on";
131 };
132 rm {
133 nvidia,pins = "rm";
134 nvidia,function = "i2c1";
135 };
136 sdb {
137 nvidia,pins = "sdb", "sdc", "sdd";
138 nvidia,function = "pwm";
139 };
140 sdio1 {
141 nvidia,pins = "sdio1";
142 nvidia,function = "sdio1";
143 };
144 slxc {
145 nvidia,pins = "slxc", "slxd";
146 nvidia,function = "spdif";
147 };
148 spid {
149 nvidia,pins = "spid", "spie", "spif";
150 nvidia,function = "spi1";
151 };
152 spig {
153 nvidia,pins = "spig", "spih";
154 nvidia,function = "spi2_alt";
155 };
156 uaa {
157 nvidia,pins = "uaa", "uab", "uda";
158 nvidia,function = "ulpi";
159 };
160 uad {
161 nvidia,pins = "uad";
162 nvidia,function = "irda";
163 };
164 uca {
165 nvidia,pins = "uca", "ucb";
166 nvidia,function = "uartc";
167 };
168 conf_ata {
169 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
170 "cdev1", "cdev2", "dap1", "dtb", "gma",
171 "gmb", "gmc", "gmd", "gme", "gpu7",
172 "gpv", "i2cp", "pta", "rm", "slxa",
173 "slxk", "spia", "spib", "uac";
174 nvidia,pull = <0>;
175 nvidia,tristate = <0>;
176 };
177 conf_ck32 {
178 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
179 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
180 nvidia,pull = <0>;
181 };
182 conf_csus {
183 nvidia,pins = "csus", "spid", "spif";
184 nvidia,pull = <1>;
185 nvidia,tristate = <1>;
186 };
187 conf_crtp {
188 nvidia,pins = "crtp", "dap2", "dap3", "dap4",
189 "dtc", "dte", "dtf", "gpu", "sdio1",
190 "slxc", "slxd", "spdi", "spdo", "spig",
191 "uda";
192 nvidia,pull = <0>;
193 nvidia,tristate = <1>;
194 };
195 conf_ddc {
196 nvidia,pins = "ddc", "dta", "dtd", "kbca",
197 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
198 "sdc";
199 nvidia,pull = <2>;
200 nvidia,tristate = <0>;
201 };
202 conf_hdint {
203 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
204 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
205 "lvp0", "owc", "sdb";
206 nvidia,tristate = <1>;
207 };
208 conf_irrx {
209 nvidia,pins = "irrx", "irtx", "sdd", "spic",
210 "spie", "spih", "uaa", "uab", "uad",
211 "uca", "ucb";
212 nvidia,pull = <2>;
213 nvidia,tristate = <1>;
214 };
215 conf_lc {
216 nvidia,pins = "lc", "ls";
217 nvidia,pull = <2>;
218 };
219 conf_ld0 {
220 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
221 "ld5", "ld6", "ld7", "ld8", "ld9",
222 "ld10", "ld11", "ld12", "ld13", "ld14",
223 "ld15", "ld16", "ld17", "ldi", "lhp0",
224 "lhp1", "lhp2", "lhs", "lm0", "lpp",
225 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
226 "lvs", "pmc";
227 nvidia,tristate = <0>;
228 };
229 conf_ld17_0 {
230 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
231 "ld23_22";
232 nvidia,pull = <1>;
233 };
234 };
235 };
236
237 i2s@70002800 {
238 status = "okay";
239 };
240
241 serial@70006300 {
242 status = "okay";
243 clock-frequency = <216000000>;
244 };
245
246 i2c@7000c000 {
247 status = "okay";
248 clock-frequency = <400000>;
249
250 wm8903: wm8903@1a {
251 compatible = "wlf,wm8903";
252 reg = <0x1a>;
253 interrupt-parent = <&gpio>;
254 interrupts = <187 0x04>;
255
256 gpio-controller;
257 #gpio-cells = <2>;
258
259 micdet-cfg = <0>;
260 micdet-delay = <100>;
261 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
262 };
263 };
264
265 i2c@7000c400 {
266 status = "okay";
267 clock-frequency = <400000>;
268 };
269
270 i2c@7000c500 {
271 status = "okay";
272 clock-frequency = <400000>;
273 };
274
275 i2c@7000d000 {
276 status = "okay";
277 clock-frequency = <400000>;
278
279 pmic: tps6586x@34 {
280 compatible = "ti,tps6586x";
281 reg = <0x34>;
282 interrupts = <0 86 0x4>;
283
284 #gpio-cells = <2>;
285 gpio-controller;
286
287 sys-supply = <&vdd_5v0_reg>;
288 vin-sm0-supply = <&sys_reg>;
289 vin-sm1-supply = <&sys_reg>;
290 vin-sm2-supply = <&sys_reg>;
291 vinldo01-supply = <&sm2_reg>;
292 vinldo23-supply = <&sm2_reg>;
293 vinldo4-supply = <&sm2_reg>;
294 vinldo678-supply = <&sm2_reg>;
295 vinldo9-supply = <&sm2_reg>;
296
297 regulators {
298 #address-cells = <1>;
299 #size-cells = <0>;
300
301 sys_reg: regulator@0 {
302 reg = <0>;
303 regulator-compatible = "sys";
304 regulator-name = "vdd_sys";
305 regulator-always-on;
306 };
307
308 regulator@1 {
309 reg = <1>;
310 regulator-compatible = "sm0";
311 regulator-name = "vdd_sm0,vdd_core";
312 regulator-min-microvolt = <1200000>;
313 regulator-max-microvolt = <1200000>;
314 regulator-always-on;
315 };
316
317 regulator@2 {
318 reg = <2>;
319 regulator-compatible = "sm1";
320 regulator-name = "vdd_sm1,vdd_cpu";
321 regulator-min-microvolt = <1000000>;
322 regulator-max-microvolt = <1000000>;
323 regulator-always-on;
324 };
325
326 sm2_reg: regulator@3 {
327 reg = <3>;
328 regulator-compatible = "sm2";
329 regulator-name = "vdd_sm2,vin_ldo*";
330 regulator-min-microvolt = <3700000>;
331 regulator-max-microvolt = <3700000>;
332 regulator-always-on;
333 };
334
335 regulator@4 {
336 reg = <4>;
337 regulator-compatible = "ldo0";
338 regulator-name = "vdd_ldo0,vddio_pex_clk";
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
341 };
342
343 regulator@5 {
344 reg = <5>;
345 regulator-compatible = "ldo1";
346 regulator-name = "vdd_ldo1,avdd_pll*";
347 regulator-min-microvolt = <1100000>;
348 regulator-max-microvolt = <1100000>;
349 regulator-always-on;
350 };
351
352 regulator@6 {
353 reg = <6>;
354 regulator-compatible = "ldo2";
355 regulator-name = "vdd_ldo2,vdd_rtc";
356 regulator-min-microvolt = <1200000>;
357 regulator-max-microvolt = <1200000>;
358 };
359
360 regulator@7 {
361 reg = <7>;
362 regulator-compatible = "ldo3";
363 regulator-name = "vdd_ldo3,avdd_usb*";
364 regulator-min-microvolt = <3300000>;
365 regulator-max-microvolt = <3300000>;
366 regulator-always-on;
367 };
368
369 regulator@8 {
370 reg = <8>;
371 regulator-compatible = "ldo4";
372 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
373 regulator-min-microvolt = <1800000>;
374 regulator-max-microvolt = <1800000>;
375 regulator-always-on;
376 };
377
378 regulator@9 {
379 reg = <9>;
380 regulator-compatible = "ldo5";
381 regulator-name = "vdd_ldo5,vcore_mmc";
382 regulator-min-microvolt = <2850000>;
383 regulator-max-microvolt = <2850000>;
384 regulator-always-on;
385 };
386
387 regulator@10 {
388 reg = <10>;
389 regulator-compatible = "ldo6";
390 regulator-name = "vdd_ldo6,avdd_vdac";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 };
394
395 regulator@11 {
396 reg = <11>;
397 regulator-compatible = "ldo7";
398 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
399 regulator-min-microvolt = <3300000>;
400 regulator-max-microvolt = <3300000>;
401 };
402
403 regulator@12 {
404 reg = <12>;
405 regulator-compatible = "ldo8";
406 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
407 regulator-min-microvolt = <1800000>;
408 regulator-max-microvolt = <1800000>;
409 };
410
411 regulator@13 {
412 reg = <13>;
413 regulator-compatible = "ldo9";
414 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
415 regulator-min-microvolt = <2850000>;
416 regulator-max-microvolt = <2850000>;
417 regulator-always-on;
418 };
419
420 regulator@14 {
421 reg = <14>;
422 regulator-compatible = "ldo_rtc";
423 regulator-name = "vdd_rtc_out,vdd_cell";
424 regulator-min-microvolt = <3300000>;
425 regulator-max-microvolt = <3300000>;
426 regulator-always-on;
427 };
428 };
429 };
430 };
431
432 pmc {
433 nvidia,invert-interrupt;
434 };
435
436 usb@c5000000 {
437 status = "okay";
438 };
439
440 usb@c5004000 {
441 status = "okay";
442 nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
443 };
444
445 usb@c5008000 {
446 status = "okay";
447 };
448
449 sdhci@c8000200 {
450 status = "okay";
451 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
452 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
453 power-gpios = <&gpio 155 0>; /* gpio PT3 */
454 bus-width = <4>;
455 };
456
457 sdhci@c8000600 {
458 status = "okay";
459 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
460 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
461 power-gpios = <&gpio 70 0>; /* gpio PI6 */
462 bus-width = <8>;
463 };
464
465 regulators {
466 compatible = "simple-bus";
467 #address-cells = <1>;
468 #size-cells = <0>;
469
470 vdd_5v0_reg: regulator@0 {
471 compatible = "regulator-fixed";
472 reg = <0>;
473 regulator-name = "vdd_5v0";
474 regulator-min-microvolt = <5000000>;
475 regulator-max-microvolt = <5000000>;
476 regulator-always-on;
477 };
478
479 regulator@1 {
480 compatible = "regulator-fixed";
481 reg = <1>;
482 regulator-name = "vdd_1v5";
483 regulator-min-microvolt = <1500000>;
484 regulator-max-microvolt = <1500000>;
485 gpio = <&pmic 0 0>;
486 };
487
488 regulator@2 {
489 compatible = "regulator-fixed";
490 reg = <2>;
491 regulator-name = "vdd_1v2";
492 regulator-min-microvolt = <1200000>;
493 regulator-max-microvolt = <1200000>;
494 gpio = <&pmic 1 0>;
495 enable-active-high;
496 };
497
498 regulator@3 {
499 compatible = "regulator-fixed";
500 reg = <3>;
501 regulator-name = "vdd_1v05";
502 regulator-min-microvolt = <1050000>;
503 regulator-max-microvolt = <1050000>;
504 gpio = <&pmic 2 0>;
505 enable-active-high;
506 /* Hack until board-harmony-pcie.c is removed */
507 status = "disabled";
508 };
509
510 regulator@4 {
511 compatible = "regulator-fixed";
512 reg = <4>;
513 regulator-name = "vdd_pnl";
514 regulator-min-microvolt = <2800000>;
515 regulator-max-microvolt = <2800000>;
516 gpio = <&gpio 22 0>; /* gpio PC6 */
517 enable-active-high;
518 };
519
520 regulator@5 {
521 compatible = "regulator-fixed";
522 reg = <5>;
523 regulator-name = "vdd_bl";
524 regulator-min-microvolt = <2800000>;
525 regulator-max-microvolt = <2800000>;
526 gpio = <&gpio 176 0>; /* gpio PW0 */
527 enable-active-high;
528 };
529 };
530
531 sound {
532 compatible = "nvidia,tegra-audio-wm8903-harmony",
533 "nvidia,tegra-audio-wm8903";
534 nvidia,model = "NVIDIA Tegra Harmony";
535
536 nvidia,audio-routing =
537 "Headphone Jack", "HPOUTR",
538 "Headphone Jack", "HPOUTL",
539 "Int Spk", "ROP",
540 "Int Spk", "RON",
541 "Int Spk", "LOP",
542 "Int Spk", "LON",
543 "Mic Jack", "MICBIAS",
544 "IN1L", "Mic Jack";
545
546 nvidia,i2s-controller = <&tegra_i2s1>;
547 nvidia,audio-codec = <&wm8903>;
548
549 nvidia,spkr-en-gpios = <&wm8903 2 0>;
550 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
551 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
552 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
553 };
554 };
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